| /linux/sound/soc/fsl/ |
| H A D | fsl_mqs.c | 64 int div_shift; member
127 (div - 1) << mqs_priv->soc->div_shift); in fsl_mqs_hw_params()
360 .div_shift = MQS_CLK_DIV_SHIFT,
373 .div_shift = IMX6SX_GPR2_MQS_CLK_DIV_SHIFT,
386 .div_shift = 8,
400 .div_shift = 8,
413 .div_shift = 9,
427 .div_shift = 8,
441 .div_shift = 8,
|
| /linux/drivers/clk/ |
| H A D | clk-loongson2.c | 37 u8 div_shift; member
52 u8 div_shift; member
66 .div_shift = _dshift, \
80 .div_shift = _dshift, \
92 .div_shift = _dshift, \
104 .div_shift = _dshift, \
289 div = loongson2_rate_part(val, clk->div_shift, clk->div_width); in loongson2_pll_recalc_rate()
306 scale = loongson2_rate_part(val, clk->div_shift, clk->div_width) + 1; in loongson2_freqscale_recalc_rate()
340 clk->div_shift = cld->div_shift; in loongson2_clk_register()
409 p->div_shift, p->div_width, in loongson2_clk_probe()
|
| H A D | clk-en7523.c | 60 u8 div_shift; member
109 .div_shift = 0,
123 .div_shift = 0,
137 .div_shift = 0,
152 .div_shift = 24,
164 .div_shift = 8,
178 .div_shift = 0,
205 .div_shift = 0,
219 .div_shift = 0,
233 .div_shift = 0,
[all …]
|
| H A D | clk-sp7021.c | 46 int div_shift; member
469 u32 fbdiv = ((reg >> clk->div_shift) & ((1 << clk->div_width) - 1)) + 1; in sp_pll_recalc_rate()
494 u32 mask = GENMASK(clk->div_shift + clk->div_width - 1, clk->div_shift); in sp_pll_set_rate()
497 reg |= ((fbdiv - 1) << clk->div_shift) & mask; in sp_pll_set_rate()
572 pll->div_shift = shift; in sp_pll_register()
|
| H A D | clk-bm1880.c | 120 s8 div_shift; member
152 .div_shift = _div_shift, \
168 .div_shift = -1, \
808 if (clks->div_shift >= 0) { in bm1880_clk_register_composite()
817 div_hws->div.shift = clks->div_shift; in bm1880_clk_register_composite()
|
| H A D | clk-k210.c | 35 u8 div_shift; member
55 .div_shift = (_shift), \
760 div_val = (reg >> cfg->div_shift) & GENMASK(cfg->div_width - 1, 0); in k210_clk_get_rate()
|
| /linux/drivers/clk/rockchip/ |
| H A D | clk.h | 709 int div_offset, u8 div_shift,
731 int div_shift, int div_width,
784 u8 div_shift; member
809 .div_shift = ds, \
831 .div_shift = ds, \
849 .div_shift = ds, \
867 .div_shift = ds, \
907 .div_shift = ds, \
926 .div_shift = ds, \
942 .div_shift = 16, \
[all …]
|
| H A D | clk-ddr.c | 21 int div_shift; member
95 int div_shift, int div_width, in rockchip_clk_register_ddrclk() argument
130 ddrclk->div_shift = div_shift; in rockchip_clk_register_ddrclk()
|
| H A D | clk.c | 44 int div_offset, u8 div_shift, u8 div_width, u8 div_flags, in rockchip_clk_register_branch() argument
98 div->shift = div_shift; in rockchip_clk_register_branch()
556 list->div_shift, list->div_width, in rockchip_clk_register_branches()
563 list->div_shift, list->div_width, in rockchip_clk_register_branches()
580 list->mux_flags, list->div_shift, in rockchip_clk_register_branches()
607 list->div_shift, list->div_width, in rockchip_clk_register_branches()
618 list->div_shift in rockchip_clk_register_branches()
627 list->div_shift in rockchip_clk_register_branches()
635 list->div_shift, list->div_flags, &ctx->lock); in rockchip_clk_register_branches()
641 list->div_shift, list->div_width, in rockchip_clk_register_branches()
[all …]
|
| H A D | clk-half-divider.c | 165 u8 div_shift, u8 div_width, in rockchip_clk_register_halfdiv() argument
211 div->shift = div_shift; in rockchip_clk_register_halfdiv()
|
| H A D | clk-cpu.c | 468 int div_offset, u8 div_shift, in rockchip_clk_register_cpuclk_multi_pll() argument
507 div->shift = div_shift; in rockchip_clk_register_cpuclk_multi_pll()
|
| /linux/drivers/clk/x86/ |
| H A D | clk-cgu.h | 182 u8 div_shift; member
232 .div_shift = _shift, \
272 .div_shift = _shift, \
292 .div_shift = _shift, \
|
| H A D | clk-cgu.c | 30 lgm_set_clk_val(ctx->membase, list->div_off, list->div_shift, in lgm_clk_register_fixed()
200 u8 shift = list->div_shift; in lgm_clk_register_divider()
252 lgm_set_clk_val(ctx->membase, list->div_off, list->div_shift, in lgm_clk_register_fixed_factor()
|
| /linux/drivers/clk/mediatek/ |
| H A D | clk-mtk.h | 211 unsigned char div_shift; member
222 .div_shift = _shift, \
|
| H A D | clk-mt8167-apmixedsys.c | 82 .div_shift = _shift, \
|
| H A D | clk-mt8516.c | 474 .div_shift = _shift, \
|
| H A D | clk-mt8167.c | 663 .div_shift = _shift, \
|
| H A D | clk-mt8365.c | 547 .div_shift = _shift, \
|
| /linux/drivers/clk/at91/ |
| H A D | clk-sam9x60-pll.c | 355 (div << core->layout->div_shift) | ena_val); in sam9x60_div_pll_set_div()
376 cdiv = (val & core->layout->div_mask) >> core->layout->div_shift; in sam9x60_div_pll_set()
531 cdiv = (val & core->layout->div_mask) >> core->layout->div_shift; in sam9x60_div_pll_set_rate_chg()
587 cdiv = (val & core.layout->div_mask) >> core.layout->div_shift; in sam9x60_div_pll_notifier_fn()
|
| H A D | sam9x7.c | 167 .div_shift = 0,
175 .div_shift = 0,
184 .div_shift = 12,
|
| H A D | pmc.h | 65 u8 div_shift; member
|
| H A D | sam9x60.c | 65 .div_shift = 0,
|
| H A D | sama7d65.c | 84 .div_shift = 0,
92 .div_shift = 12,
|
| /linux/drivers/mfd/ |
| H A D | db8500-prcmu.c | 523 u32 div_shift; member
530 .div_shift = PRCM_DSITVCLK_DIV_DSI0_ESC_CLK_DIV_SHIFT,
535 .div_shift = PRCM_DSITVCLK_DIV_DSI1_ESC_CLK_DIV_SHIFT,
540 .div_shift = PRCM_DSITVCLK_DIV_DSI2_ESC_CLK_DIV_SHIFT,
1534 div = ((div & dsiescclk[n].div_mask) >> (dsiescclk[n].div_shift)); in dsiescclk_rate()
1899 val |= (min(div, (u32)255) << dsiescclk[n].div_shift); in set_dsiescclk_rate()
|
| /linux/drivers/clk/tegra/ |
| H A D | clk-tegra-periph.c | 832 u8 div_shift; member
843 .div_shift = _div_shift,\
967 data->div_shift, 8, 1, data->lock); in init_pllp()
|