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/linux/Documentation/devicetree/bindings/clock/ti/davinci/
H A Dda8xx-cfgchip.txt43 - clock-names: shall be "pll0_sysclk3", "div4.5"
71 div4p5_clk: div4.5 {
81 clock-names = "pll0_sysclk3", "div4.5";
/linux/drivers/clk/uniphier/
H A Dclk-uniphier.h122 #define UNIPHIER_CLK_DIV5(parent, div0, div1, div2, div3, div4) \ argument
124 UNIPHIER_CLK_DIV(parent, div4)
/linux/arch/arm/boot/dts/ti/davinci/
H A Dda850.dtsi400 div4p5_clk: div4.5 {
410 clock-names = "pll0_sysclk3", "div4.5";
/linux/arch/arm/boot/dts/ti/omap/
H A Dam33xx-clocks.dtsi316 dpll_per_m2_div4_wkupdm_ck: clock-dpll-per-m2-div4-wkupdm {
325 dpll_per_m2_div4_ck: clock-dpll-per-m2-div4 {
H A Dam43xx-clocks.dtsi370 dpll_per_m2_div4_wkupdm_ck: clock-dpll-per-m2-div4-wkupdm {
379 dpll_per_m2_div4_ck: clock-dpll-per-m2-div4 {
/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8996-oneplus-common.dtsi43 divclk4: div4-clk {
/linux/drivers/video/fbdev/
H A Damifb.c551 #define div4(v) ((v)>>2) macro