Searched refs:dhar (Results 1 – 2 of 2) sorted by relevance
140 #define dhar_mem_hoist_valid(pvt) ((pvt)->dhar & BIT(1))141 #define dhar_base(pvt) ((pvt)->dhar & 0xff000000)142 #define k8_dhar_offset(pvt) (((pvt)->dhar & 0x0000ff00) << 16)145 #define f10_dhar_offset(pvt) (((pvt)->dhar & 0x0000ff80) << 16)344 u32 dhar; /* DRAM Hoist reg */ member514 return (pvt)->dhar & BIT(0); in dhar_valid()
556 EDAC_DCT_ATTR_SHOW(dhar);579 static DEVICE_ATTR(dhar, S_IRUGO, dhar_show, NULL);1384 pvt->dhar, dhar_base(pvt), in dct_dump_misc_regs()2983 amd64_read_pci_cfg(pvt->F1, DHAR, &pvt->dhar); in dct_read_mc_regs()