Searched refs:dev_specs (Results 1 – 14 of 14) sorted by relevance
13 return (dir == HBG_DIR_TX) ? priv->dev_specs.max_frame_len : in hbg_spec_max_frame_len()14 priv->dev_specs.rx_buf_size; in hbg_spec_max_frame_len()20 return (dir == HBG_DIR_TX) ? priv->dev_specs.tx_fifo_num : in hbg_get_spec_fifo_max_num()21 priv->dev_specs.rx_fifo_num; in hbg_get_spec_fifo_max_num()
338 struct hbg_dev_specs *dev_specs = &priv->dev_specs; in hbg_mac_filter_init() local 342 tmp_table = devm_kcalloc(&priv->pdev->dev, dev_specs->uc_mac_num, in hbg_mac_filter_init() 348 filter->table_max_len = dev_specs->uc_mac_num; in hbg_mac_filter_init() 461 netdev->max_mtu = priv->dev_specs.max_mtu; in hbg_probe() 462 netdev->min_mtu = priv->dev_specs.min_mtu; in hbg_probe() 467 hbg_net_set_mac_address(priv->netdev, &priv->dev_specs.mac_addr); in hbg_probe()
64 struct hbg_dev_specs *specs = &priv->dev_specs; in hbg_hw_dev_specs_init()187 frame_len = mtu + VLAN_HLEN * priv->dev_specs.vlan_layers + in hbg_hw_set_mtu()353 ctrl |= FIELD_PREP(HBG_REG_RX_CTRL_PORT_NUM, priv->dev_specs.mac_id); in hbg_hw_init_rx_ctrl()370 HBG_REG_RX_BUF_SIZE_M, priv->dev_specs.rx_buf_size); in hbg_hw_init_rx_control()
106 u32 freq = priv->dev_specs.mdio_frequency; in hbg_mdio_init_hw()274 mac->phy_addr = priv->dev_specs.phy_addr; in hbg_mdio_init()
380 priv->dev_specs.max_frame_len)) { in hbg_rx_pkt_check()386 priv->dev_specs.mac_id || in hbg_rx_pkt_check()433 u32 max_count = priv->dev_specs.rx_fifo_num; in hbg_rx_fill_buffers()
277 struct hbg_dev_specs dev_specs; member
584 hdev->ae_dev->dev_specs.rss_ind_tbl_size);604 for (i = 0; i < hdev->ae_dev->dev_specs.rss_ind_tbl_size; i++) in hclgevf_set_rss() 2736 ae_dev->dev_specs.max_non_tso_bd_num = in hclgevf_set_default_dev_specs() 2738 ae_dev->dev_specs.rss_ind_tbl_size = HCLGEVF_RSS_IND_TBL_SIZE; in hclgevf_set_default_dev_specs() 2739 ae_dev->dev_specs.rss_key_size = HCLGE_COMM_RSS_KEY_SIZE;2740 ae_dev->dev_specs.max_int_gl = HCLGEVF_DEF_MAX_INT_GL; in hclgevf_parse_dev_specs() 2741 ae_dev->dev_specs.max_frm_size = HCLGEVF_MAC_MAX_FRAME; in hclgevf_parse_dev_specs() 2754 ae_dev->dev_specs.max_non_tso_bd_num = req0->max_non_tso_bd_num; in hclgevf_parse_dev_specs() 2755 ae_dev->dev_specs.rss_ind_tbl_size = in hclgevf_parse_dev_specs() 2757 ae_dev->dev_specs in hclgevf_parse_dev_specs() 2761 struct hnae3_dev_specs *dev_specs = &hdev->ae_dev->dev_specs; hclgevf_check_dev_specs() local [all...]
38 u16 rss_ind_tbl_size = ae_dev->dev_specs.rss_ind_tbl_size; in hclge_comm_rss_init_cfg()223 for (i = 0; i < ae_dev->dev_specs.rss_ind_tbl_size; i++) in hclge_comm_rss_indir_init_cfg()288 rss_cfg_tbl_num = ae_dev->dev_specs.rss_ind_tbl_size / in hclge_comm_set_rss_indir_table()
407 u32 reg_num = hdev->ae_dev->dev_specs.mac_stats_num; in hclge_trace_cmd_send() 487 if (hdev->ae_dev->dev_specs.mac_stats_num) in hclge_mac_update_stats_complete() 501 if (strs[i].stats_num <= hdev->ae_dev->dev_specs.mac_stats_num) in hclge_mac_update_stats_complete() 515 if (strs[i].stats_num > hdev->ae_dev->dev_specs.mac_stats_num) in hclge_mac_update_stats_complete() 535 if (strs[i].stats_num > hdev->ae_dev->dev_specs.mac_stats_num) in hclge_mac_query_reg_num() 617 if (hdev->ae_dev->dev_specs.hilink_version != in hclge_update_stats_for_all() 1295 ae_dev->dev_specs.max_non_tso_bd_num = HCLGE_MAX_NON_TSO_BD_NUM; in hclge_parse_cfg() 1296 ae_dev->dev_specs.rss_ind_tbl_size = HCLGE_RSS_IND_TBL_SIZE; in hclge_parse_cfg() 1297 ae_dev->dev_specs.rss_key_size = HCLGE_COMM_RSS_KEY_SIZE; in hclge_parse_cfg() 1298 ae_dev->dev_specs in hclge_parse_cfg() 1406 struct hnae3_dev_specs *dev_specs = &hdev->ae_dev->dev_specs; hclge_check_dev_specs() local [all...]
474 hdev->ae_dev->dev_specs.max_tm_rate); in hclge_tm_port_shaper_cfg()598 max_tx_rate = hdev->ae_dev->dev_specs.max_tm_rate; in hclge_tm_qs_shaper_cfg()602 hdev->ae_dev->dev_specs.max_tm_rate); in hclge_tm_qs_shaper_cfg()801 hdev->ae_dev->dev_specs.max_tm_rate; in hclge_tm_pg_info_init()885 u32 max_tm_rate = hdev->ae_dev->dev_specs.max_tm_rate; in hclge_tm_pg_shaper_cfg()1047 u32 max_tm_rate = hdev->ae_dev->dev_specs.max_tm_rate; in hclge_tm_pri_tc_base_shaper_cfg()1098 hdev->ae_dev->dev_specs.max_tm_rate); in hclge_tm_pri_vnet_base_shaper_pri_cfg()1128 u32 max_tm_rate = hdev->ae_dev->dev_specs.max_tm_rate; in hclge_tm_pri_vnet_base_shaper_qs_cfg()
419 HCLGE_REG_TLV_SIZE) * ae_dev->dev_specs.tnl_num; in hclge_get_dfx_reg_len()434 for (i = HCLGE_REG_RPU_TNL_ID_0; i <= ae_dev->dev_specs.tnl_num; i++) { in hclge_get_dfx_rpu_tnl_reg()
1611 loop_time = min(hdev->ae_dev->dev_specs.tnl_num, in hclge_query_reg_info_of_ssu()
936 return ae_dev->dev_specs.rss_ind_tbl_size; in hns3_get_rss_indir_size() 1399 if (cmd->rx_coalesce_usecs > ae_dev->dev_specs.max_int_gl) { in hns3_check_gl_coalesce_para() 1402 ae_dev->dev_specs.max_int_gl); in hns3_check_gl_coalesce_para() 1406 if (cmd->tx_coalesce_usecs > ae_dev->dev_specs.max_int_gl) { in hns3_check_gl_coalesce_para() 1409 ae_dev->dev_specs.max_int_gl); in hns3_check_gl_coalesce_para() 1471 !ae_dev->dev_specs.int_ql_max) { in hns3_check_ql_coalesce_param() 1476 if (cmd->tx_max_coalesced_frames > ae_dev->dev_specs.int_ql_max || in hns3_check_ql_coalesce_param() 1477 cmd->rx_max_coalesced_frames > ae_dev->dev_specs.int_ql_max) { in hns3_check_ql_coalesce_param() 1480 ae_dev->dev_specs.int_ql_max); in hns3_check_ql_coalesce_param()
589 if (ae_dev->dev_specs.int_ql_max) { in hns3_vector_coalesce_init_hw() 592 tx_coal->int_ql_max = ae_dev->dev_specs.int_ql_max; in hns3_vector_coalesce_init_hw() 593 rx_coal->int_ql_max = ae_dev->dev_specs.int_ql_max; in hns3_vector_coalesce_init_hw() 4826 if (ae_dev->dev_specs.int_ql_max) { in hns3_nic_alloc_vector_data() 5396 priv->max_non_tso_bd_num = ae_dev->dev_specs.max_non_tso_bd_num; in hns3_client_init() 5479 netdev->max_mtu = HNS3_MAX_MTU(ae_dev->dev_specs.max_frm_size); in hns3_client_init()