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Searched refs:dev_caps (Results 1 – 25 of 30) sorted by relevance

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/linux/arch/arm/mach-omap1/
H A Ddma.c330 d->dev_caps = ENABLE_1510_MODE; in omap1_system_dma_init()
331 enable_1510_mode = d->dev_caps & ENABLE_1510_MODE; in omap1_system_dma_init()
334 d->dev_caps = ENABLE_16XX_MODE; in omap1_system_dma_init()
336 d->dev_caps |= SRC_PORT; in omap1_system_dma_init()
337 d->dev_caps |= DST_PORT; in omap1_system_dma_init()
338 d->dev_caps |= SRC_INDEX; in omap1_system_dma_init()
339 d->dev_caps |= DST_INDEX; in omap1_system_dma_init()
340 d->dev_caps |= IS_BURST_ONLY4; in omap1_system_dma_init()
341 d->dev_caps |= CLEAR_CSR_ON_READ; in omap1_system_dma_init()
342 d->dev_caps |= IS_WORD_16; in omap1_system_dma_init()
[all …]
/linux/drivers/net/vmxnet3/
H A Dvmxnet3_ethtool.c343 adapter->dev_caps[0] |= 1UL << VMXNET3_CAP_GENEVE_CHECKSUM_OFFLOAD; in vmxnet3_enable_encap_offloads()
347 adapter->dev_caps[0] |= 1UL << VMXNET3_CAP_VXLAN_CHECKSUM_OFFLOAD; in vmxnet3_enable_encap_offloads()
351 adapter->dev_caps[0] |= 1UL << VMXNET3_CAP_GENEVE_TSO; in vmxnet3_enable_encap_offloads()
355 adapter->dev_caps[0] |= 1UL << VMXNET3_CAP_VXLAN_TSO; in vmxnet3_enable_encap_offloads()
359 adapter->dev_caps[0] |= 1UL << VMXNET3_CAP_GENEVE_OUTER_CHECKSUM_OFFLOAD; in vmxnet3_enable_encap_offloads()
363 adapter->dev_caps[0] |= 1UL << VMXNET3_CAP_VXLAN_OUTER_CHECKSUM_OFFLOAD; in vmxnet3_enable_encap_offloads()
366 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DCR, adapter->dev_caps[0]); in vmxnet3_enable_encap_offloads()
369 adapter->dev_caps[0] = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); in vmxnet3_enable_encap_offloads()
372 if (!(adapter->dev_caps[0] & (1UL << VMXNET3_CAP_GENEVE_CHECKSUM_OFFLOAD)) && in vmxnet3_enable_encap_offloads()
373 !(adapter->dev_caps[0] & (1UL << VMXNET3_CAP_VXLAN_CHECKSUM_OFFLOAD)) && in vmxnet3_enable_encap_offloads()
[all …]
H A Dvmxnet3_drv.c1932 if (!(adapter->dev_caps[0] & (1UL << VMXNET3_CAP_OOORX_COMP))) in vmxnet3_rq_rx_complete()
3076 adapter->dev_caps[0] |= 1UL << VMXNET3_CAP_UDP_RSS; in vmxnet3_init_rssfields()
3078 adapter->dev_caps[0] &= ~(1UL << VMXNET3_CAP_UDP_RSS); in vmxnet3_init_rssfields()
3084 adapter->dev_caps[0] |= 1UL << VMXNET3_CAP_ESP_RSS_IPV4; in vmxnet3_init_rssfields()
3086 adapter->dev_caps[0] &= ~(1UL << VMXNET3_CAP_ESP_RSS_IPV4); in vmxnet3_init_rssfields()
3092 adapter->dev_caps[0] |= 1UL << VMXNET3_CAP_ESP_RSS_IPV6; in vmxnet3_init_rssfields()
3094 adapter->dev_caps[0] &= ~(1UL << VMXNET3_CAP_ESP_RSS_IPV6); in vmxnet3_init_rssfields()
3097 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DCR, adapter->dev_caps[0]); in vmxnet3_init_rssfields()
3099 adapter->dev_caps[0] = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); in vmxnet3_init_rssfields()
3689 adapter->dev_caps[0] |= 1UL << VMXNET3_CAP_GENEVE_CHECKSUM_OFFLOAD; in vmxnet3_declare_features()
[all …]
H A Dvmxnet3_int.h448 u32 dev_caps[8]; member
/linux/drivers/net/ethernet/intel/ice/
H A Dice_fw_update.c366 if (hw->dev_caps.common_cap.pcie_reset_avoidance) { in ice_write_one_nvm_block()
587 if (hw->dev_caps.common_cap.reset_restrict_support) { in ice_switch_flash_banks()
852 struct ice_hw_dev_caps *dev_caps; in ice_get_pending_updates() local
856 dev_caps = kzalloc(sizeof(*dev_caps), GFP_KERNEL); in ice_get_pending_updates()
857 if (!dev_caps) in ice_get_pending_updates()
865 err = ice_discover_dev_caps(hw, dev_caps); in ice_get_pending_updates()
868 kfree(dev_caps); in ice_get_pending_updates()
874 if (dev_caps->common_cap.nvm_update_pending_nvm) { in ice_get_pending_updates()
879 if (dev_caps->common_cap.nvm_update_pending_orom) { in ice_get_pending_updates()
884 if (dev_caps->common_cap.nvm_update_pending_netlist) { in ice_get_pending_updates()
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H A Dice_hwmon.c97 unsigned long sensors = pf->hw.dev_caps.supported_sensors; in ice_is_internal_reading_supported()
H A Dice_common.c2073 funcs = hweight8(hw->dev_caps.common_cap.valid_functions & in ice_get_num_per_func()
2231 if (hw->dev_caps.num_funcs > 4) { in ice_recalc_port_limited_caps()
2244 if (caps == &hw->dev_caps.common_cap) in ice_recalc_port_limited_caps()
2848 ice_discover_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_caps) in ice_discover_dev_caps() argument
2867 ice_parse_dev_caps(hw, dev_caps, cbuf, cap_count); in ice_discover_dev_caps()
2914 struct ice_hw_dev_caps *dev_caps = &hw->dev_caps; in ice_set_safe_mode_caps() local
2947 cached_caps = dev_caps->common_cap; in ice_set_safe_mode_caps()
2948 num_funcs = dev_caps->num_funcs; in ice_set_safe_mode_caps()
2951 memset(dev_caps, 0, sizeof(*dev_caps)); in ice_set_safe_mode_caps()
2954 dev_caps->common_cap.name = cached_caps.name in ice_set_safe_mode_caps()
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H A Dice_common.h128 ice_discover_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_caps);
H A Dice_type.h927 struct ice_hw_dev_caps dev_caps; /* device capabilities */ member
H A Dice_main.c3161 if (!pf->hw.dev_caps.ts_dev_info.ts_ll_int_read) in ice_ena_misc_vector()
3294 pf->hw.dev_caps.ts_dev_info.ts_ll_int_read) { in ice_misc_intr()
3442 if (pf->hw.dev_caps.ts_dev_info.ts_ll_int_read) in ice_free_irq_msix_misc()
3469 if (!hw->dev_caps.ts_dev_info.ts_ll_int_read) { in ice_ena_ctrlq_interrupts()
3526 if (!pf->hw.dev_caps.ts_dev_info.ts_ll_int_read) in ice_req_irq_msix_misc()
3549 if (pf->hw.dev_caps.ts_dev_info.ts_ll_int_read) in ice_req_irq_msix_misc()
H A Dice_lag.c1261 caps = &pf->hw.dev_caps.common_cap; in ice_lag_init_feature_support_flag()
/linux/drivers/net/ethernet/intel/iavf/
H A Diavf_common.c494 hw->dev_caps.num_vsis = msg->num_vsis; in iavf_vf_parse_hw_config()
495 hw->dev_caps.num_rx_qp = msg->num_queue_pairs; in iavf_vf_parse_hw_config()
496 hw->dev_caps.num_tx_qp = msg->num_queue_pairs; in iavf_vf_parse_hw_config()
497 hw->dev_caps.num_msix_vectors_vf = msg->max_vectors; in iavf_vf_parse_hw_config()
498 hw->dev_caps.dcb = msg->vf_cap_flags & in iavf_vf_parse_hw_config()
500 hw->dev_caps.fcoe = 0; in iavf_vf_parse_hw_config()
H A Diavf_type.h171 struct iavf_hw_capabilities dev_caps; member
/linux/arch/arm/mach-omap2/
H A Ddma.c176 .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
199 dma_attr.dev_caps |= IS_RW_PRIORITY; in omap2_system_dma_init()
202 dma_attr.dev_caps |= HS_CHANNELS_RESERVED; in omap2_system_dma_init()
/linux/include/linux/
H A Domap-dma.h247 u32 dev_caps; member
290 #define __dma_omap15xx(d) (dma_omap1() && (d)->dev_caps & ENABLE_1510_MODE)
291 #define __dma_omap16xx(d) (dma_omap1() && (d)->dev_caps & ENABLE_16XX_MODE)
/linux/drivers/net/ethernet/intel/ice/devlink/
H A Ddevlink.c21 struct ice_hw_dev_caps dev_caps; member
93 if (ctx->dev_caps.common_cap.nvm_update_pending_orom) in ice_info_pending_orom_ver()
111 if (ctx->dev_caps.common_cap.nvm_update_pending_nvm) in ice_info_pending_nvm_ver()
128 if (ctx->dev_caps.common_cap.nvm_update_pending_nvm) in ice_info_pending_eetrack()
179 if (ctx->dev_caps.common_cap.nvm_update_pending_netlist) in ice_info_pending_netlist_ver()
192 if (ctx->dev_caps.common_cap.nvm_update_pending_netlist) in ice_info_pending_netlist_build()
293 err = ice_discover_dev_caps(hw, &ctx->dev_caps); in ice_devlink_info_get()
301 if (ctx->dev_caps.common_cap.nvm_update_pending_orom) { in ice_devlink_info_get()
308 ctx->dev_caps.common_cap.nvm_update_pending_orom = false; in ice_devlink_info_get()
312 if (ctx->dev_caps.common_cap.nvm_update_pending_nvm) { in ice_devlink_info_get()
[all …]
/linux/drivers/hwtracing/coresight/
H A Dcoresight-tmc.h300 static inline void tmc_etr_init_caps(struct tmc_drvdata *drvdata, u32 dev_caps) in TMC_REG_PAIR()
303 drvdata->etr_caps = dev_caps;
H A Dcoresight-tmc-core.c409 void *dev_caps; in tmc_etr_setup_caps() local
415 dev_caps = coresight_get_uci_data_from_amba(tmc_ids, tmc_pid); in tmc_etr_setup_caps()
418 tmc_etr_init_caps(drvdata, (u32)(unsigned long)dev_caps); in tmc_etr_setup_caps()
/linux/drivers/net/ethernet/qlogic/qed/
H A Dqed_rdma.c498 dev->dev_caps = 0; in qed_rdma_init_devinfo()
499 SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_RNR_NAK, 1); in qed_rdma_init_devinfo()
500 SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_PORT_ACTIVE_EVENT, 1); in qed_rdma_init_devinfo()
501 SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_PORT_CHANGE_EVENT, 1); in qed_rdma_init_devinfo()
502 SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_RESIZE_CQ, 1); in qed_rdma_init_devinfo()
503 SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_BASE_MEMORY_EXT, 1); in qed_rdma_init_devinfo()
504 SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_BASE_QUEUE_EXT, 1); in qed_rdma_init_devinfo()
505 SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_ZBVA, 1); in qed_rdma_init_devinfo()
506 SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_LOCAL_INV_FENCE, 1); in qed_rdma_init_devinfo()
513 SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_ATOMIC_OP, 1); in qed_rdma_init_devinfo()
/linux/include/uapi/rdma/
H A Dmlx4-abi.h67 __u32 dev_caps; member
/linux/drivers/infiniband/hw/qedr/
H A Dmain.c627 attr->dev_caps = qed_attr->dev_caps; in qedr_set_device_attr()
H A Dqedr.h115 u32 dev_caps; member
/linux/include/linux/qed/
H A Dqed_rdma_if.h83 u32 dev_caps; member
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_type.h535 struct i40e_hw_capabilities dev_caps; member
H A Di40e_main.c6548 if (hw->dev_caps.switch_mode) { in i40e_validate_and_set_switch_mode()
6552 u32 switch_mode = hw->dev_caps.switch_mode & in i40e_validate_and_set_switch_mode()
6559 hw->dev_caps.switch_mode); in i40e_validate_and_set_switch_mode()
10546 pf->hw.dev_caps.switch_mode, in i40e_get_capabilities()
10547 pf->hw.dev_caps.valid_functions); in i40e_get_capabilities()
10550 pf->hw.dev_caps.sr_iov_1_1, in i40e_get_capabilities()
10551 pf->hw.dev_caps.num_vfs); in i40e_get_capabilities()
10554 pf->hw.dev_caps.num_vsis, in i40e_get_capabilities()
10555 pf->hw.dev_caps.num_rx_qp, in i40e_get_capabilities()
10556 pf->hw.dev_caps.num_tx_qp); in i40e_get_capabilities()

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