1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 5 * 6 * Copyright (C) 2000 - 2023, Intel Corp. 7 * 8 *****************************************************************************/ 9 10 #ifndef __ACTBL2_H__ 11 #define __ACTBL2_H__ 12 13 /******************************************************************************* 14 * 15 * Additional ACPI Tables (2) 16 * 17 * These tables are not consumed directly by the ACPICA subsystem, but are 18 * included here to support device drivers and the AML disassembler. 19 * 20 ******************************************************************************/ 21 22 /* 23 * Values for description table header signatures for tables defined in this 24 * file. Useful because they make it more difficult to inadvertently type in 25 * the wrong signature. 26 */ 27 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 28 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 29 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 30 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */ 31 #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */ 32 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 33 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 34 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 35 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 36 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 37 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 38 #define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */ 39 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 40 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 41 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 42 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 43 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 44 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 45 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 46 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 47 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 48 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 49 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 50 #define ACPI_SIG_RAS2 "RAS2" /* RAS2 Feature table */ 51 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 52 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ 53 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 54 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 55 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 56 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 57 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 58 59 /* 60 * All tables must be byte-packed to match the ACPI specification, since 61 * the tables are provided by the system BIOS. 62 */ 63 #pragma pack(1) 64 65 /* 66 * Note: C bitfields are not used for this reason: 67 * 68 * "Bitfields are great and easy to read, but unfortunately the C language 69 * does not specify the layout of bitfields in memory, which means they are 70 * essentially useless for dealing with packed data in on-disk formats or 71 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 72 * this decision was a design error in C. Ritchie could have picked an order 73 * and stuck with it." Norman Ramsey. 74 * See http://stackoverflow.com/a/1053662/41661 75 */ 76 77 /******************************************************************************* 78 * 79 * AEST - Arm Error Source Table 80 * 81 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1(Sep 2020) and 82 * 2.0(May 2023) Platform Design Document. 83 * 84 ******************************************************************************/ 85 86 struct acpi_table_aest { 87 struct acpi_table_header header; 88 }; 89 90 /* Common Subtable header - one per Node Structure (Subtable) */ 91 92 struct acpi_aest_hdr { 93 u8 type; 94 u16 length; 95 u8 reserved; 96 u32 node_specific_offset; 97 u32 node_interface_offset; 98 u32 node_interrupt_offset; 99 u32 node_interrupt_count; 100 u64 timestamp_rate; 101 u64 reserved1; 102 u64 error_injection_rate; 103 }; 104 105 /* Values for Type above */ 106 107 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 108 #define ACPI_AEST_MEMORY_ERROR_NODE 1 109 #define ACPI_AEST_SMMU_ERROR_NODE 2 110 #define ACPI_AEST_VENDOR_ERROR_NODE 3 111 #define ACPI_AEST_GIC_ERROR_NODE 4 112 #define ACPI_AEST_PCIE_ERROR_NODE 5 113 #define ACPI_AEST_PROXY_ERROR_NODE 6 114 #define ACPI_AEST_NODE_TYPE_RESERVED 7 /* 7 and above are reserved */ 115 116 /* 117 * AEST subtables (Error nodes) 118 */ 119 120 /* 0: Processor Error */ 121 122 typedef struct acpi_aest_processor { 123 u32 processor_id; 124 u8 resource_type; 125 u8 reserved; 126 u8 flags; 127 u8 revision; 128 u64 processor_affinity; 129 130 } acpi_aest_processor; 131 132 /* Values for resource_type above, related structs below */ 133 134 #define ACPI_AEST_CACHE_RESOURCE 0 135 #define ACPI_AEST_TLB_RESOURCE 1 136 #define ACPI_AEST_GENERIC_RESOURCE 2 137 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 138 139 /* 0R: Processor Cache Resource Substructure */ 140 141 typedef struct acpi_aest_processor_cache { 142 u32 cache_reference; 143 u32 reserved; 144 145 } acpi_aest_processor_cache; 146 147 /* Values for cache_type above */ 148 149 #define ACPI_AEST_CACHE_DATA 0 150 #define ACPI_AEST_CACHE_INSTRUCTION 1 151 #define ACPI_AEST_CACHE_UNIFIED 2 152 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 153 154 /* 1R: Processor TLB Resource Substructure */ 155 156 typedef struct acpi_aest_processor_tlb { 157 u32 tlb_level; 158 u32 reserved; 159 160 } acpi_aest_processor_tlb; 161 162 /* 2R: Processor Generic Resource Substructure */ 163 164 typedef struct acpi_aest_processor_generic { 165 u32 resource; 166 167 } acpi_aest_processor_generic; 168 169 /* 1: Memory Error */ 170 171 typedef struct acpi_aest_memory { 172 u32 srat_proximity_domain; 173 174 } acpi_aest_memory; 175 176 /* 2: Smmu Error */ 177 178 typedef struct acpi_aest_smmu { 179 u32 iort_node_reference; 180 u32 subcomponent_reference; 181 182 } acpi_aest_smmu; 183 184 /* 3: Vendor Defined */ 185 186 typedef struct acpi_aest_vendor { 187 u32 acpi_hid; 188 u32 acpi_uid; 189 u8 vendor_specific_data[16]; 190 191 } acpi_aest_vendor; 192 193 struct acpi_aest_vendor_v2 { 194 char acpi_hid[8]; 195 u32 acpi_uid; 196 u8 vendor_specific_data[16]; 197 }; 198 199 /* 4: Gic Error */ 200 201 typedef struct acpi_aest_gic { 202 u32 interface_type; 203 u32 instance_id; 204 205 } acpi_aest_gic; 206 207 /* Values for interface_type above */ 208 209 #define ACPI_AEST_GIC_CPU 0 210 #define ACPI_AEST_GIC_DISTRIBUTOR 1 211 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 212 #define ACPI_AEST_GIC_ITS 3 213 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 214 215 /* 5: PCIe Error */ 216 217 struct acpi_aest_pcie { 218 u32 iort_node_reference; 219 }; 220 221 /* 6: Proxy Error */ 222 223 struct acpi_aest_proxy { 224 u64 node_address; 225 }; 226 227 /* Node Interface Structure */ 228 229 typedef struct acpi_aest_node_interface { 230 u8 type; 231 u8 reserved[3]; 232 u32 flags; 233 u64 address; 234 u32 error_record_index; 235 u32 error_record_count; 236 u64 error_record_implemented; 237 u64 error_status_reporting; 238 u64 addressing_mode; 239 240 } acpi_aest_node_interface; 241 242 /* Node Interface Structure V2 */ 243 244 struct acpi_aest_node_interface_header { 245 u8 type; 246 u8 group_format; 247 u8 reserved[2]; 248 u32 flags; 249 u64 address; 250 u32 error_record_index; 251 u32 error_record_count; 252 }; 253 254 #define ACPI_AEST_NODE_GROUP_FORMAT_4K 0 255 #define ACPI_AEST_NODE_GROUP_FORMAT_16K 1 256 #define ACPI_AEST_NODE_GROUP_FORMAT_64K 2 257 258 struct acpi_aest_node_interface_common { 259 u32 error_node_device; 260 u32 processor_affinity; 261 u64 error_group_register_base; 262 u64 fault_inject_register_base; 263 u64 interrupt_config_register_base; 264 }; 265 266 struct acpi_aest_node_interface_4k { 267 u64 error_record_implemented; 268 u64 error_status_reporting; 269 u64 addressing_mode; 270 struct acpi_aest_node_interface_common common; 271 }; 272 273 struct acpi_aest_node_interface_16k { 274 u64 error_record_implemented[4]; 275 u64 error_status_reporting[4]; 276 u64 addressing_mode[4]; 277 struct acpi_aest_node_interface_common common; 278 }; 279 280 struct acpi_aest_node_interface_64k { 281 u64 error_record_implemented[14]; 282 u64 error_status_reporting[14]; 283 u64 addressing_mode[14]; 284 struct acpi_aest_node_interface_common common; 285 }; 286 287 /* Values for Type field above */ 288 289 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 290 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 291 #define ACPI_AEST_NODE_SINGLE_RECORD_MEMORY_MAPPED 2 292 #define ACPI_AEST_XFACE_RESERVED 3 /* 2 and above are reserved */ 293 294 /* Node Interrupt Structure */ 295 296 typedef struct acpi_aest_node_interrupt { 297 u8 type; 298 u8 reserved[2]; 299 u8 flags; 300 u32 gsiv; 301 u8 iort_id; 302 u8 reserved1[3]; 303 304 } acpi_aest_node_interrupt; 305 306 /* Node Interrupt Structure V2 */ 307 308 struct acpi_aest_node_interrupt_v2 { 309 u8 type; 310 u8 reserved[2]; 311 u8 flags; 312 u32 gsiv; 313 u8 reserved1[4]; 314 }; 315 316 /* Values for Type field above */ 317 318 #define ACPI_AEST_NODE_FAULT_HANDLING 0 319 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 320 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 321 322 /******************************************************************************* 323 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 324 * 325 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 326 * ARM DEN0093 v1.1 327 * 328 ******************************************************************************/ 329 struct acpi_table_agdi { 330 struct acpi_table_header header; /* Common ACPI table header */ 331 u8 flags; 332 u8 reserved[3]; 333 u32 sdei_event; 334 u32 gsiv; 335 }; 336 337 /* Mask for Flags field above */ 338 339 #define ACPI_AGDI_SIGNALING_MODE (1) 340 341 /******************************************************************************* 342 * 343 * APMT - ARM Performance Monitoring Unit Table 344 * 345 * Conforms to: 346 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 347 * ARM DEN0117 v1.0 November 25, 2021 348 * 349 ******************************************************************************/ 350 351 struct acpi_table_apmt { 352 struct acpi_table_header header; /* Common ACPI table header */ 353 }; 354 355 #define ACPI_APMT_NODE_ID_LENGTH 4 356 357 /* 358 * APMT subtables 359 */ 360 struct acpi_apmt_node { 361 u16 length; 362 u8 flags; 363 u8 type; 364 u32 id; 365 u64 inst_primary; 366 u32 inst_secondary; 367 u64 base_address0; 368 u64 base_address1; 369 u32 ovflw_irq; 370 u32 reserved; 371 u32 ovflw_irq_flags; 372 u32 proc_affinity; 373 u32 impl_id; 374 }; 375 376 /* Masks for Flags field above */ 377 378 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 379 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 380 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 381 382 /* Values for Flags dual page field above */ 383 384 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 385 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 386 387 /* Values for Flags processor affinity field above */ 388 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 389 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 390 391 /* Values for Flags 64-bit atomic field above */ 392 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 393 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 394 395 /* Values for Type field above */ 396 397 enum acpi_apmt_node_type { 398 ACPI_APMT_NODE_TYPE_MC = 0x00, 399 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 400 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 401 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 402 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 403 ACPI_APMT_NODE_TYPE_COUNT 404 }; 405 406 /* Masks for ovflw_irq_flags field above */ 407 408 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 409 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 410 411 /* Values for ovflw_irq_flags mode field above */ 412 413 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 414 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 415 416 /* Values for ovflw_irq_flags type field above */ 417 418 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 419 420 /******************************************************************************* 421 * 422 * BDAT - BIOS Data ACPI Table 423 * 424 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 425 * Nov 2020 426 * 427 ******************************************************************************/ 428 429 struct acpi_table_bdat { 430 struct acpi_table_header header; 431 struct acpi_generic_address gas; 432 }; 433 434 /******************************************************************************* 435 * 436 * CCEL - CC-Event Log 437 * From: "Guest-Host-Communication Interface (GHCI) for Intel 438 * Trust Domain Extensions (Intel TDX)". Feb 2022 439 * 440 ******************************************************************************/ 441 442 struct acpi_table_ccel { 443 struct acpi_table_header header; /* Common ACPI table header */ 444 u8 CCtype; 445 u8 Ccsub_type; 446 u16 reserved; 447 u64 log_area_minimum_length; 448 u64 log_area_start_address; 449 }; 450 451 /******************************************************************************* 452 * 453 * IORT - IO Remapping Table 454 * 455 * Conforms to "IO Remapping Table System Software on ARM Platforms", 456 * Document number: ARM DEN 0049E.f, Apr 2024 457 * 458 ******************************************************************************/ 459 460 struct acpi_table_iort { 461 struct acpi_table_header header; 462 u32 node_count; 463 u32 node_offset; 464 u32 reserved; 465 }; 466 467 /* 468 * IORT subtables 469 */ 470 struct acpi_iort_node { 471 u8 type; 472 u16 length; 473 u8 revision; 474 u32 identifier; 475 u32 mapping_count; 476 u32 mapping_offset; 477 char node_data[]; 478 }; 479 480 /* Values for subtable Type above */ 481 482 enum acpi_iort_node_type { 483 ACPI_IORT_NODE_ITS_GROUP = 0x00, 484 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 485 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 486 ACPI_IORT_NODE_SMMU = 0x03, 487 ACPI_IORT_NODE_SMMU_V3 = 0x04, 488 ACPI_IORT_NODE_PMCG = 0x05, 489 ACPI_IORT_NODE_RMR = 0x06, 490 }; 491 492 struct acpi_iort_id_mapping { 493 u32 input_base; /* Lowest value in input range */ 494 u32 id_count; /* Number of IDs */ 495 u32 output_base; /* Lowest value in output range */ 496 u32 output_reference; /* A reference to the output node */ 497 u32 flags; 498 }; 499 500 /* Masks for Flags field above for IORT subtable */ 501 502 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 503 504 struct acpi_iort_memory_access { 505 u32 cache_coherency; 506 u8 hints; 507 u16 reserved; 508 u8 memory_flags; 509 }; 510 511 /* Values for cache_coherency field above */ 512 513 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 514 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 515 516 /* Masks for Hints field above */ 517 518 #define ACPI_IORT_HT_TRANSIENT (1) 519 #define ACPI_IORT_HT_WRITE (1<<1) 520 #define ACPI_IORT_HT_READ (1<<2) 521 #define ACPI_IORT_HT_OVERRIDE (1<<3) 522 523 /* Masks for memory_flags field above */ 524 525 #define ACPI_IORT_MF_COHERENCY (1) 526 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 527 #define ACPI_IORT_MF_CANWBS (1<<2) 528 529 /* 530 * IORT node specific subtables 531 */ 532 struct acpi_iort_its_group { 533 u32 its_count; 534 u32 identifiers[]; /* GIC ITS identifier array */ 535 }; 536 537 struct acpi_iort_named_component { 538 u32 node_flags; 539 u64 memory_properties; /* Memory access properties */ 540 u8 memory_address_limit; /* Memory address size limit */ 541 char device_name[]; /* Path of namespace object */ 542 }; 543 544 /* Masks for Flags field above */ 545 546 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 547 #define ACPI_IORT_NC_PASID_BITS (31<<1) 548 549 struct acpi_iort_root_complex { 550 u64 memory_properties; /* Memory access properties */ 551 u32 ats_attribute; 552 u32 pci_segment_number; 553 u8 memory_address_limit; /* Memory address size limit */ 554 u16 pasid_capabilities; /* PASID Capabilities */ 555 u8 reserved[]; /* Reserved, must be zero */ 556 }; 557 558 /* Masks for ats_attribute field above */ 559 560 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 561 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 562 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 563 564 /* Masks for pasid_capabilities field above */ 565 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 566 567 struct acpi_iort_smmu { 568 u64 base_address; /* SMMU base address */ 569 u64 span; /* Length of memory range */ 570 u32 model; 571 u32 flags; 572 u32 global_interrupt_offset; 573 u32 context_interrupt_count; 574 u32 context_interrupt_offset; 575 u32 pmu_interrupt_count; 576 u32 pmu_interrupt_offset; 577 u64 interrupts[]; /* Interrupt array */ 578 }; 579 580 /* Values for Model field above */ 581 582 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 583 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 584 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 585 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 586 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 587 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */ 588 589 /* Masks for Flags field above */ 590 591 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 592 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 593 594 /* Global interrupt format */ 595 596 struct acpi_iort_smmu_gsi { 597 u32 nsg_irpt; 598 u32 nsg_irpt_flags; 599 u32 nsg_cfg_irpt; 600 u32 nsg_cfg_irpt_flags; 601 }; 602 603 struct acpi_iort_smmu_v3 { 604 u64 base_address; /* SMMUv3 base address */ 605 u32 flags; 606 u32 reserved; 607 u64 vatos_address; 608 u32 model; 609 u32 event_gsiv; 610 u32 pri_gsiv; 611 u32 gerr_gsiv; 612 u32 sync_gsiv; 613 u32 pxm; 614 u32 id_mapping_index; 615 }; 616 617 /* Values for Model field above */ 618 619 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 620 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */ 621 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 622 623 /* Masks for Flags field above */ 624 625 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 626 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 627 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 628 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4) 629 630 struct acpi_iort_pmcg { 631 u64 page0_base_address; 632 u32 overflow_gsiv; 633 u32 node_reference; 634 u64 page1_base_address; 635 }; 636 637 struct acpi_iort_rmr { 638 u32 flags; 639 u32 rmr_count; 640 u32 rmr_offset; 641 }; 642 643 /* Masks for Flags field above */ 644 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 645 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 646 647 /* 648 * Macro to access the Access Attributes in flags field above: 649 * Access Attributes is encoded in bits 9:2 650 */ 651 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 652 653 /* Values for above Access Attributes */ 654 655 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 656 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 657 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 658 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 659 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 660 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 661 662 struct acpi_iort_rmr_desc { 663 u64 base_address; 664 u64 length; 665 u32 reserved; 666 }; 667 668 /******************************************************************************* 669 * 670 * IVRS - I/O Virtualization Reporting Structure 671 * Version 1 672 * 673 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 674 * Revision 1.26, February 2009. 675 * 676 ******************************************************************************/ 677 678 struct acpi_table_ivrs { 679 struct acpi_table_header header; /* Common ACPI table header */ 680 u32 info; /* Common virtualization info */ 681 u64 reserved; 682 }; 683 684 /* Values for Info field above */ 685 686 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 687 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 688 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 689 690 /* IVRS subtable header */ 691 692 struct acpi_ivrs_header { 693 u8 type; /* Subtable type */ 694 u8 flags; 695 u16 length; /* Subtable length */ 696 u16 device_id; /* ID of IOMMU */ 697 }; 698 699 /* Values for subtable Type above */ 700 701 enum acpi_ivrs_type { 702 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 703 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 704 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 705 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 706 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 707 ACPI_IVRS_TYPE_MEMORY3 = 0x22 708 }; 709 710 /* Masks for Flags field above for IVHD subtable */ 711 712 #define ACPI_IVHD_TT_ENABLE (1) 713 #define ACPI_IVHD_PASS_PW (1<<1) 714 #define ACPI_IVHD_RES_PASS_PW (1<<2) 715 #define ACPI_IVHD_ISOC (1<<3) 716 #define ACPI_IVHD_IOTLB (1<<4) 717 718 /* Masks for Flags field above for IVMD subtable */ 719 720 #define ACPI_IVMD_UNITY (1) 721 #define ACPI_IVMD_READ (1<<1) 722 #define ACPI_IVMD_WRITE (1<<2) 723 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 724 725 /* 726 * IVRS subtables, correspond to Type in struct acpi_ivrs_header 727 */ 728 729 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 730 731 struct acpi_ivrs_hardware_10 { 732 struct acpi_ivrs_header header; 733 u16 capability_offset; /* Offset for IOMMU control fields */ 734 u64 base_address; /* IOMMU control registers */ 735 u16 pci_segment_group; 736 u16 info; /* MSI number and unit ID */ 737 u32 feature_reporting; 738 }; 739 740 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 741 742 struct acpi_ivrs_hardware_11 { 743 struct acpi_ivrs_header header; 744 u16 capability_offset; /* Offset for IOMMU control fields */ 745 u64 base_address; /* IOMMU control registers */ 746 u16 pci_segment_group; 747 u16 info; /* MSI number and unit ID */ 748 u32 attributes; 749 u64 efr_register_image; 750 u64 reserved; 751 }; 752 753 /* Masks for Info field above */ 754 755 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 756 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */ 757 758 /* 759 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure. 760 * Upper two bits of the Type field are the (encoded) length of the structure. 761 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 762 * are reserved for future use but not defined. 763 */ 764 struct acpi_ivrs_de_header { 765 u8 type; 766 u16 id; 767 u8 data_setting; 768 }; 769 770 /* Length of device entry is in the top two bits of Type field above */ 771 772 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 773 774 /* Values for device entry Type field above */ 775 776 enum acpi_ivrs_device_entry_type { 777 /* 4-byte device entries, all use struct acpi_ivrs_device4 */ 778 779 ACPI_IVRS_TYPE_PAD4 = 0, 780 ACPI_IVRS_TYPE_ALL = 1, 781 ACPI_IVRS_TYPE_SELECT = 2, 782 ACPI_IVRS_TYPE_START = 3, 783 ACPI_IVRS_TYPE_END = 4, 784 785 /* 8-byte device entries */ 786 787 ACPI_IVRS_TYPE_PAD8 = 64, 788 ACPI_IVRS_TYPE_NOT_USED = 65, 789 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */ 790 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */ 791 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */ 792 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */ 793 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */ 794 795 /* Variable-length device entries */ 796 797 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 798 }; 799 800 /* Values for Data field above */ 801 802 #define ACPI_IVHD_INIT_PASS (1) 803 #define ACPI_IVHD_EINT_PASS (1<<1) 804 #define ACPI_IVHD_NMI_PASS (1<<2) 805 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 806 #define ACPI_IVHD_LINT0_PASS (1<<6) 807 #define ACPI_IVHD_LINT1_PASS (1<<7) 808 809 /* Types 0-4: 4-byte device entry */ 810 811 struct acpi_ivrs_device4 { 812 struct acpi_ivrs_de_header header; 813 }; 814 815 /* Types 66-67: 8-byte device entry */ 816 817 struct acpi_ivrs_device8a { 818 struct acpi_ivrs_de_header header; 819 u8 reserved1; 820 u16 used_id; 821 u8 reserved2; 822 }; 823 824 /* Types 70-71: 8-byte device entry */ 825 826 struct acpi_ivrs_device8b { 827 struct acpi_ivrs_de_header header; 828 u32 extended_data; 829 }; 830 831 /* Values for extended_data above */ 832 833 #define ACPI_IVHD_ATS_DISABLED (1<<31) 834 835 /* Type 72: 8-byte device entry */ 836 837 struct acpi_ivrs_device8c { 838 struct acpi_ivrs_de_header header; 839 u8 handle; 840 u16 used_id; 841 u8 variety; 842 }; 843 844 /* Values for Variety field above */ 845 846 #define ACPI_IVHD_IOAPIC 1 847 #define ACPI_IVHD_HPET 2 848 849 /* Type 240: variable-length device entry */ 850 851 struct acpi_ivrs_device_hid { 852 struct acpi_ivrs_de_header header; 853 u64 acpi_hid; 854 u64 acpi_cid; 855 u8 uid_type; 856 u8 uid_length; 857 }; 858 859 /* Values for uid_type above */ 860 861 #define ACPI_IVRS_UID_NOT_PRESENT 0 862 #define ACPI_IVRS_UID_IS_INTEGER 1 863 #define ACPI_IVRS_UID_IS_STRING 2 864 865 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 866 867 struct acpi_ivrs_memory { 868 struct acpi_ivrs_header header; 869 u16 aux_data; 870 u64 reserved; 871 u64 start_address; 872 u64 memory_length; 873 }; 874 875 /******************************************************************************* 876 * 877 * LPIT - Low Power Idle Table 878 * 879 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 880 * 881 ******************************************************************************/ 882 883 struct acpi_table_lpit { 884 struct acpi_table_header header; /* Common ACPI table header */ 885 }; 886 887 /* LPIT subtable header */ 888 889 struct acpi_lpit_header { 890 u32 type; /* Subtable type */ 891 u32 length; /* Subtable length */ 892 u16 unique_id; 893 u16 reserved; 894 u32 flags; 895 }; 896 897 /* Values for subtable Type above */ 898 899 enum acpi_lpit_type { 900 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 901 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 902 }; 903 904 /* Masks for Flags field above */ 905 906 #define ACPI_LPIT_STATE_DISABLED (1) 907 #define ACPI_LPIT_NO_COUNTER (1<<1) 908 909 /* 910 * LPIT subtables, correspond to Type in struct acpi_lpit_header 911 */ 912 913 /* 0x00: Native C-state instruction based LPI structure */ 914 915 struct acpi_lpit_native { 916 struct acpi_lpit_header header; 917 struct acpi_generic_address entry_trigger; 918 u32 residency; 919 u32 latency; 920 struct acpi_generic_address residency_counter; 921 u64 counter_frequency; 922 }; 923 924 /******************************************************************************* 925 * 926 * MADT - Multiple APIC Description Table 927 * Version 3 928 * 929 ******************************************************************************/ 930 931 struct acpi_table_madt { 932 struct acpi_table_header header; /* Common ACPI table header */ 933 u32 address; /* Physical address of local APIC */ 934 u32 flags; 935 }; 936 937 /* Masks for Flags field above */ 938 939 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 940 941 /* Values for PCATCompat flag */ 942 943 #define ACPI_MADT_DUAL_PIC 1 944 #define ACPI_MADT_MULTIPLE_APIC 0 945 946 /* Values for MADT subtable type in struct acpi_subtable_header */ 947 948 enum acpi_madt_type { 949 ACPI_MADT_TYPE_LOCAL_APIC = 0, 950 ACPI_MADT_TYPE_IO_APIC = 1, 951 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 952 ACPI_MADT_TYPE_NMI_SOURCE = 3, 953 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 954 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 955 ACPI_MADT_TYPE_IO_SAPIC = 6, 956 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 957 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 958 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 959 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 960 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 961 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 962 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 963 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 964 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 965 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 966 ACPI_MADT_TYPE_CORE_PIC = 17, 967 ACPI_MADT_TYPE_LIO_PIC = 18, 968 ACPI_MADT_TYPE_HT_PIC = 19, 969 ACPI_MADT_TYPE_EIO_PIC = 20, 970 ACPI_MADT_TYPE_MSI_PIC = 21, 971 ACPI_MADT_TYPE_BIO_PIC = 22, 972 ACPI_MADT_TYPE_LPC_PIC = 23, 973 ACPI_MADT_TYPE_RINTC = 24, 974 ACPI_MADT_TYPE_IMSIC = 25, 975 ACPI_MADT_TYPE_APLIC = 26, 976 ACPI_MADT_TYPE_PLIC = 27, 977 ACPI_MADT_TYPE_RESERVED = 28, /* 28 to 0x7F are reserved */ 978 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 979 }; 980 981 /* 982 * MADT Subtables, correspond to Type in struct acpi_subtable_header 983 */ 984 985 /* 0: Processor Local APIC */ 986 987 struct acpi_madt_local_apic { 988 struct acpi_subtable_header header; 989 u8 processor_id; /* ACPI processor id */ 990 u8 id; /* Processor's local APIC id */ 991 u32 lapic_flags; 992 }; 993 994 /* 1: IO APIC */ 995 996 struct acpi_madt_io_apic { 997 struct acpi_subtable_header header; 998 u8 id; /* I/O APIC ID */ 999 u8 reserved; /* reserved - must be zero */ 1000 u32 address; /* APIC physical address */ 1001 u32 global_irq_base; /* Global system interrupt where INTI lines start */ 1002 }; 1003 1004 /* 2: Interrupt Override */ 1005 1006 struct acpi_madt_interrupt_override { 1007 struct acpi_subtable_header header; 1008 u8 bus; /* 0 - ISA */ 1009 u8 source_irq; /* Interrupt source (IRQ) */ 1010 u32 global_irq; /* Global system interrupt */ 1011 u16 inti_flags; 1012 }; 1013 1014 /* 3: NMI Source */ 1015 1016 struct acpi_madt_nmi_source { 1017 struct acpi_subtable_header header; 1018 u16 inti_flags; 1019 u32 global_irq; /* Global system interrupt */ 1020 }; 1021 1022 /* 4: Local APIC NMI */ 1023 1024 struct acpi_madt_local_apic_nmi { 1025 struct acpi_subtable_header header; 1026 u8 processor_id; /* ACPI processor id */ 1027 u16 inti_flags; 1028 u8 lint; /* LINTn to which NMI is connected */ 1029 }; 1030 1031 /* 5: Address Override */ 1032 1033 struct acpi_madt_local_apic_override { 1034 struct acpi_subtable_header header; 1035 u16 reserved; /* Reserved, must be zero */ 1036 u64 address; /* APIC physical address */ 1037 }; 1038 1039 /* 6: I/O Sapic */ 1040 1041 struct acpi_madt_io_sapic { 1042 struct acpi_subtable_header header; 1043 u8 id; /* I/O SAPIC ID */ 1044 u8 reserved; /* Reserved, must be zero */ 1045 u32 global_irq_base; /* Global interrupt for SAPIC start */ 1046 u64 address; /* SAPIC physical address */ 1047 }; 1048 1049 /* 7: Local Sapic */ 1050 1051 struct acpi_madt_local_sapic { 1052 struct acpi_subtable_header header; 1053 u8 processor_id; /* ACPI processor id */ 1054 u8 id; /* SAPIC ID */ 1055 u8 eid; /* SAPIC EID */ 1056 u8 reserved[3]; /* Reserved, must be zero */ 1057 u32 lapic_flags; 1058 u32 uid; /* Numeric UID - ACPI 3.0 */ 1059 char uid_string[]; /* String UID - ACPI 3.0 */ 1060 }; 1061 1062 /* 8: Platform Interrupt Source */ 1063 1064 struct acpi_madt_interrupt_source { 1065 struct acpi_subtable_header header; 1066 u16 inti_flags; 1067 u8 type; /* 1=PMI, 2=INIT, 3=corrected */ 1068 u8 id; /* Processor ID */ 1069 u8 eid; /* Processor EID */ 1070 u8 io_sapic_vector; /* Vector value for PMI interrupts */ 1071 u32 global_irq; /* Global system interrupt */ 1072 u32 flags; /* Interrupt Source Flags */ 1073 }; 1074 1075 /* Masks for Flags field above */ 1076 1077 #define ACPI_MADT_CPEI_OVERRIDE (1) 1078 1079 /* 9: Processor Local X2APIC (ACPI 4.0) */ 1080 1081 struct acpi_madt_local_x2apic { 1082 struct acpi_subtable_header header; 1083 u16 reserved; /* reserved - must be zero */ 1084 u32 local_apic_id; /* Processor x2APIC ID */ 1085 u32 lapic_flags; 1086 u32 uid; /* ACPI processor UID */ 1087 }; 1088 1089 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1090 1091 struct acpi_madt_local_x2apic_nmi { 1092 struct acpi_subtable_header header; 1093 u16 inti_flags; 1094 u32 uid; /* ACPI processor UID */ 1095 u8 lint; /* LINTn to which NMI is connected */ 1096 u8 reserved[3]; /* reserved - must be zero */ 1097 }; 1098 1099 /* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */ 1100 1101 struct acpi_madt_generic_interrupt { 1102 struct acpi_subtable_header header; 1103 u16 reserved; /* reserved - must be zero */ 1104 u32 cpu_interface_number; 1105 u32 uid; 1106 u32 flags; 1107 u32 parking_version; 1108 u32 performance_interrupt; 1109 u64 parked_address; 1110 u64 base_address; 1111 u64 gicv_base_address; 1112 u64 gich_base_address; 1113 u32 vgic_interrupt; 1114 u64 gicr_base_address; 1115 u64 arm_mpidr; 1116 u8 efficiency_class; 1117 u8 reserved2[1]; 1118 u16 spe_interrupt; /* ACPI 6.3 */ 1119 u16 trbe_interrupt; /* ACPI 6.5 */ 1120 }; 1121 1122 /* Masks for Flags field above */ 1123 1124 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1125 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1126 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1127 #define ACPI_MADT_GICC_ONLINE_CAPABLE (1<<3) /* 03: Processor is online capable */ 1128 #define ACPI_MADT_GICC_NON_COHERENT (1<<4) /* 04: GIC redistributor is not coherent */ 1129 1130 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1131 1132 struct acpi_madt_generic_distributor { 1133 struct acpi_subtable_header header; 1134 u16 reserved; /* reserved - must be zero */ 1135 u32 gic_id; 1136 u64 base_address; 1137 u32 global_irq_base; 1138 u8 version; 1139 u8 reserved2[3]; /* reserved - must be zero */ 1140 }; 1141 1142 /* Values for Version field above */ 1143 1144 enum acpi_madt_gic_version { 1145 ACPI_MADT_GIC_VERSION_NONE = 0, 1146 ACPI_MADT_GIC_VERSION_V1 = 1, 1147 ACPI_MADT_GIC_VERSION_V2 = 2, 1148 ACPI_MADT_GIC_VERSION_V3 = 3, 1149 ACPI_MADT_GIC_VERSION_V4 = 4, 1150 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1151 }; 1152 1153 /* 13: Generic MSI Frame (ACPI 5.1) */ 1154 1155 struct acpi_madt_generic_msi_frame { 1156 struct acpi_subtable_header header; 1157 u16 reserved; /* reserved - must be zero */ 1158 u32 msi_frame_id; 1159 u64 base_address; 1160 u32 flags; 1161 u16 spi_count; 1162 u16 spi_base; 1163 }; 1164 1165 /* Masks for Flags field above */ 1166 1167 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1168 1169 /* 14: Generic Redistributor (ACPI 5.1) */ 1170 1171 struct acpi_madt_generic_redistributor { 1172 struct acpi_subtable_header header; 1173 u8 flags; 1174 u8 reserved; /* reserved - must be zero */ 1175 u64 base_address; 1176 u32 length; 1177 }; 1178 1179 #define ACPI_MADT_GICR_NON_COHERENT (1) 1180 1181 /* 15: Generic Translator (ACPI 6.0) */ 1182 1183 struct acpi_madt_generic_translator { 1184 struct acpi_subtable_header header; 1185 u8 flags; 1186 u8 reserved; /* reserved - must be zero */ 1187 u32 translation_id; 1188 u64 base_address; 1189 u32 reserved2; 1190 }; 1191 1192 #define ACPI_MADT_ITS_NON_COHERENT (1) 1193 1194 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1195 1196 struct acpi_madt_multiproc_wakeup { 1197 struct acpi_subtable_header header; 1198 u16 version; 1199 u32 reserved; /* reserved - must be zero */ 1200 u64 mailbox_address; 1201 u64 reset_vector; 1202 }; 1203 1204 /* Values for Version field above */ 1205 1206 enum acpi_madt_multiproc_wakeup_version { 1207 ACPI_MADT_MP_WAKEUP_VERSION_NONE = 0, 1208 ACPI_MADT_MP_WAKEUP_VERSION_V1 = 1, 1209 ACPI_MADT_MP_WAKEUP_VERSION_RESERVED = 2, /* 2 and greater are reserved */ 1210 }; 1211 1212 #define ACPI_MADT_MP_WAKEUP_SIZE_V0 16 1213 #define ACPI_MADT_MP_WAKEUP_SIZE_V1 24 1214 1215 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1216 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1217 1218 struct acpi_madt_multiproc_wakeup_mailbox { 1219 u16 command; 1220 u16 reserved; /* reserved - must be zero */ 1221 u32 apic_id; 1222 u64 wakeup_vector; 1223 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1224 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1225 }; 1226 1227 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1228 #define ACPI_MP_WAKE_COMMAND_TEST 2 1229 1230 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */ 1231 1232 struct acpi_madt_core_pic { 1233 struct acpi_subtable_header header; 1234 u8 version; 1235 u32 processor_id; 1236 u32 core_id; 1237 u32 flags; 1238 }; 1239 1240 /* Values for Version field above */ 1241 1242 enum acpi_madt_core_pic_version { 1243 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 1244 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 1245 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1246 }; 1247 1248 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */ 1249 1250 struct acpi_madt_lio_pic { 1251 struct acpi_subtable_header header; 1252 u8 version; 1253 u64 address; 1254 u16 size; 1255 u8 cascade[2]; 1256 u32 cascade_map[2]; 1257 }; 1258 1259 /* Values for Version field above */ 1260 1261 enum acpi_madt_lio_pic_version { 1262 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 1263 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 1264 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1265 }; 1266 1267 /* 19: HT Interrupt Controller (ACPI 6.5) */ 1268 1269 struct acpi_madt_ht_pic { 1270 struct acpi_subtable_header header; 1271 u8 version; 1272 u64 address; 1273 u16 size; 1274 u8 cascade[8]; 1275 }; 1276 1277 /* Values for Version field above */ 1278 1279 enum acpi_madt_ht_pic_version { 1280 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 1281 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 1282 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1283 }; 1284 1285 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */ 1286 1287 struct acpi_madt_eio_pic { 1288 struct acpi_subtable_header header; 1289 u8 version; 1290 u8 cascade; 1291 u8 node; 1292 u64 node_map; 1293 }; 1294 1295 /* Values for Version field above */ 1296 1297 enum acpi_madt_eio_pic_version { 1298 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 1299 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 1300 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1301 }; 1302 1303 /* 21: MSI Interrupt Controller (ACPI 6.5) */ 1304 1305 struct acpi_madt_msi_pic { 1306 struct acpi_subtable_header header; 1307 u8 version; 1308 u64 msg_address; 1309 u32 start; 1310 u32 count; 1311 }; 1312 1313 /* Values for Version field above */ 1314 1315 enum acpi_madt_msi_pic_version { 1316 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 1317 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 1318 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1319 }; 1320 1321 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */ 1322 1323 struct acpi_madt_bio_pic { 1324 struct acpi_subtable_header header; 1325 u8 version; 1326 u64 address; 1327 u16 size; 1328 u16 id; 1329 u16 gsi_base; 1330 }; 1331 1332 /* Values for Version field above */ 1333 1334 enum acpi_madt_bio_pic_version { 1335 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 1336 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 1337 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1338 }; 1339 1340 /* 23: LPC Interrupt Controller (ACPI 6.5) */ 1341 1342 struct acpi_madt_lpc_pic { 1343 struct acpi_subtable_header header; 1344 u8 version; 1345 u64 address; 1346 u16 size; 1347 u8 cascade; 1348 }; 1349 1350 /* Values for Version field above */ 1351 1352 enum acpi_madt_lpc_pic_version { 1353 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 1354 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 1355 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1356 }; 1357 1358 /* 24: RISC-V INTC */ 1359 struct acpi_madt_rintc { 1360 struct acpi_subtable_header header; 1361 u8 version; 1362 u8 reserved; 1363 u32 flags; 1364 u64 hart_id; 1365 u32 uid; /* ACPI processor UID */ 1366 u32 ext_intc_id; /* External INTC Id */ 1367 u64 imsic_addr; /* IMSIC base address */ 1368 u32 imsic_size; /* IMSIC size */ 1369 }; 1370 1371 /* Values for RISC-V INTC Version field above */ 1372 1373 enum acpi_madt_rintc_version { 1374 ACPI_MADT_RINTC_VERSION_NONE = 0, 1375 ACPI_MADT_RINTC_VERSION_V1 = 1, 1376 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1377 }; 1378 1379 /* 25: RISC-V IMSIC */ 1380 struct acpi_madt_imsic { 1381 struct acpi_subtable_header header; 1382 u8 version; 1383 u8 reserved; 1384 u32 flags; 1385 u16 num_ids; 1386 u16 num_guest_ids; 1387 u8 guest_index_bits; 1388 u8 hart_index_bits; 1389 u8 group_index_bits; 1390 u8 group_index_shift; 1391 }; 1392 1393 /* 26: RISC-V APLIC */ 1394 struct acpi_madt_aplic { 1395 struct acpi_subtable_header header; 1396 u8 version; 1397 u8 id; 1398 u32 flags; 1399 u8 hw_id[8]; 1400 u16 num_idcs; 1401 u16 num_sources; 1402 u32 gsi_base; 1403 u64 base_addr; 1404 u32 size; 1405 }; 1406 1407 /* 27: RISC-V PLIC */ 1408 struct acpi_madt_plic { 1409 struct acpi_subtable_header header; 1410 u8 version; 1411 u8 id; 1412 u8 hw_id[8]; 1413 u16 num_irqs; 1414 u16 max_prio; 1415 u32 flags; 1416 u32 size; 1417 u64 base_addr; 1418 u32 gsi_base; 1419 }; 1420 1421 /* 80: OEM data */ 1422 1423 struct acpi_madt_oem_data { 1424 ACPI_FLEX_ARRAY(u8, oem_data); 1425 }; 1426 1427 /* 1428 * Common flags fields for MADT subtables 1429 */ 1430 1431 /* MADT Local APIC flags */ 1432 1433 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1434 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1435 1436 /* MADT MPS INTI flags (inti_flags) */ 1437 1438 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1439 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1440 1441 /* Values for MPS INTI flags */ 1442 1443 #define ACPI_MADT_POLARITY_CONFORMS 0 1444 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1445 #define ACPI_MADT_POLARITY_RESERVED 2 1446 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1447 1448 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1449 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1450 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1451 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1452 1453 /******************************************************************************* 1454 * 1455 * MCFG - PCI Memory Mapped Configuration table and subtable 1456 * Version 1 1457 * 1458 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1459 * 1460 ******************************************************************************/ 1461 1462 struct acpi_table_mcfg { 1463 struct acpi_table_header header; /* Common ACPI table header */ 1464 u8 reserved[8]; 1465 }; 1466 1467 /* Subtable */ 1468 1469 struct acpi_mcfg_allocation { 1470 u64 address; /* Base address, processor-relative */ 1471 u16 pci_segment; /* PCI segment group number */ 1472 u8 start_bus_number; /* Starting PCI Bus number */ 1473 u8 end_bus_number; /* Final PCI Bus number */ 1474 u32 reserved; 1475 }; 1476 1477 /******************************************************************************* 1478 * 1479 * MCHI - Management Controller Host Interface Table 1480 * Version 1 1481 * 1482 * Conforms to "Management Component Transport Protocol (MCTP) Host 1483 * Interface Specification", Revision 1.0.0a, October 13, 2009 1484 * 1485 ******************************************************************************/ 1486 1487 struct acpi_table_mchi { 1488 struct acpi_table_header header; /* Common ACPI table header */ 1489 u8 interface_type; 1490 u8 protocol; 1491 u64 protocol_data; 1492 u8 interrupt_type; 1493 u8 gpe; 1494 u8 pci_device_flag; 1495 u32 global_interrupt; 1496 struct acpi_generic_address control_register; 1497 u8 pci_segment; 1498 u8 pci_bus; 1499 u8 pci_device; 1500 u8 pci_function; 1501 }; 1502 1503 /******************************************************************************* 1504 * 1505 * MPAM - Memory System Resource Partitioning and Monitoring 1506 * 1507 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0" 1508 * Document number: ARM DEN 0065, December, 2022. 1509 * 1510 ******************************************************************************/ 1511 1512 /* MPAM RIS locator types. Table 11, Location types */ 1513 enum acpi_mpam_locator_type { 1514 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0, 1515 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1, 1516 ACPI_MPAM_LOCATION_TYPE_SMMU = 2, 1517 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3, 1518 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4, 1519 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5, 1520 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF 1521 }; 1522 1523 /* MPAM Functional dependency descriptor. Table 10 */ 1524 struct acpi_mpam_func_deps { 1525 u32 producer; 1526 u32 reserved; 1527 }; 1528 1529 /* MPAM Processor cache locator descriptor. Table 13 */ 1530 struct acpi_mpam_resource_cache_locator { 1531 u64 cache_reference; 1532 u32 reserved; 1533 }; 1534 1535 /* MPAM Memory locator descriptor. Table 14 */ 1536 struct acpi_mpam_resource_memory_locator { 1537 u64 proximity_domain; 1538 u32 reserved; 1539 }; 1540 1541 /* MPAM SMMU locator descriptor. Table 15 */ 1542 struct acpi_mpam_resource_smmu_locator { 1543 u64 smmu_interface; 1544 u32 reserved; 1545 }; 1546 1547 /* MPAM Memory-side cache locator descriptor. Table 16 */ 1548 struct acpi_mpam_resource_memcache_locator { 1549 u8 reserved[7]; 1550 u8 level; 1551 u32 reference; 1552 }; 1553 1554 /* MPAM ACPI device locator descriptor. Table 17 */ 1555 struct acpi_mpam_resource_acpi_locator { 1556 u64 acpi_hw_id; 1557 u32 acpi_unique_id; 1558 }; 1559 1560 /* MPAM Interconnect locator descriptor. Table 18 */ 1561 struct acpi_mpam_resource_interconnect_locator { 1562 u64 inter_connect_desc_tbl_off; 1563 u32 reserved; 1564 }; 1565 1566 /* MPAM Locator structure. Table 12 */ 1567 struct acpi_mpam_resource_generic_locator { 1568 u64 descriptor1; 1569 u32 descriptor2; 1570 }; 1571 1572 union acpi_mpam_resource_locator { 1573 struct acpi_mpam_resource_cache_locator cache_locator; 1574 struct acpi_mpam_resource_memory_locator memory_locator; 1575 struct acpi_mpam_resource_smmu_locator smmu_locator; 1576 struct acpi_mpam_resource_memcache_locator mem_cache_locator; 1577 struct acpi_mpam_resource_acpi_locator acpi_locator; 1578 struct acpi_mpam_resource_interconnect_locator interconnect_ifc_locator; 1579 struct acpi_mpam_resource_generic_locator generic_locator; 1580 }; 1581 1582 /* Memory System Component Resource Node Structure Table 9 */ 1583 struct acpi_mpam_resource_node { 1584 u32 identifier; 1585 u8 ris_index; 1586 u16 reserved1; 1587 u8 locator_type; 1588 union acpi_mpam_resource_locator locator; 1589 u32 num_functional_deps; 1590 }; 1591 1592 /* Memory System Component (MSC) Node Structure. Table 4 */ 1593 struct acpi_mpam_msc_node { 1594 u16 length; 1595 u8 interface_type; 1596 u8 reserved; 1597 u32 identifier; 1598 u64 base_address; 1599 u32 mmio_size; 1600 u32 overflow_interrupt; 1601 u32 overflow_interrupt_flags; 1602 u32 reserved1; 1603 u32 overflow_interrupt_affinity; 1604 u32 error_interrupt; 1605 u32 error_interrupt_flags; 1606 u32 reserved2; 1607 u32 error_interrupt_affinity; 1608 u32 max_nrdy_usec; 1609 u64 hardware_id_linked_device; 1610 u32 instance_id_linked_device; 1611 u32 num_resource_nodes; 1612 }; 1613 1614 struct acpi_table_mpam { 1615 struct acpi_table_header header; /* Common ACPI table header */ 1616 }; 1617 1618 /******************************************************************************* 1619 * 1620 * MPST - Memory Power State Table (ACPI 5.0) 1621 * Version 1 1622 * 1623 ******************************************************************************/ 1624 1625 #define ACPI_MPST_CHANNEL_INFO \ 1626 u8 channel_id; \ 1627 u8 reserved1[3]; \ 1628 u16 power_node_count; \ 1629 u16 reserved2; 1630 1631 /* Main table */ 1632 1633 struct acpi_table_mpst { 1634 struct acpi_table_header header; /* Common ACPI table header */ 1635 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1636 }; 1637 1638 /* Memory Platform Communication Channel Info */ 1639 1640 struct acpi_mpst_channel { 1641 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1642 }; 1643 1644 /* Memory Power Node Structure */ 1645 1646 struct acpi_mpst_power_node { 1647 u8 flags; 1648 u8 reserved1; 1649 u16 node_id; 1650 u32 length; 1651 u64 range_address; 1652 u64 range_length; 1653 u32 num_power_states; 1654 u32 num_physical_components; 1655 }; 1656 1657 /* Values for Flags field above */ 1658 1659 #define ACPI_MPST_ENABLED 1 1660 #define ACPI_MPST_POWER_MANAGED 2 1661 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1662 1663 /* Memory Power State Structure (follows POWER_NODE above) */ 1664 1665 struct acpi_mpst_power_state { 1666 u8 power_state; 1667 u8 info_index; 1668 }; 1669 1670 /* Physical Component ID Structure (follows POWER_STATE above) */ 1671 1672 struct acpi_mpst_component { 1673 u16 component_id; 1674 }; 1675 1676 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1677 1678 struct acpi_mpst_data_hdr { 1679 u16 characteristics_count; 1680 u16 reserved; 1681 }; 1682 1683 struct acpi_mpst_power_data { 1684 u8 structure_id; 1685 u8 flags; 1686 u16 reserved1; 1687 u32 average_power; 1688 u32 power_saving; 1689 u64 exit_latency; 1690 u64 reserved2; 1691 }; 1692 1693 /* Values for Flags field above */ 1694 1695 #define ACPI_MPST_PRESERVE 1 1696 #define ACPI_MPST_AUTOENTRY 2 1697 #define ACPI_MPST_AUTOEXIT 4 1698 1699 /* Shared Memory Region (not part of an ACPI table) */ 1700 1701 struct acpi_mpst_shared { 1702 u32 signature; 1703 u16 pcc_command; 1704 u16 pcc_status; 1705 u32 command_register; 1706 u32 status_register; 1707 u32 power_state_id; 1708 u32 power_node_id; 1709 u64 energy_consumed; 1710 u64 average_power; 1711 }; 1712 1713 /******************************************************************************* 1714 * 1715 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1716 * Version 1 1717 * 1718 ******************************************************************************/ 1719 1720 struct acpi_table_msct { 1721 struct acpi_table_header header; /* Common ACPI table header */ 1722 u32 proximity_offset; /* Location of proximity info struct(s) */ 1723 u32 max_proximity_domains; /* Max number of proximity domains */ 1724 u32 max_clock_domains; /* Max number of clock domains */ 1725 u64 max_address; /* Max physical address in system */ 1726 }; 1727 1728 /* subtable - Maximum Proximity Domain Information. Version 1 */ 1729 1730 struct acpi_msct_proximity { 1731 u8 revision; 1732 u8 length; 1733 u32 range_start; /* Start of domain range */ 1734 u32 range_end; /* End of domain range */ 1735 u32 processor_capacity; 1736 u64 memory_capacity; /* In bytes */ 1737 }; 1738 1739 /******************************************************************************* 1740 * 1741 * MSDM - Microsoft Data Management table 1742 * 1743 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1744 * November 29, 2011. Copyright 2011 Microsoft 1745 * 1746 ******************************************************************************/ 1747 1748 /* Basic MSDM table is only the common ACPI header */ 1749 1750 struct acpi_table_msdm { 1751 struct acpi_table_header header; /* Common ACPI table header */ 1752 }; 1753 1754 /******************************************************************************* 1755 * 1756 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1757 * Version 1 1758 * 1759 ******************************************************************************/ 1760 1761 struct acpi_table_nfit { 1762 struct acpi_table_header header; /* Common ACPI table header */ 1763 u32 reserved; /* Reserved, must be zero */ 1764 }; 1765 1766 /* Subtable header for NFIT */ 1767 1768 struct acpi_nfit_header { 1769 u16 type; 1770 u16 length; 1771 }; 1772 1773 /* Values for subtable type in struct acpi_nfit_header */ 1774 1775 enum acpi_nfit_type { 1776 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1777 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1778 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1779 ACPI_NFIT_TYPE_SMBIOS = 3, 1780 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1781 ACPI_NFIT_TYPE_DATA_REGION = 5, 1782 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1783 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1784 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1785 }; 1786 1787 /* 1788 * NFIT Subtables 1789 */ 1790 1791 /* 0: System Physical Address Range Structure */ 1792 1793 struct acpi_nfit_system_address { 1794 struct acpi_nfit_header header; 1795 u16 range_index; 1796 u16 flags; 1797 u32 reserved; /* Reserved, must be zero */ 1798 u32 proximity_domain; 1799 u8 range_guid[16]; 1800 u64 address; 1801 u64 length; 1802 u64 memory_mapping; 1803 u64 location_cookie; /* ACPI 6.4 */ 1804 }; 1805 1806 /* Flags */ 1807 1808 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1809 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1810 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1811 1812 /* Range Type GUIDs appear in the include/acuuid.h file */ 1813 1814 /* 1: Memory Device to System Address Range Map Structure */ 1815 1816 struct acpi_nfit_memory_map { 1817 struct acpi_nfit_header header; 1818 u32 device_handle; 1819 u16 physical_id; 1820 u16 region_id; 1821 u16 range_index; 1822 u16 region_index; 1823 u64 region_size; 1824 u64 region_offset; 1825 u64 address; 1826 u16 interleave_index; 1827 u16 interleave_ways; 1828 u16 flags; 1829 u16 reserved; /* Reserved, must be zero */ 1830 }; 1831 1832 /* Flags */ 1833 1834 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1835 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1836 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1837 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1838 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1839 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1840 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1841 1842 /* 2: Interleave Structure */ 1843 1844 struct acpi_nfit_interleave { 1845 struct acpi_nfit_header header; 1846 u16 interleave_index; 1847 u16 reserved; /* Reserved, must be zero */ 1848 u32 line_count; 1849 u32 line_size; 1850 u32 line_offset[]; /* Variable length */ 1851 }; 1852 1853 /* 3: SMBIOS Management Information Structure */ 1854 1855 struct acpi_nfit_smbios { 1856 struct acpi_nfit_header header; 1857 u32 reserved; /* Reserved, must be zero */ 1858 u8 data[]; /* Variable length */ 1859 }; 1860 1861 /* 4: NVDIMM Control Region Structure */ 1862 1863 struct acpi_nfit_control_region { 1864 struct acpi_nfit_header header; 1865 u16 region_index; 1866 u16 vendor_id; 1867 u16 device_id; 1868 u16 revision_id; 1869 u16 subsystem_vendor_id; 1870 u16 subsystem_device_id; 1871 u16 subsystem_revision_id; 1872 u8 valid_fields; 1873 u8 manufacturing_location; 1874 u16 manufacturing_date; 1875 u8 reserved[2]; /* Reserved, must be zero */ 1876 u32 serial_number; 1877 u16 code; 1878 u16 windows; 1879 u64 window_size; 1880 u64 command_offset; 1881 u64 command_size; 1882 u64 status_offset; 1883 u64 status_size; 1884 u16 flags; 1885 u8 reserved1[6]; /* Reserved, must be zero */ 1886 }; 1887 1888 /* Flags */ 1889 1890 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1891 1892 /* valid_fields bits */ 1893 1894 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1895 1896 /* 5: NVDIMM Block Data Window Region Structure */ 1897 1898 struct acpi_nfit_data_region { 1899 struct acpi_nfit_header header; 1900 u16 region_index; 1901 u16 windows; 1902 u64 offset; 1903 u64 size; 1904 u64 capacity; 1905 u64 start_address; 1906 }; 1907 1908 /* 6: Flush Hint Address Structure */ 1909 1910 struct acpi_nfit_flush_address { 1911 struct acpi_nfit_header header; 1912 u32 device_handle; 1913 u16 hint_count; 1914 u8 reserved[6]; /* Reserved, must be zero */ 1915 u64 hint_address[]; /* Variable length */ 1916 }; 1917 1918 /* 7: Platform Capabilities Structure */ 1919 1920 struct acpi_nfit_capabilities { 1921 struct acpi_nfit_header header; 1922 u8 highest_capability; 1923 u8 reserved[3]; /* Reserved, must be zero */ 1924 u32 capabilities; 1925 u32 reserved2; 1926 }; 1927 1928 /* Capabilities Flags */ 1929 1930 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1931 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1932 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1933 1934 /* 1935 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1936 */ 1937 struct nfit_device_handle { 1938 u32 handle; 1939 }; 1940 1941 /* Device handle construction and extraction macros */ 1942 1943 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1944 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1945 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1946 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1947 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1948 1949 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1950 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1951 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1952 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1953 #define ACPI_NFIT_NODE_ID_OFFSET 16 1954 1955 /* Macro to construct a NFIT/NVDIMM device handle */ 1956 1957 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1958 ((dimm) | \ 1959 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1960 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1961 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1962 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1963 1964 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1965 1966 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1967 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1968 1969 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1970 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1971 1972 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1973 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1974 1975 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1976 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1977 1978 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1979 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1980 1981 /******************************************************************************* 1982 * 1983 * NHLT - Non HDAudio Link Table 1984 * Version 1 1985 * 1986 ******************************************************************************/ 1987 1988 struct acpi_table_nhlt { 1989 struct acpi_table_header header; /* Common ACPI table header */ 1990 u8 endpoints_count; 1991 /* 1992 * struct acpi_nhlt_endpoint endpoints[]; 1993 * struct acpi_nhlt_config oed_config; 1994 */ 1995 }; 1996 1997 struct acpi_nhlt_endpoint { 1998 u32 length; 1999 u8 link_type; 2000 u8 instance_id; 2001 u16 vendor_id; 2002 u16 device_id; 2003 u16 revision_id; 2004 u32 subsystem_id; 2005 u8 device_type; 2006 u8 direction; 2007 u8 virtual_bus_id; 2008 /* 2009 * struct acpi_nhlt_config device_config; 2010 * struct acpi_nhlt_formats_config formats_config; 2011 * struct acpi_nhlt_devices_info devices_info; 2012 */ 2013 }; 2014 2015 /* 2016 * Values for link_type field above 2017 * 2018 * Only types PDM and SSP are used 2019 */ 2020 #define ACPI_NHLT_LINKTYPE_HDA 0 2021 #define ACPI_NHLT_LINKTYPE_DSP 1 2022 #define ACPI_NHLT_LINKTYPE_PDM 2 2023 #define ACPI_NHLT_LINKTYPE_SSP 3 2024 #define ACPI_NHLT_LINKTYPE_SLIMBUS 4 2025 #define ACPI_NHLT_LINKTYPE_SDW 5 2026 #define ACPI_NHLT_LINKTYPE_UAOL 6 2027 2028 /* Values for device_id field above */ 2029 2030 #define ACPI_NHLT_DEVICEID_DMIC 0xAE20 2031 #define ACPI_NHLT_DEVICEID_BT 0xAE30 2032 #define ACPI_NHLT_DEVICEID_I2S 0xAE34 2033 2034 /* Values for device_type field above */ 2035 2036 /* 2037 * Device types unique to endpoint of link_type=PDM 2038 * 2039 * Type PDM used for all SKL+ platforms 2040 */ 2041 #define ACPI_NHLT_DEVICETYPE_PDM 0 2042 #define ACPI_NHLT_DEVICETYPE_PDM_SKL 1 2043 /* Device types unique to endpoint of link_type=SSP */ 2044 #define ACPI_NHLT_DEVICETYPE_BT 0 2045 #define ACPI_NHLT_DEVICETYPE_FM 1 2046 #define ACPI_NHLT_DEVICETYPE_MODEM 2 2047 #define ACPI_NHLT_DEVICETYPE_CODEC 4 2048 2049 /* Values for Direction field above */ 2050 2051 #define ACPI_NHLT_DIR_RENDER 0 2052 #define ACPI_NHLT_DIR_CAPTURE 1 2053 2054 struct acpi_nhlt_config { 2055 u32 capabilities_size; 2056 u8 capabilities[]; 2057 }; 2058 2059 struct acpi_nhlt_gendevice_config { 2060 u8 virtual_slot; 2061 u8 config_type; 2062 }; 2063 2064 /* Values for config_type field above */ 2065 2066 #define ACPI_NHLT_CONFIGTYPE_GENERIC 0 2067 #define ACPI_NHLT_CONFIGTYPE_MICARRAY 1 2068 2069 struct acpi_nhlt_micdevice_config { 2070 u8 virtual_slot; 2071 u8 config_type; 2072 u8 array_type; 2073 }; 2074 2075 /* Values for array_type field above */ 2076 2077 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_SMALL 0xA 2078 #define ACPI_NHLT_ARRAYTYPE_LINEAR2_BIG 0xB 2079 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO1 0xC 2080 #define ACPI_NHLT_ARRAYTYPE_PLANAR4_LSHAPED 0xD 2081 #define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO2 0xE 2082 #define ACPI_NHLT_ARRAYTYPE_VENDOR 0xF 2083 2084 struct acpi_nhlt_vendor_mic_config { 2085 u8 type; 2086 u8 panel; 2087 u16 speaker_position_distance; /* mm */ 2088 u16 horizontal_offset; /* mm */ 2089 u16 vertical_offset; /* mm */ 2090 u8 frequency_low_band; /* 5*Hz */ 2091 u8 frequency_high_band; /* 500*Hz */ 2092 u16 direction_angle; /* -180 - +180 */ 2093 u16 elevation_angle; /* -180 - +180 */ 2094 u16 work_vertical_angle_begin; /* -180 - +180 with 2 deg step */ 2095 u16 work_vertical_angle_end; /* -180 - +180 with 2 deg step */ 2096 u16 work_horizontal_angle_begin; /* -180 - +180 with 2 deg step */ 2097 u16 work_horizontal_angle_end; /* -180 - +180 with 2 deg step */ 2098 }; 2099 2100 /* Values for Type field above */ 2101 2102 #define ACPI_NHLT_MICTYPE_OMNIDIRECTIONAL 0 2103 #define ACPI_NHLT_MICTYPE_SUBCARDIOID 1 2104 #define ACPI_NHLT_MICTYPE_CARDIOID 2 2105 #define ACPI_NHLT_MICTYPE_SUPERCARDIOID 3 2106 #define ACPI_NHLT_MICTYPE_HYPERCARDIOID 4 2107 #define ACPI_NHLT_MICTYPE_8SHAPED 5 2108 #define ACPI_NHLT_MICTYPE_RESERVED 6 2109 #define ACPI_NHLT_MICTYPE_VENDORDEFINED 7 2110 2111 /* Values for Panel field above */ 2112 2113 #define ACPI_NHLT_MICLOCATION_TOP 0 2114 #define ACPI_NHLT_MICLOCATION_BOTTOM 1 2115 #define ACPI_NHLT_MICLOCATION_LEFT 2 2116 #define ACPI_NHLT_MICLOCATION_RIGHT 3 2117 #define ACPI_NHLT_MICLOCATION_FRONT 4 2118 #define ACPI_NHLT_MICLOCATION_REAR 5 2119 2120 struct acpi_nhlt_vendor_micdevice_config { 2121 u8 virtual_slot; 2122 u8 config_type; 2123 u8 array_type; 2124 u8 mics_count; 2125 struct acpi_nhlt_vendor_mic_config mics[]; 2126 }; 2127 2128 union acpi_nhlt_device_config { 2129 u8 virtual_slot; 2130 struct acpi_nhlt_gendevice_config gen; 2131 struct acpi_nhlt_micdevice_config mic; 2132 struct acpi_nhlt_vendor_micdevice_config vendor_mic; 2133 }; 2134 2135 /* Inherited from Microsoft's WAVEFORMATEXTENSIBLE. */ 2136 struct acpi_nhlt_wave_formatext { 2137 u16 format_tag; 2138 u16 channel_count; 2139 u32 samples_per_sec; 2140 u32 avg_bytes_per_sec; 2141 u16 block_align; 2142 u16 bits_per_sample; 2143 u16 extra_format_size; 2144 u16 valid_bits_per_sample; 2145 u32 channel_mask; 2146 u8 subformat[16]; 2147 }; 2148 2149 struct acpi_nhlt_format_config { 2150 struct acpi_nhlt_wave_formatext format; 2151 struct acpi_nhlt_config config; 2152 }; 2153 2154 struct acpi_nhlt_formats_config { 2155 u8 formats_count; 2156 struct acpi_nhlt_format_config formats[]; 2157 }; 2158 2159 struct acpi_nhlt_device_info { 2160 u8 id[16]; 2161 u8 instance_id; 2162 u8 port_id; 2163 }; 2164 2165 struct acpi_nhlt_devices_info { 2166 u8 devices_count; 2167 struct acpi_nhlt_device_info devices[]; 2168 }; 2169 2170 /******************************************************************************* 2171 * 2172 * PCCT - Platform Communications Channel Table (ACPI 5.0) 2173 * Version 2 (ACPI 6.2) 2174 * 2175 ******************************************************************************/ 2176 2177 struct acpi_table_pcct { 2178 struct acpi_table_header header; /* Common ACPI table header */ 2179 u32 flags; 2180 u64 reserved; 2181 }; 2182 2183 /* Values for Flags field above */ 2184 2185 #define ACPI_PCCT_DOORBELL 1 2186 2187 /* Values for subtable type in struct acpi_subtable_header */ 2188 2189 enum acpi_pcct_type { 2190 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 2191 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 2192 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 2193 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 2194 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 2195 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 2196 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2197 }; 2198 2199 /* 2200 * PCCT Subtables, correspond to Type in struct acpi_subtable_header 2201 */ 2202 2203 /* 0: Generic Communications Subspace */ 2204 2205 struct acpi_pcct_subspace { 2206 struct acpi_subtable_header header; 2207 u8 reserved[6]; 2208 u64 base_address; 2209 u64 length; 2210 struct acpi_generic_address doorbell_register; 2211 u64 preserve_mask; 2212 u64 write_mask; 2213 u32 latency; 2214 u32 max_access_rate; 2215 u16 min_turnaround_time; 2216 }; 2217 2218 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 2219 2220 struct acpi_pcct_hw_reduced { 2221 struct acpi_subtable_header header; 2222 u32 platform_interrupt; 2223 u8 flags; 2224 u8 reserved; 2225 u64 base_address; 2226 u64 length; 2227 struct acpi_generic_address doorbell_register; 2228 u64 preserve_mask; 2229 u64 write_mask; 2230 u32 latency; 2231 u32 max_access_rate; 2232 u16 min_turnaround_time; 2233 }; 2234 2235 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 2236 2237 struct acpi_pcct_hw_reduced_type2 { 2238 struct acpi_subtable_header header; 2239 u32 platform_interrupt; 2240 u8 flags; 2241 u8 reserved; 2242 u64 base_address; 2243 u64 length; 2244 struct acpi_generic_address doorbell_register; 2245 u64 preserve_mask; 2246 u64 write_mask; 2247 u32 latency; 2248 u32 max_access_rate; 2249 u16 min_turnaround_time; 2250 struct acpi_generic_address platform_ack_register; 2251 u64 ack_preserve_mask; 2252 u64 ack_write_mask; 2253 }; 2254 2255 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 2256 2257 struct acpi_pcct_ext_pcc_master { 2258 struct acpi_subtable_header header; 2259 u32 platform_interrupt; 2260 u8 flags; 2261 u8 reserved1; 2262 u64 base_address; 2263 u32 length; 2264 struct acpi_generic_address doorbell_register; 2265 u64 preserve_mask; 2266 u64 write_mask; 2267 u32 latency; 2268 u32 max_access_rate; 2269 u32 min_turnaround_time; 2270 struct acpi_generic_address platform_ack_register; 2271 u64 ack_preserve_mask; 2272 u64 ack_set_mask; 2273 u64 reserved2; 2274 struct acpi_generic_address cmd_complete_register; 2275 u64 cmd_complete_mask; 2276 struct acpi_generic_address cmd_update_register; 2277 u64 cmd_update_preserve_mask; 2278 u64 cmd_update_set_mask; 2279 struct acpi_generic_address error_status_register; 2280 u64 error_status_mask; 2281 }; 2282 2283 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 2284 2285 struct acpi_pcct_ext_pcc_slave { 2286 struct acpi_subtable_header header; 2287 u32 platform_interrupt; 2288 u8 flags; 2289 u8 reserved1; 2290 u64 base_address; 2291 u32 length; 2292 struct acpi_generic_address doorbell_register; 2293 u64 preserve_mask; 2294 u64 write_mask; 2295 u32 latency; 2296 u32 max_access_rate; 2297 u32 min_turnaround_time; 2298 struct acpi_generic_address platform_ack_register; 2299 u64 ack_preserve_mask; 2300 u64 ack_set_mask; 2301 u64 reserved2; 2302 struct acpi_generic_address cmd_complete_register; 2303 u64 cmd_complete_mask; 2304 struct acpi_generic_address cmd_update_register; 2305 u64 cmd_update_preserve_mask; 2306 u64 cmd_update_set_mask; 2307 struct acpi_generic_address error_status_register; 2308 u64 error_status_mask; 2309 }; 2310 2311 /* 5: HW Registers based Communications Subspace */ 2312 2313 struct acpi_pcct_hw_reg { 2314 struct acpi_subtable_header header; 2315 u16 version; 2316 u64 base_address; 2317 u64 length; 2318 struct acpi_generic_address doorbell_register; 2319 u64 doorbell_preserve; 2320 u64 doorbell_write; 2321 struct acpi_generic_address cmd_complete_register; 2322 u64 cmd_complete_mask; 2323 struct acpi_generic_address error_status_register; 2324 u64 error_status_mask; 2325 u32 nominal_latency; 2326 u32 min_turnaround_time; 2327 }; 2328 2329 /* Values for doorbell flags above */ 2330 2331 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 2332 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 2333 2334 /* 2335 * PCC memory structures (not part of the ACPI table) 2336 */ 2337 2338 /* Shared Memory Region */ 2339 2340 struct acpi_pcct_shared_memory { 2341 u32 signature; 2342 u16 command; 2343 u16 status; 2344 }; 2345 2346 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 2347 2348 struct acpi_pcct_ext_pcc_shared_memory { 2349 u32 signature; 2350 u32 flags; 2351 u32 length; 2352 u32 command; 2353 }; 2354 2355 /******************************************************************************* 2356 * 2357 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 2358 * Version 0 2359 * 2360 ******************************************************************************/ 2361 2362 struct acpi_table_pdtt { 2363 struct acpi_table_header header; /* Common ACPI table header */ 2364 u8 trigger_count; 2365 u8 reserved[3]; 2366 u32 array_offset; 2367 }; 2368 2369 /* 2370 * PDTT Communication Channel Identifier Structure. 2371 * The number of these structures is defined by trigger_count above, 2372 * starting at array_offset. 2373 */ 2374 struct acpi_pdtt_channel { 2375 u8 subchannel_id; 2376 u8 flags; 2377 }; 2378 2379 /* Flags for above */ 2380 2381 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 2382 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 2383 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 2384 2385 /******************************************************************************* 2386 * 2387 * PHAT - Platform Health Assessment Table (ACPI 6.4) 2388 * Version 1 2389 * 2390 ******************************************************************************/ 2391 2392 struct acpi_table_phat { 2393 struct acpi_table_header header; /* Common ACPI table header */ 2394 }; 2395 2396 /* Common header for PHAT subtables that follow main table */ 2397 2398 struct acpi_phat_header { 2399 u16 type; 2400 u16 length; 2401 u8 revision; 2402 }; 2403 2404 /* Values for Type field above */ 2405 2406 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 2407 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 2408 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 2409 2410 /* 2411 * PHAT subtables, correspond to Type in struct acpi_phat_header 2412 */ 2413 2414 /* 0: Firmware Version Data Record */ 2415 2416 struct acpi_phat_version_data { 2417 struct acpi_phat_header header; 2418 u8 reserved[3]; 2419 u32 element_count; 2420 }; 2421 2422 struct acpi_phat_version_element { 2423 u8 guid[16]; 2424 u64 version_value; 2425 u32 producer_id; 2426 }; 2427 2428 /* 1: Firmware Health Data Record */ 2429 2430 struct acpi_phat_health_data { 2431 struct acpi_phat_header header; 2432 u8 reserved[2]; 2433 u8 health; 2434 u8 device_guid[16]; 2435 u32 device_specific_offset; /* Zero if no Device-specific data */ 2436 }; 2437 2438 /* Values for Health field above */ 2439 2440 #define ACPI_PHAT_ERRORS_FOUND 0 2441 #define ACPI_PHAT_NO_ERRORS 1 2442 #define ACPI_PHAT_UNKNOWN_ERRORS 2 2443 #define ACPI_PHAT_ADVISORY 3 2444 2445 /******************************************************************************* 2446 * 2447 * PMTT - Platform Memory Topology Table (ACPI 5.0) 2448 * Version 1 2449 * 2450 ******************************************************************************/ 2451 2452 struct acpi_table_pmtt { 2453 struct acpi_table_header header; /* Common ACPI table header */ 2454 u32 memory_device_count; 2455 /* 2456 * Immediately followed by: 2457 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2458 */ 2459 }; 2460 2461 /* Common header for PMTT subtables that follow main table */ 2462 2463 struct acpi_pmtt_header { 2464 u8 type; 2465 u8 reserved1; 2466 u16 length; 2467 u16 flags; 2468 u16 reserved2; 2469 u32 memory_device_count; /* Zero means no memory device structs follow */ 2470 /* 2471 * Immediately followed by: 2472 * u8 type_specific_data[] 2473 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2474 */ 2475 }; 2476 2477 /* Values for Type field above */ 2478 2479 #define ACPI_PMTT_TYPE_SOCKET 0 2480 #define ACPI_PMTT_TYPE_CONTROLLER 1 2481 #define ACPI_PMTT_TYPE_DIMM 2 2482 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2483 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2484 2485 /* Values for Flags field above */ 2486 2487 #define ACPI_PMTT_TOP_LEVEL 0x0001 2488 #define ACPI_PMTT_PHYSICAL 0x0002 2489 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2490 2491 /* 2492 * PMTT subtables, correspond to Type in struct acpi_pmtt_header 2493 */ 2494 2495 /* 0: Socket Structure */ 2496 2497 struct acpi_pmtt_socket { 2498 struct acpi_pmtt_header header; 2499 u16 socket_id; 2500 u16 reserved; 2501 }; 2502 /* 2503 * Immediately followed by: 2504 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2505 */ 2506 2507 /* 1: Memory Controller subtable */ 2508 2509 struct acpi_pmtt_controller { 2510 struct acpi_pmtt_header header; 2511 u16 controller_id; 2512 u16 reserved; 2513 }; 2514 /* 2515 * Immediately followed by: 2516 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2517 */ 2518 2519 /* 2: Physical Component Identifier (DIMM) */ 2520 2521 struct acpi_pmtt_physical_component { 2522 struct acpi_pmtt_header header; 2523 u32 bios_handle; 2524 }; 2525 2526 /* 0xFF: Vendor Specific Data */ 2527 2528 struct acpi_pmtt_vendor_specific { 2529 struct acpi_pmtt_header header; 2530 u8 type_uuid[16]; 2531 u8 specific[]; 2532 /* 2533 * Immediately followed by: 2534 * u8 vendor_specific_data[]; 2535 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2536 */ 2537 }; 2538 2539 /******************************************************************************* 2540 * 2541 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2542 * Version 1 2543 * 2544 ******************************************************************************/ 2545 2546 struct acpi_table_pptt { 2547 struct acpi_table_header header; /* Common ACPI table header */ 2548 }; 2549 2550 /* Values for Type field above */ 2551 2552 enum acpi_pptt_type { 2553 ACPI_PPTT_TYPE_PROCESSOR = 0, 2554 ACPI_PPTT_TYPE_CACHE = 1, 2555 ACPI_PPTT_TYPE_ID = 2, 2556 ACPI_PPTT_TYPE_RESERVED = 3 2557 }; 2558 2559 /* 0: Processor Hierarchy Node Structure */ 2560 2561 struct acpi_pptt_processor { 2562 struct acpi_subtable_header header; 2563 u16 reserved; 2564 u32 flags; 2565 u32 parent; 2566 u32 acpi_processor_id; 2567 u32 number_of_priv_resources; 2568 }; 2569 2570 /* Flags */ 2571 2572 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2573 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2574 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2575 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2576 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2577 2578 /* 1: Cache Type Structure */ 2579 2580 struct acpi_pptt_cache { 2581 struct acpi_subtable_header header; 2582 u16 reserved; 2583 u32 flags; 2584 u32 next_level_of_cache; 2585 u32 size; 2586 u32 number_of_sets; 2587 u8 associativity; 2588 u8 attributes; 2589 u16 line_size; 2590 }; 2591 2592 /* 1: Cache Type Structure for PPTT version 3 */ 2593 2594 struct acpi_pptt_cache_v1 { 2595 u32 cache_id; 2596 }; 2597 2598 /* Flags */ 2599 2600 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2601 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2602 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2603 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2604 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2605 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2606 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2607 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2608 2609 /* Masks for Attributes */ 2610 2611 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2612 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2613 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2614 2615 /* Attributes describing cache */ 2616 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2617 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2618 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2619 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2620 2621 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2622 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2623 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2624 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2625 2626 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2627 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2628 2629 /* 2: ID Structure */ 2630 2631 struct acpi_pptt_id { 2632 struct acpi_subtable_header header; 2633 u16 reserved; 2634 u32 vendor_id; 2635 u64 level1_id; 2636 u64 level2_id; 2637 u16 major_rev; 2638 u16 minor_rev; 2639 u16 spin_rev; 2640 }; 2641 2642 /******************************************************************************* 2643 * 2644 * PRMT - Platform Runtime Mechanism Table 2645 * Version 1 2646 * 2647 ******************************************************************************/ 2648 2649 struct acpi_table_prmt { 2650 struct acpi_table_header header; /* Common ACPI table header */ 2651 }; 2652 2653 struct acpi_table_prmt_header { 2654 u8 platform_guid[16]; 2655 u32 module_info_offset; 2656 u32 module_info_count; 2657 }; 2658 2659 struct acpi_prmt_module_header { 2660 u16 revision; 2661 u16 length; 2662 }; 2663 2664 struct acpi_prmt_module_info { 2665 u16 revision; 2666 u16 length; 2667 u8 module_guid[16]; 2668 u16 major_rev; 2669 u16 minor_rev; 2670 u16 handler_info_count; 2671 u32 handler_info_offset; 2672 u64 mmio_list_pointer; 2673 }; 2674 2675 struct acpi_prmt_handler_info { 2676 u16 revision; 2677 u16 length; 2678 u8 handler_guid[16]; 2679 u64 handler_address; 2680 u64 static_data_buffer_address; 2681 u64 acpi_param_buffer_address; 2682 }; 2683 2684 /******************************************************************************* 2685 * 2686 * RASF - RAS Feature Table (ACPI 5.0) 2687 * Version 1 2688 * 2689 ******************************************************************************/ 2690 2691 struct acpi_table_rasf { 2692 struct acpi_table_header header; /* Common ACPI table header */ 2693 u8 channel_id[12]; 2694 }; 2695 2696 /* RASF Platform Communication Channel Shared Memory Region */ 2697 2698 struct acpi_rasf_shared_memory { 2699 u32 signature; 2700 u16 command; 2701 u16 status; 2702 u16 version; 2703 u8 capabilities[16]; 2704 u8 set_capabilities[16]; 2705 u16 num_parameter_blocks; 2706 u32 set_capabilities_status; 2707 }; 2708 2709 /* RASF Parameter Block Structure Header */ 2710 2711 struct acpi_rasf_parameter_block { 2712 u16 type; 2713 u16 version; 2714 u16 length; 2715 }; 2716 2717 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2718 2719 struct acpi_rasf_patrol_scrub_parameter { 2720 struct acpi_rasf_parameter_block header; 2721 u16 patrol_scrub_command; 2722 u64 requested_address_range[2]; 2723 u64 actual_address_range[2]; 2724 u16 flags; 2725 u8 requested_speed; 2726 }; 2727 2728 /* Masks for Flags and Speed fields above */ 2729 2730 #define ACPI_RASF_SCRUBBER_RUNNING 1 2731 #define ACPI_RASF_SPEED (7<<1) 2732 #define ACPI_RASF_SPEED_SLOW (0<<1) 2733 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2734 #define ACPI_RASF_SPEED_FAST (7<<1) 2735 2736 /* Channel Commands */ 2737 2738 enum acpi_rasf_commands { 2739 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2740 }; 2741 2742 /* Platform RAS Capabilities */ 2743 2744 enum acpi_rasf_capabiliities { 2745 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2746 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2747 }; 2748 2749 /* Patrol Scrub Commands */ 2750 2751 enum acpi_rasf_patrol_scrub_commands { 2752 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2753 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2754 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2755 }; 2756 2757 /* Channel Command flags */ 2758 2759 #define ACPI_RASF_GENERATE_SCI (1<<15) 2760 2761 /* Status values */ 2762 2763 enum acpi_rasf_status { 2764 ACPI_RASF_SUCCESS = 0, 2765 ACPI_RASF_NOT_VALID = 1, 2766 ACPI_RASF_NOT_SUPPORTED = 2, 2767 ACPI_RASF_BUSY = 3, 2768 ACPI_RASF_FAILED = 4, 2769 ACPI_RASF_ABORTED = 5, 2770 ACPI_RASF_INVALID_DATA = 6 2771 }; 2772 2773 /* Status flags */ 2774 2775 #define ACPI_RASF_COMMAND_COMPLETE (1) 2776 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2777 #define ACPI_RASF_ERROR (1<<2) 2778 #define ACPI_RASF_STATUS (0x1F<<3) 2779 2780 /******************************************************************************* 2781 * 2782 * RAS2 - RAS2 Feature Table (ACPI 6.5) 2783 * Version 1 2784 * 2785 * 2786 ******************************************************************************/ 2787 2788 struct acpi_table_ras2 { 2789 struct acpi_table_header header; /* Common ACPI table header */ 2790 u16 reserved; 2791 u16 num_pcc_descs; 2792 }; 2793 2794 /* RAS2 Platform Communication Channel Descriptor */ 2795 2796 struct acpi_ras2_pcc_desc { 2797 u8 channel_id; 2798 u16 reserved; 2799 u8 feature_type; 2800 u32 instance; 2801 }; 2802 2803 /* RAS2 Platform Communication Channel Shared Memory Region */ 2804 2805 struct acpi_ras2_shared_memory { 2806 u32 signature; 2807 u16 command; 2808 u16 status; 2809 u16 version; 2810 u8 features[16]; 2811 u8 set_capabilities[16]; 2812 u16 num_parameter_blocks; 2813 u32 set_capabilities_status; 2814 }; 2815 2816 /* RAS2 Parameter Block Structure for PATROL_SCRUB */ 2817 2818 struct acpi_ras2_parameter_block { 2819 u16 type; 2820 u16 version; 2821 u16 length; 2822 }; 2823 2824 /* RAS2 Parameter Block Structure for PATROL_SCRUB */ 2825 2826 struct acpi_ras2_patrol_scrub_parameter { 2827 struct acpi_ras2_parameter_block header; 2828 u16 patrol_scrub_command; 2829 u64 requested_address_range[2]; 2830 u64 actual_address_range[2]; 2831 u32 flags; 2832 u32 scrub_params_out; 2833 u32 scrub_params_in; 2834 }; 2835 2836 /* Masks for Flags field above */ 2837 2838 #define ACPI_RAS2_SCRUBBER_RUNNING 1 2839 2840 /* RAS2 Parameter Block Structure for LA2PA_TRANSLATION */ 2841 2842 struct acpi_ras2_la2pa_translation_parameter { 2843 struct acpi_ras2_parameter_block header; 2844 u16 addr_translation_command; 2845 u64 sub_inst_id; 2846 u64 logical_address; 2847 u64 physical_address; 2848 u32 status; 2849 }; 2850 2851 /* Channel Commands */ 2852 2853 enum acpi_ras2_commands { 2854 ACPI_RAS2_EXECUTE_RAS2_COMMAND = 1 2855 }; 2856 2857 /* Platform RAS2 Features */ 2858 2859 enum acpi_ras2_features { 2860 ACPI_RAS2_PATROL_SCRUB_SUPPORTED = 0, 2861 ACPI_RAS2_LA2PA_TRANSLATION = 1 2862 }; 2863 2864 /* RAS2 Patrol Scrub Commands */ 2865 2866 enum acpi_ras2_patrol_scrub_commands { 2867 ACPI_RAS2_GET_PATROL_PARAMETERS = 1, 2868 ACPI_RAS2_START_PATROL_SCRUBBER = 2, 2869 ACPI_RAS2_STOP_PATROL_SCRUBBER = 3 2870 }; 2871 2872 /* RAS2 LA2PA Translation Commands */ 2873 2874 enum acpi_ras2_la2_pa_translation_commands { 2875 ACPI_RAS2_GET_LA2PA_TRANSLATION = 1, 2876 }; 2877 2878 /* RAS2 LA2PA Translation Status values */ 2879 2880 enum acpi_ras2_la2_pa_translation_status { 2881 ACPI_RAS2_LA2PA_TRANSLATION_SUCCESS = 0, 2882 ACPI_RAS2_LA2PA_TRANSLATION_FAIL = 1, 2883 }; 2884 2885 /* Channel Command flags */ 2886 2887 #define ACPI_RAS2_GENERATE_SCI (1<<15) 2888 2889 /* Status values */ 2890 2891 enum acpi_ras2_status { 2892 ACPI_RAS2_SUCCESS = 0, 2893 ACPI_RAS2_NOT_VALID = 1, 2894 ACPI_RAS2_NOT_SUPPORTED = 2, 2895 ACPI_RAS2_BUSY = 3, 2896 ACPI_RAS2_FAILED = 4, 2897 ACPI_RAS2_ABORTED = 5, 2898 ACPI_RAS2_INVALID_DATA = 6 2899 }; 2900 2901 /* Status flags */ 2902 2903 #define ACPI_RAS2_COMMAND_COMPLETE (1) 2904 #define ACPI_RAS2_SCI_DOORBELL (1<<1) 2905 #define ACPI_RAS2_ERROR (1<<2) 2906 #define ACPI_RAS2_STATUS (0x1F<<3) 2907 2908 /******************************************************************************* 2909 * 2910 * RGRT - Regulatory Graphics Resource Table 2911 * Version 1 2912 * 2913 * Conforms to "ACPI RGRT" available at: 2914 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/ 2915 * 2916 ******************************************************************************/ 2917 2918 struct acpi_table_rgrt { 2919 struct acpi_table_header header; /* Common ACPI table header */ 2920 u16 version; 2921 u8 image_type; 2922 u8 reserved; 2923 u8 image[]; 2924 }; 2925 2926 /* image_type values */ 2927 2928 enum acpi_rgrt_image_type { 2929 ACPI_RGRT_TYPE_RESERVED0 = 0, 2930 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 2931 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2932 }; 2933 2934 /******************************************************************************* 2935 * 2936 * RHCT - RISC-V Hart Capabilities Table 2937 * Version 1 2938 * 2939 ******************************************************************************/ 2940 2941 struct acpi_table_rhct { 2942 struct acpi_table_header header; /* Common ACPI table header */ 2943 u32 flags; /* RHCT flags */ 2944 u64 time_base_freq; 2945 u32 node_count; 2946 u32 node_offset; 2947 }; 2948 2949 /* RHCT Flags */ 2950 2951 #define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU (1) 2952 /* 2953 * RHCT subtables 2954 */ 2955 struct acpi_rhct_node_header { 2956 u16 type; 2957 u16 length; 2958 u16 revision; 2959 }; 2960 2961 /* Values for RHCT subtable Type above */ 2962 2963 enum acpi_rhct_node_type { 2964 ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000, 2965 ACPI_RHCT_NODE_TYPE_CMO = 0x0001, 2966 ACPI_RHCT_NODE_TYPE_MMU = 0x0002, 2967 ACPI_RHCT_NODE_TYPE_RESERVED = 0x0003, 2968 ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF, 2969 }; 2970 2971 /* 2972 * RHCT node specific subtables 2973 */ 2974 2975 /* ISA string node structure */ 2976 struct acpi_rhct_isa_string { 2977 u16 isa_length; 2978 char isa[]; 2979 }; 2980 2981 struct acpi_rhct_cmo_node { 2982 u8 reserved; /* Must be zero */ 2983 u8 cbom_size; /* CBOM size in powerof 2 */ 2984 u8 cbop_size; /* CBOP size in powerof 2 */ 2985 u8 cboz_size; /* CBOZ size in powerof 2 */ 2986 }; 2987 2988 struct acpi_rhct_mmu_node { 2989 u8 reserved; /* Must be zero */ 2990 u8 mmu_type; /* Virtual Address Scheme */ 2991 }; 2992 2993 enum acpi_rhct_mmu_type { 2994 ACPI_RHCT_MMU_TYPE_SV39 = 0, 2995 ACPI_RHCT_MMU_TYPE_SV48 = 1, 2996 ACPI_RHCT_MMU_TYPE_SV57 = 2 2997 }; 2998 2999 /* Hart Info node structure */ 3000 struct acpi_rhct_hart_info { 3001 u16 num_offsets; 3002 u32 uid; /* ACPI processor UID */ 3003 }; 3004 3005 /******************************************************************************* 3006 * 3007 * SBST - Smart Battery Specification Table 3008 * Version 1 3009 * 3010 ******************************************************************************/ 3011 3012 struct acpi_table_sbst { 3013 struct acpi_table_header header; /* Common ACPI table header */ 3014 u32 warning_level; 3015 u32 low_level; 3016 u32 critical_level; 3017 }; 3018 3019 /******************************************************************************* 3020 * 3021 * SDEI - Software Delegated Exception Interface Descriptor Table 3022 * 3023 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 3024 * May 8th, 2017. Copyright 2017 ARM Ltd. 3025 * 3026 ******************************************************************************/ 3027 3028 struct acpi_table_sdei { 3029 struct acpi_table_header header; /* Common ACPI table header */ 3030 }; 3031 3032 /******************************************************************************* 3033 * 3034 * SDEV - Secure Devices Table (ACPI 6.2) 3035 * Version 1 3036 * 3037 ******************************************************************************/ 3038 3039 struct acpi_table_sdev { 3040 struct acpi_table_header header; /* Common ACPI table header */ 3041 }; 3042 3043 struct acpi_sdev_header { 3044 u8 type; 3045 u8 flags; 3046 u16 length; 3047 }; 3048 3049 /* Values for subtable type above */ 3050 3051 enum acpi_sdev_type { 3052 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 3053 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 3054 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3055 }; 3056 3057 /* Values for flags above */ 3058 3059 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 3060 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 3061 3062 /* 3063 * SDEV subtables 3064 */ 3065 3066 /* 0: Namespace Device Based Secure Device Structure */ 3067 3068 struct acpi_sdev_namespace { 3069 struct acpi_sdev_header header; 3070 u16 device_id_offset; 3071 u16 device_id_length; 3072 u16 vendor_data_offset; 3073 u16 vendor_data_length; 3074 }; 3075 3076 struct acpi_sdev_secure_component { 3077 u16 secure_component_offset; 3078 u16 secure_component_length; 3079 }; 3080 3081 /* 3082 * SDEV sub-subtables ("Components") for above 3083 */ 3084 struct acpi_sdev_component { 3085 struct acpi_sdev_header header; 3086 }; 3087 3088 /* Values for sub-subtable type above */ 3089 3090 enum acpi_sac_type { 3091 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 3092 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 3093 }; 3094 3095 struct acpi_sdev_id_component { 3096 struct acpi_sdev_header header; 3097 u16 hardware_id_offset; 3098 u16 hardware_id_length; 3099 u16 subsystem_id_offset; 3100 u16 subsystem_id_length; 3101 u16 hardware_revision; 3102 u8 hardware_rev_present; 3103 u8 class_code_present; 3104 u8 pci_base_class; 3105 u8 pci_sub_class; 3106 u8 pci_programming_xface; 3107 }; 3108 3109 struct acpi_sdev_mem_component { 3110 struct acpi_sdev_header header; 3111 u32 reserved; 3112 u64 memory_base_address; 3113 u64 memory_length; 3114 }; 3115 3116 /* 1: PCIe Endpoint Device Based Device Structure */ 3117 3118 struct acpi_sdev_pcie { 3119 struct acpi_sdev_header header; 3120 u16 segment; 3121 u16 start_bus; 3122 u16 path_offset; 3123 u16 path_length; 3124 u16 vendor_data_offset; 3125 u16 vendor_data_length; 3126 }; 3127 3128 /* 1a: PCIe Endpoint path entry */ 3129 3130 struct acpi_sdev_pcie_path { 3131 u8 device; 3132 u8 function; 3133 }; 3134 3135 /******************************************************************************* 3136 * 3137 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 3138 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3139 * Trust Domain Extensions (Intel TDX)". 3140 * Version 1 3141 * 3142 ******************************************************************************/ 3143 3144 struct acpi_table_svkl { 3145 struct acpi_table_header header; /* Common ACPI table header */ 3146 u32 count; 3147 }; 3148 3149 struct acpi_svkl_key { 3150 u16 type; 3151 u16 format; 3152 u32 size; 3153 u64 address; 3154 }; 3155 3156 enum acpi_svkl_type { 3157 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 3158 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 3159 }; 3160 3161 enum acpi_svkl_format { 3162 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 3163 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 3164 }; 3165 3166 /******************************************************************************* 3167 * 3168 * TDEL - TD-Event Log 3169 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3170 * Trust Domain Extensions (Intel TDX)". 3171 * September 2020 3172 * 3173 ******************************************************************************/ 3174 3175 struct acpi_table_tdel { 3176 struct acpi_table_header header; /* Common ACPI table header */ 3177 u32 reserved; 3178 u64 log_area_minimum_length; 3179 u64 log_area_start_address; 3180 }; 3181 3182 /* Reset to default packing */ 3183 3184 #pragma pack() 3185 3186 #endif /* __ACTBL2_H__ */ 3187