Searched refs:dcfclk_khz (Results 1 – 10 of 10) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
| H A D | dcn201_clk_mgr.c | 120 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn201_update_clocks()
121 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn201_update_clocks()
123 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) in dcn201_update_clocks()
124 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn201_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| H A D | dcn31_clk_mgr.c | 203 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn31_update_clocks()
204 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn31_update_clocks()
205 dcn31_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in dcn31_update_clocks()
252 cmd.notify_clocks.clocks.dcfclk_khz = clk_mgr_base->clks.dcfclk_khz; in dcn31_update_clocks()
318 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn31_are_clock_states_equal()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| H A D | dcn35_clk_mgr.c | 472 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > force_min_dcfclk_khz) ? in dcn35_update_clocks()
473 new_clocks->dcfclk_khz : force_min_dcfclk_khz; in dcn35_update_clocks()
476 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn35_update_clocks()
477 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn35_update_clocks()
478 dcn35_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in dcn35_update_clocks()
543 cmd.notify_clocks.clocks.dcfclk_khz = clk_mgr_base->clks.dcfclk_khz; in dcn35_update_clocks()
597 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn35_are_clock_states_equal()
1259 new_clocks->dcfclk_khz = 400000; in dcn35_update_clocks_fpga()
1270 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr->clks.dcfclk_khz)) { in dcn35_update_clocks_fpga()
1271 clk_mgr->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn35_update_clocks_fpga()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| H A D | dcn314_clk_mgr.c | 275 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn314_update_clocks()
276 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn314_update_clocks()
277 dcn314_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in dcn314_update_clocks()
331 cmd.notify_clocks.clocks.dcfclk_khz = clk_mgr_base->clks.dcfclk_khz; in dcn314_update_clocks()
384 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn314_are_clock_states_equal()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/ |
| H A D | dcn60_clk_mgr.c | 444 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn60_are_clock_states_equal()
880 new_clocks->dcfclk_khz > 0 && in dcn60_auto_dpm_test_log()
923 new_clocks->dcfclk_khz, in dcn60_auto_dpm_test_log()
1059 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, in dcn60_make_bandwidth_clocks_update_action()
1060 clk_mgr_base->clks.dcfclk_khz)) { in dcn60_make_bandwidth_clocks_update_action()
1176 (uint16_t)khz_to_mhz_ceil(new_clocks->dcfclk_khz); in dcn60_build_bandwidth_clocks_block_sequence_with_action()
1272 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn60_update_bandwidth_clocks_state_with_action()
1336 if (context->bw_ctx.bw.dcn.clk.dcfclk_khz < force_min_dcfclk_khz) in dcn60_update_clocks()
1337 context->bw_ctx.bw.dcn.clk.dcfclk_khz = force_min_dcfclk_khz; in dcn60_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | dml2_wrapper_fpu.c | 416 …out_clks.dcfclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dc… in dml2_validate_and_build_resource()
474 …out_clks.dcfclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dc… in dml2_validate_and_build_resource()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/ |
| H A D | dml2_pmo_dcn6_stage_optimizers.c | 1616 utm_soc_bb->vmin_limit.dcfclk_khz * utm_soc_bb->return_bus_width_bytes; in dml2_pmo_dcn6_stage_optimizer_vmin_dcfclk_init()
1628 if (utm_soc_bb->vmin_limit.dcfclk_khz == 0) { in dml2_pmo_dcn6_stage_optimizer_vmin_dcfclk_optimize_next()
1640 …op_optimal_dcfclks_khz[worksheet->cur.config.min_sop_index] <= utm_soc_bb->vmin_limit.dcfclk_khz) { in dml2_pmo_dcn6_stage_optimizer_vmin_dcfclk_optimize_next()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn50/ |
| H A D | dcn50_hwseq.c | 58 clocks->dcfclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dcfclk_mhz * 1000; in dcn50_initialize_min_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn5_funcs_mode_programming.c | 1431 DML_LOG_VERBOSE("DML::%s: max_sop.dcfclk_khz = %d\n", __func__, max_sop.dcfclk_khz); in dcn5_mode_programming()
1434 DML_LOG_VERBOSE("DML::%s: min_sop.dcfclk_khz = %d\n", __func__, min_sop.dcfclk_khz); in dcn5_mode_programming()
1746 mode_lib->mp.Dcfclk = programming->min_clocks.dcn4x.active.dcfclk_khz / 1000.0; in dcn5_mp_assign_qos_bound()
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc.h | 757 int dcfclk_khz; member
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