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Searched refs:dcfclk_khz (Results 1 – 25 of 26) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
H A Ddcn201_clk_mgr.c120 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn201_update_clocks()
121 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn201_update_clocks()
123 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) in dcn201_update_clocks()
124 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn201_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv1_clk_mgr.c227 || new_clocks->dcfclk_khz > clk_mgr_base->clks.dcfclk_khz) in rv1_update_clocks()
245 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in rv1_update_clocks()
246 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in rv1_update_clocks()
265 pp_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_khz)); in rv1_update_clocks()
285 pp_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_khz)); in rv1_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
H A Ddcn20_clk_mgr.c259 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn2_update_clocks()
260 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn2_update_clocks()
262 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn2_update_clocks()
263 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn2_update_clocks()
265 …_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_khz)); in dcn2_update_clocks()
357 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr->clks.dcfclk_khz)) { in dcn2_update_clocks_fpga()
358 clk_mgr->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn2_update_clocks_fpga()
478 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn2_are_clock_states_equal()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_clk_mgr.c231 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn3_update_clocks()
232 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn3_update_clocks()
234 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn3_update_clocks()
235 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn3_update_clocks()
236 …0_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DCEFCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_khz)); in dcn3_update_clocks()
442 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn3_are_clock_states_equal()
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/
H A Ddml2_dpmm_dcn4.c87 …in_out->programming->min_clocks.dcn4x.active.dcfclk_khz = dml_round_up(min_dcfclk_bw > min_dcfclk_… in calculate_system_active_minimums()
127 …in_out->programming->min_clocks.dcn4x.svp_prefetch.dcfclk_khz = dml_round_up(min_dcfclk_bw > min_d… in calculate_svp_prefetch_minimums()
151 …in_out->programming->min_clocks.dcn4x.idle.dcfclk_khz = dml_round_up(min_dcfclk_avg > min_dcfclk_l… in calculate_idle_minimums()
255 …result = round_up_to_next_dpm(&display_cfg->min_clocks.dcn4x.active.dcfclk_khz, &state_table->dcfc… in map_soc_min_clocks_to_dpm_fine_grained()
262 …result = round_up_to_next_dpm(&display_cfg->min_clocks.dcn4x.svp_prefetch.dcfclk_khz, &state_table… in map_soc_min_clocks_to_dpm_fine_grained()
269 …result = round_up_to_next_dpm(&display_cfg->min_clocks.dcn4x.idle.dcfclk_khz, &state_table->dcfclk… in map_soc_min_clocks_to_dpm_fine_grained()
285 …if (display_cfg->min_clocks.dcn4x.active.dcfclk_khz <= state_table->dcfclk.clk_values_khz[index] && in map_soc_min_clocks_to_dpm_coarse_grained()
288 display_cfg->min_clocks.dcn4x.active.dcfclk_khz = state_table->dcfclk.clk_values_khz[index]; in map_soc_min_clocks_to_dpm_coarse_grained()
299 if (display_cfg->min_clocks.dcn4x.idle.dcfclk_khz <= state_table->dcfclk.clk_values_khz[index] && in map_soc_min_clocks_to_dpm_coarse_grained()
302 display_cfg->min_clocks.dcn4x.idle.dcfclk_khz = state_table->dcfclk.clk_values_khz[index]; in map_soc_min_clocks_to_dpm_coarse_grained()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_clk_mgr.c375 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn35_update_clocks()
376 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn35_update_clocks()
378 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn35_update_clocks()
379 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn35_update_clocks()
380 dcn35_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in dcn35_update_clocks()
440 cmd.notify_clocks.clocks.dcfclk_khz = clk_mgr_base->clks.dcfclk_khz; in dcn35_update_clocks()
495 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn35_are_clock_states_equal()
1016 new_clocks->dcfclk_khz = 400000; in dcn35_update_clocks_fpga()
1027 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr->clks.dcfclk_khz)) { in dcn35_update_clocks_fpga()
1028 clk_mgr->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn35_update_clocks_fpga()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/
H A Ddcn401_clk_mgr.c437 new_clocks->dcfclk_khz > 0 && in dcn401_auto_dpm_test_log()
480 new_clocks->dcfclk_khz, in dcn401_auto_dpm_test_log()
677 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn401_update_clocks_legacy()
678 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn401_update_clocks_legacy()
680 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn401_update_clocks_legacy()
681 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn401_update_clocks_legacy()
683 …01_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DCFCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_khz)); in dcn401_update_clocks_legacy()
1005 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn401_build_update_bandwidth_clocks_sequence()
1006 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn401_build_update_bandwidth_clocks_sequence()
1008 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn401_build_update_bandwidth_clocks_sequence()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
H A Ddcn32_clk_mgr.c561 new_clocks->dcfclk_khz > 0 && in dcn32_auto_dpm_test_log()
603 new_clocks->dcfclk_khz, in dcn32_auto_dpm_test_log()
677 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn32_update_clocks()
678 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn32_update_clocks()
680 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz) && in dcn32_update_clocks()
682 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn32_update_clocks()
683 …32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DCFCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_khz)); in dcn32_update_clocks()
1079 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn32_are_clock_states_equal()
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/
H A Ddml_top_types.h371 unsigned long dcfclk_khz; member
383 unsigned long dcfclk_khz; member
388 unsigned long dcfclk_khz; member
393 unsigned long dcfclk_khz; member
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_clk_mgr.c190 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn316_update_clocks()
191 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn316_update_clocks()
192 dcn316_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in dcn316_update_clocks()
241 cmd.notify_clocks.clocks.dcfclk_khz = clk_mgr_base->clks.dcfclk_khz; in dcn316_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_clk_mgr.c182 new_clocks->dcfclk_khz = UNSUPPORTED_DCFCLK; in dcn315_update_clocks()
183 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn315_update_clocks()
184 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn315_update_clocks()
185 dcn315_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in dcn315_update_clocks()
237 cmd.notify_clocks.clocks.dcfclk_khz = clk_mgr_base->clks.dcfclk_khz; in dcn315_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
H A Dvg_clk_mgr.c142 …if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz) && !dc-… in vg_update_clocks()
143 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in vg_update_clocks()
144 dcn301_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in vg_update_clocks()
472 else if (a->dcfclk_khz != b->dcfclk_khz) in vg_are_clock_states_equal()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
H A Drn_clk_mgr.c174 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in rn_update_clocks()
175 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in rn_update_clocks()
176 rn_vbios_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in rn_update_clocks()
535 else if (a->dcfclk_khz != b->dcfclk_khz) in rn_are_clock_states_equal()
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/
H A Ddml2_internal_shared_types.h190 unsigned long dcfclk_khz; member
199 unsigned long dcfclk_khz; member
/linux/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_wrapper.h60 unsigned int dcfclk_khz; member
H A Ddml2_utils.c185 context->bw_ctx.bw.dcn.clk.dcfclk_khz = out_clks->dcfclk_khz; in dml2_copy_clocks_to_dc_state()
H A Ddml2_wrapper.c577 …out_clks.dcfclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dc… in dml2_validate_and_build_resource()
635 …out_clks.dcfclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dc… in dml2_validate_and_build_resource()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource_helpers.c778 …if (dcn32_subvp_in_use(dc, context) && context->bw_ctx.bw.dcn.clk.dcfclk_khz <= MIN_SUBVP_DCFCLK_K… in dcn32_override_min_req_dcfclk()
779 context->bw_ctx.bw.dcn.clk.dcfclk_khz = MIN_SUBVP_DCFCLK_KHZ; in dcn32_override_min_req_dcfclk()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c502 context->bw_ctx.bw.dcn.clk.dcfclk_khz = dcfclk; // always should be vlevel 0 in dcn31_calculate_wm_and_dlg_fp()
567 context->bw_ctx.bw.dcn.clk.dcfclk_khz = 0; in dcn31_calculate_wm_and_dlg_fp()
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
H A Ddml2_core_dcn4.c432 …in_out->mode_support_result.global.active.dcfclk_khz = (unsigned long)(core->clean_me_up.mode_lib.… in core_dcn4_mode_support()
436 …in_out->mode_support_result.global.svp_prefetch.dcfclk_khz = (unsigned long)core->clean_me_up.mode… in core_dcn4_mode_support()
/linux/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calcs.c1163 context->bw_ctx.bw.dcn.clk.dcfclk_khz = (int)(v->dcfclk * 1000); in dcn_validate_bandwidth()
1427 dc, DM_PP_CLOCK_TYPE_DCFCLK, clocks->dcfclk_khz); in dcn_find_dcfclk_suits_all()
/linux/drivers/gpu/drm/amd/display/dmub/inc/
H A Ddmub_cmd.h2066 uint32_t dcfclk_khz; /**< dcfclk kHz */ member
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c1656 context->bw_ctx.bw.dcn.clk.dcfclk_khz = context->bw_ctx.dml.vba.DCFCLK * 1000; in dcn32_calculate_dlg_params()
1766 context->bw_ctx.bw.dcn.clk.dcfclk_khz = 0; in dcn32_calculate_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c1155 context->bw_ctx.bw.dcn.clk.dcfclk_khz = context->bw_ctx.dml.vba.DCFCLK * 1000; in dcn20_calculate_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.c524 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_khz, in dcn10_log_hw_state()

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