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Searched refs:dcfclk_deep_sleep_khz (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
H A Ddcn20_clk_mgr.c272 new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) { in dcn2_update_clocks()
273 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn2_update_clocks()
275 pp_smu->set_min_deep_sleep_dcfclk(&pp_smu->pp_smu, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_deep_sleep_khz)); in dcn2_update_clocks()
365 new_clocks->dcfclk_deep_sleep_khz, clk_mgr->clks.dcfclk_deep_sleep_khz)) { in dcn2_update_clocks_fpga()
366 clk_mgr->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn2_update_clocks_fpga()
485 else if (a->dcfclk_deep_sleep_khz ! in dcn2_are_clock_states_equal()
[all...]
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv1_clk_mgr.c251 new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) { in rv1_update_clocks()
252 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in rv1_update_clocks()
266 pp_smu->set_min_deep_sleep_dcfclk(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_deep_sleep_khz)); in rv1_update_clocks()
286 pp_smu->set_min_deep_sleep_dcfclk(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_deep_sleep_khz)); in rv1_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
H A Ddcn201_clk_mgr.c127 new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) in dcn201_update_clocks()
128 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn201_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/
H A Ddcn42_clk_mgr.c300 new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) { in dcn42_update_clocks()
301 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn42_update_clocks()
305 clk_mgr_base->clks.dcfclk_deep_sleep_khz < (int)dc->debug.min_deep_sleep_dcfclk_khz) in dcn42_update_clocks()
306 clk_mgr_base->clks.dcfclk_deep_sleep_khz = (int)dc->debug.min_deep_sleep_dcfclk_khz; in dcn42_update_clocks()
308 dcn42_smu_set_min_deep_sleep_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_deep_sleep_khz); in dcn42_update_clocks()
362 cmd.notify_clocks.clocks.dcfclk_deep_sleep_khz = in dcn42_update_clocks()
363 clk_mgr_base->clks.dcfclk_deep_sleep_khz;
388 else if (a->dcfclk_deep_sleep_khz ! in dcn42_are_clock_states_equal()
[all...]
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/
H A Ddml21_translation_helper.c887 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.deepsleep_dcfclk_khz; in dml21_extract_watermark_sets()
1021 min_clocks->dcfclk_deep_sleep_khz = 0;
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c571 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = 0; in dcn31_calculate_wm_and_dlg_fp()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddml2_utils.c288 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = (unsigned int)in_ctx->v20.dml_core_ctx.mp.DCFCLKDeepSleep * 1000; in dml2_calculate_rq_and_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc.h746 int dcfclk_deep_sleep_khz;
690 int dcfclk_deep_sleep_khz; global() member
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c1638 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = (int)(context->bw_ctx.dml.vba.DCFCLKDeepSleep * 1000); in dcn32_calculate_dlg_params()
1741 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = 0; in dcn32_calculate_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c1165 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = (int)(context->bw_ctx.dml.vba.DCFCLKDeepSleep * 1000.0); in dcn20_calculate_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c63 clocks->dcfclk_deep_sleep_khz = DCN3_2_DCFCLK_DS_INIT_KHZ; in dcn401_initialize_min_clocks()