| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
| H A D | dcn20_clk_mgr.c | 269 new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) { in dcn2_update_clocks()
270 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn2_update_clocks()
272 …_min_deep_sleep_dcfclk(&pp_smu->pp_smu, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_deep_sleep_khz)); in dcn2_update_clocks()
362 new_clocks->dcfclk_deep_sleep_khz, clk_mgr->clks.dcfclk_deep_sleep_khz)) { in dcn2_update_clocks_fpga()
363 clk_mgr->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn2_update_clocks_fpga()
482 else if (a->dcfclk_deep_sleep_khz != b->dcfclk_deep_sleep_khz) in dcn2_are_clock_states_equal()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| H A D | rv1_clk_mgr.c | 251 new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) { in rv1_update_clocks()
252 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in rv1_update_clocks()
266 …mu->set_min_deep_sleep_dcfclk(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_deep_sleep_khz)); in rv1_update_clocks()
286 …mu->set_min_deep_sleep_dcfclk(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_deep_sleep_khz)); in rv1_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
| H A D | dcn201_clk_mgr.c | 127 new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) in dcn201_update_clocks()
128 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn201_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| H A D | dcn30_clk_mgr.c | 239 …(should_set_clock(safe_to_lower, new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep… in dcn3_update_clocks()
240 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn3_update_clocks()
241 …mu_set_min_deep_sleep_dcef_clk(clk_mgr, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_deep_sleep_khz)); in dcn3_update_clocks()
444 else if (a->dcfclk_deep_sleep_khz != b->dcfclk_deep_sleep_khz) in dcn3_are_clock_states_equal()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| H A D | dcn316_clk_mgr.c | 196 new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) { in dcn316_update_clocks()
197 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn316_update_clocks()
198 dcn316_smu_set_min_deep_sleep_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_deep_sleep_khz); in dcn316_update_clocks()
242 cmd.notify_clocks.clocks.dcfclk_deep_sleep_khz = in dcn316_update_clocks()
243 clk_mgr_base->clks.dcfclk_deep_sleep_khz; in dcn316_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| H A D | dcn35_clk_mgr.c | 384 new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) { in dcn35_update_clocks()
385 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn35_update_clocks()
386 dcn35_smu_set_min_deep_sleep_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_deep_sleep_khz); in dcn35_update_clocks()
441 cmd.notify_clocks.clocks.dcfclk_deep_sleep_khz = in dcn35_update_clocks()
442 clk_mgr_base->clks.dcfclk_deep_sleep_khz; in dcn35_update_clocks()
497 else if (a->dcfclk_deep_sleep_khz != b->dcfclk_deep_sleep_khz) in dcn35_are_clock_states_equal()
1032 new_clocks->dcfclk_deep_sleep_khz, clk_mgr->clks.dcfclk_deep_sleep_khz)) { in dcn35_update_clocks_fpga()
1033 clk_mgr->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn35_update_clocks_fpga()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| H A D | vg_clk_mgr.c | 148 …new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz) && !dc->debug.disable… in vg_update_clocks()
149 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in vg_update_clocks()
150 dcn301_smu_set_min_deep_sleep_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_deep_sleep_khz); in vg_update_clocks()
474 else if (a->dcfclk_deep_sleep_khz != b->dcfclk_deep_sleep_khz) in vg_are_clock_states_equal()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| H A D | rn_clk_mgr.c | 180 new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) { in rn_update_clocks()
181 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in rn_update_clocks()
182 rn_vbios_smu_set_min_deep_sleep_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_deep_sleep_khz); in rn_update_clocks()
537 else if (a->dcfclk_deep_sleep_khz != b->dcfclk_deep_sleep_khz) in rn_are_clock_states_equal()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| H A D | dcn315_clk_mgr.c | 189 new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) { in dcn315_update_clocks()
190 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn315_update_clocks()
191 dcn315_smu_set_min_deep_sleep_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_deep_sleep_khz); in dcn315_update_clocks()
238 cmd.notify_clocks.clocks.dcfclk_deep_sleep_khz = in dcn315_update_clocks()
239 clk_mgr_base->clks.dcfclk_deep_sleep_khz; in dcn315_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/ |
| H A D | dcn401_clk_mgr.c | 686 …(should_set_clock(safe_to_lower, new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep… in dcn401_update_clocks_legacy()
687 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn401_update_clocks_legacy()
689 …mu_set_min_deep_sleep_dcef_clk(clk_mgr, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_deep_sleep_khz)); in dcn401_update_clocks_legacy()
1020 …(should_set_clock(safe_to_lower, new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep… in dcn401_build_update_bandwidth_clocks_sequence()
1021 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn401_build_update_bandwidth_clocks_sequence()
1023 …date_deep_sleep_dcfclk_params.freq_mhz = khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_deep_sleep_khz); in dcn401_build_update_bandwidth_clocks_sequence()
1566 else if (a->dcfclk_deep_sleep_khz != b->dcfclk_deep_sleep_khz) in dcn401_are_clock_states_equal()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
| H A D | dcn32_clk_mgr.c | 686 …(should_set_clock(safe_to_lower, new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep… in dcn32_update_clocks()
688 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn32_update_clocks()
689 …mu_set_min_deep_sleep_dcef_clk(clk_mgr, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_deep_sleep_khz)); in dcn32_update_clocks()
1081 else if (a->dcfclk_deep_sleep_khz != b->dcfclk_deep_sleep_khz) in dcn32_are_clock_states_equal()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | dcn31_fpu.c | 568 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = 0; in dcn31_calculate_wm_and_dlg_fp()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2/ |
| H A D | dml2_utils.c | 285 …context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = (unsigned int)in_ctx->v20.dml_core_ctx.mp.DCFCL… in dml2_calculate_rq_and_dlg_params()
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| /linux/drivers/gpu/drm/amd/display/dmub/inc/ |
| H A D | dmub_cmd.h | 2067 uint32_t dcfclk_deep_sleep_khz; /**< dcfclk deep sleep kHz */ member
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 1659 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = context->bw_ctx.dml.vba.DCFCLKDeepSleep * 1000; in dcn32_calculate_dlg_params()
1767 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = 0; in dcn32_calculate_dlg_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| H A D | dcn_calcs.c | 1162 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = (int)(v->dcf_clk_deep_sleep * 1000); in dcn_validate_bandwidth()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.c | 1162 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = context->bw_ctx.dml.vba.DCFCLKDeepSleep * 1000; in dcn20_calculate_dlg_params()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| H A D | dcn10_hwseq.c | 525 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz, in dcn10_log_hw_state()
|