Searched refs:dcfclk (Results 1 – 3 of 3) sorted by relevance
760 regs_and_bypass->dcfclk = count_to_khz(internal.CLK8_CLK0_CURRENT_CNT, timer_ths, refclk_khz); in dcn60_dump_clk_registers()777 regs_and_bypass->dcfclk, in dcn60_dump_clk_registers()928 clk_register_dump.dcfclk, in dcn60_auto_dpm_test_log()1061 action->dcfclk.update = true; in dcn60_make_bandwidth_clocks_update_action()1062 action->dcfclk.send_message = dcfclk_dpm_enabled; in dcn60_make_bandwidth_clocks_update_action()1173 if (action->dcfclk.send_message) { in dcn60_build_bandwidth_clocks_block_sequence_with_action()1271 if (action->dcfclk.update) in dcn60_update_bandwidth_clocks_state_with_action()
646 regs_and_bypass->dcfclk = internal.CLK1_CLK3_CURRENT_CNT / 10; in dcn35_save_clk_registers()671 regs_and_bypass->dcfclk, in dcn35_save_clk_registers()
445 uint8_t dcfclk : 1; member