Searched refs:dc_clocks (Results 1 – 11 of 11) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| H A D | dcn31_clk_mgr.h | 42 bool dcn31_are_clock_states_equal(struct dc_clocks *a,
43 struct dc_clocks *b);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| H A D | dcn35_clk_mgr.h | 49 bool dcn35_are_clock_states_equal(struct dc_clocks *a,
50 struct dc_clocks *b);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| H A D | rv1_clk_mgr.c | 36 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); in rv1_init_clocks()
39 static int rv1_determine_dppclk_threshold(struct clk_mgr_internal *clk_mgr, struct dc_clocks *new_c… in rv1_determine_dppclk_threshold()
88 struct dc_clocks *new_clocks, in ramp_up_dispclk_with_dpp()
194 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in rv1_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
| H A D | dcn20_clk_mgr.c | 221 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn2_update_clocks()
349 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn2_update_clocks_fpga()
405 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); in dcn2_init_clocks()
469 static bool dcn2_are_clock_states_equal(struct dc_clocks *a, in dcn2_are_clock_states_equal()
470 struct dc_clocks *b) in dcn2_are_clock_states_equal()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
| H A D | dcn201_clk_mgr.c | 77 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); in dcn201_init_clocks()
89 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn201_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/ |
| H A D | dcn42_clk_mgr.c | 217 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn42_update_clocks()
373 bool dcn42_are_clock_states_equal(struct dc_clocks *a, in dcn42_are_clock_states_equal()
374 struct dc_clocks *b) in dcn42_are_clock_states_equal()
517 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); in init_clk_states()
782 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn42_update_clocks_fpga()
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dm_helpers.h | 202 struct dc_clocks *clks);
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| H A D | dc.h | 682 struct dc_clocks { struct
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_helpers.c | 1205 void dm_set_dcn_clocks(struct dc_context *ctx, struct dc_clocks *clks) in dm_set_dcn_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/ |
| H A D | dml21_translation_helper.c | 968 struct dc_clocks *min_clocks = &context->bw_ctx.bw.dcn.clk; in dml21_init_min_clocks_for_dc_state()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 60 struct dc_clocks *clocks = &dc->current_state->bw_ctx.bw.dcn.clk; in dcn401_initialize_min_clocks()
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