Home
last modified time | relevance | path

Searched refs:ctrl0 (Results 1 – 22 of 22) sorted by relevance

/linux/drivers/input/rmi4/
H A Drmi_f01.c117 u8 ctrl0; member
412 &f01->device_control.ctrl0); in rmi_f01_probe()
422 f01->device_control.ctrl0 &= ~RMI_F01_CTRL0_NOSLEEP_BIT; in rmi_f01_probe()
425 f01->device_control.ctrl0 |= RMI_F01_CTRL0_NOSLEEP_BIT; in rmi_f01_probe()
434 if ((f01->device_control.ctrl0 & RMI_F01_CTRL0_SLEEP_MODE_MASK) != in rmi_f01_probe()
438 f01->device_control.ctrl0 &= ~RMI_F01_CTRL0_SLEEP_MODE_MASK; in rmi_f01_probe()
441 f01->device_control.ctrl0 |= RMI_F01_CTRL0_CONFIGURED_BIT; in rmi_f01_probe()
444 f01->device_control.ctrl0); in rmi_f01_probe()
590 f01->device_control.ctrl0); in rmi_f01_config()
637 f01->device_control.ctrl0 & RMI_F01_CTRL0_NOSLEEP_BIT; in rmi_f01_suspend()
[all …]
/linux/drivers/phy/samsung/
H A Dphy-exynos5250-usb2.c198 u32 ctrl0; in exynos5250_power_on() local
242 ctrl0 = readl(drv->reg_phy + EXYNOS_5250_HOSTPHYCTRL0); in exynos5250_power_on()
244 ctrl0 &= ~EXYNOS_5250_HOSTPHYCTRL0_FSEL_MASK; in exynos5250_power_on()
245 ctrl0 |= drv->ref_reg_val << in exynos5250_power_on()
249 ctrl0 &= ~(EXYNOS_5250_HOSTPHYCTRL0_PHYSWRST | in exynos5250_power_on()
254 ctrl0 |= EXYNOS_5250_HOSTPHYCTRL0_LINKSWRST | in exynos5250_power_on()
257 writel(ctrl0, drv->reg_phy + EXYNOS_5250_HOSTPHYCTRL0); in exynos5250_power_on()
259 ctrl0 &= ~(EXYNOS_5250_HOSTPHYCTRL0_LINKSWRST | in exynos5250_power_on()
261 writel(ctrl0, drv->reg_phy + EXYNOS_5250_HOSTPHYCTRL0); in exynos5250_power_on()
324 u32 ctrl0; in exynos5250_power_off() local
[all …]
/linux/drivers/media/platform/nxp/
H A Dimx-pxp.c763 u32 ctrl0; in pxp_imx6ull_data_path_ctrl0() local
765 ctrl0 = 0; in pxp_imx6ull_data_path_ctrl0()
766 ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX15_SEL(3); in pxp_imx6ull_data_path_ctrl0()
768 ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX14_SEL(1); in pxp_imx6ull_data_path_ctrl0()
769 ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX13_SEL(3); in pxp_imx6ull_data_path_ctrl0()
771 ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX12_SEL(0); in pxp_imx6ull_data_path_ctrl0()
773 ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX11_SEL(1); in pxp_imx6ull_data_path_ctrl0()
774 ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX10_SEL(3); in pxp_imx6ull_data_path_ctrl0()
775 ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX9_SEL(3); in pxp_imx6ull_data_path_ctrl0()
777 ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX8_SEL(0); in pxp_imx6ull_data_path_ctrl0()
[all …]
/linux/drivers/spi/
H A Dspi-mxs.c175 u32 ctrl0; in mxs_spi_txrx_dma() local
192 ctrl0 = readl(ssp->base + HW_SSP_CTRL0); in mxs_spi_txrx_dma()
193 ctrl0 &= ~(BM_SSP_CTRL0_XFER_COUNT | BM_SSP_CTRL0_IGNORE_CRC | in mxs_spi_txrx_dma()
195 ctrl0 |= BM_SSP_CTRL0_DATA_XFER; in mxs_spi_txrx_dma()
198 ctrl0 |= BM_SSP_CTRL0_READ; in mxs_spi_txrx_dma()
210 ctrl0 |= BM_SSP_CTRL0_IGNORE_CRC; in mxs_spi_txrx_dma()
213 ctrl0 &= ~BM_SSP_CTRL0_XFER_COUNT; in mxs_spi_txrx_dma()
214 ctrl0 |= min; in mxs_spi_txrx_dma()
217 dma_xfer[sg_count].pio[0] = ctrl0; in mxs_spi_txrx_dma()
/linux/drivers/thermal/
H A Darmada_thermal.c324 u32 ctrl0; in armada_select_channel() local
333 regmap_read(priv->syscon, data->syscon_control0_off, &ctrl0); in armada_select_channel()
334 ctrl0 &= ~CONTROL0_TSEN_START; in armada_select_channel()
335 regmap_write(priv->syscon, data->syscon_control0_off, ctrl0); in armada_select_channel()
338 ctrl0 &= ~(CONTROL0_TSEN_MODE_MASK << CONTROL0_TSEN_MODE_SHIFT); in armada_select_channel()
343 ctrl0 |= CONTROL0_TSEN_MODE_EXTERNAL << in armada_select_channel()
346 ctrl0 &= ~(CONTROL0_TSEN_CHAN_MASK << CONTROL0_TSEN_CHAN_SHIFT); in armada_select_channel()
347 ctrl0 |= (channel - 1) << CONTROL0_TSEN_CHAN_SHIFT; in armada_select_channel()
351 regmap_write(priv->syscon, data->syscon_control0_off, ctrl0); in armada_select_channel()
355 ctrl0 |= CONTROL0_TSEN_START; in armada_select_channel()
[all …]
/linux/drivers/net/ethernet/huawei/hinic3/
H A Dhinic3_eqs.c367 u32 ctrl0, u32 ctrl1) in hinic3_set_ceq_ctrl_reg() argument
375 ceq_ctrl.ctrl0 = ctrl0; in hinic3_set_ceq_ctrl_reg()
396 u32 mask, ctrl0, ctrl1; in set_eq_ctrls() local
410 ctrl0 = hinic3_hwif_read_reg(hwif, HINIC3_CSR_AEQ_CTRL_0_ADDR); in set_eq_ctrls()
411 ctrl0 = (ctrl0 & ~mask) | in set_eq_ctrls()
416 hinic3_hwif_write_reg(hwif, HINIC3_CSR_AEQ_CTRL_0_ADDR, ctrl0); in set_eq_ctrls()
425 ctrl0 = CEQ_CTRL_0_SET(eq->msix_entry_idx, INTR_IDX) | in set_eq_ctrls()
435 err = hinic3_set_ceq_ctrl_reg(eq->hwdev, eq->q_id, ctrl0, in set_eq_ctrls()
/linux/drivers/iio/proximity/
H A Dsx9310.c758 unsigned int ctrl0; in sx9310_init_compensation() local
760 ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &ctrl0); in sx9310_init_compensation()
766 ctrl0 | SX9310_REG_PROX_CTRL0_SENSOREN_MASK); in sx9310_init_compensation()
776 regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, ctrl0); in sx9310_init_compensation()
944 u8 ctrl0; in sx9310_suspend() local
955 ctrl0 = data->suspend_ctrl & ~SX9310_REG_PROX_CTRL0_SENSOREN_MASK; in sx9310_suspend()
956 ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, ctrl0); in sx9310_suspend()
/linux/drivers/net/ethernet/huawei/hinic/
H A Dhinic_hw_eqs.c425 u32 val, ctrl0; in get_ctrl0_val() local
438 ctrl0 = HINIC_AEQ_CTRL_0_SET(msix_entry->entry, INT_IDX) | in get_ctrl0_val()
444 val |= ctrl0; in get_ctrl0_val()
457 ctrl0 = HINIC_CEQ_CTRL_0_SET(msix_entry->entry, INTR_IDX) | in get_ctrl0_val()
464 val |= ctrl0; in get_ctrl0_val()
552 ceq_ctrl.ctrl0 = get_ctrl0_val(eq, addr); in set_ceq_ctrl_reg()
H A Dhinic_hw_dev.h330 u32 ctrl0; member
/linux/drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/
H A Dchcr_ipsec.c467 u32 ctrl0, qidx; in copy_cpltx_pktxt() local
483 ctrl0 = TXPKT_OPCODE_V(CPL_TX_PKT_XT) | TXPKT_INTF_V(pi->tx_chan) | in copy_cpltx_pktxt()
490 cpl->ctrl0 = htonl(ctrl0); in copy_cpltx_pktxt()
/linux/drivers/net/can/cc770/
H A Dcc770.h14 u8 ctrl0; member
/linux/drivers/perf/hisilicon/
H A Dhisi_uncore_noc_pmu.c39 #define NOC_PMU_EVENT_CTRLn(ctrl0, n) ((ctrl0) + 4 * (n)) argument
/linux/drivers/crypto/bcm/
H A Dspu2.h76 __le64 ctrl0; member
/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dsge.c1492 u32 wr_mid, ctrl0, op, sgl_off = 0; in cxgb4_eth_xmit() local
1693 ctrl0 = TXPKT_OPCODE_V(CPL_TX_PKT_XT) | TXPKT_INTF_V(pi->tx_chan) | in cxgb4_eth_xmit()
1696 ctrl0 |= TXPKT_TSTAMP_F; in cxgb4_eth_xmit()
1699 ctrl0 |= TXPKT_OVLAN_IDX_V(q->dcb_prio); in cxgb4_eth_xmit()
1701 ctrl0 |= TXPKT_T5_OVLAN_IDX_V(q->dcb_prio); in cxgb4_eth_xmit()
1703 cpl->ctrl0 = htonl(ctrl0); in cxgb4_eth_xmit()
1998 cpl->ctrl0 = cpu_to_be32(TXPKT_OPCODE_V(CPL_TX_PKT_XT) | in cxgb4_vf_eth_xmit()
2321 cpl->ctrl0 = cpu_to_be32(TXPKT_OPCODE_V(CPL_TX_PKT_XT) | in ethofld_hard_xmit()
2660 u32 ctrl0, ndesc, flits; in cxgb4_selftest_lb_pkt() local
2695 ctrl0 = TXPKT_OPCODE_V(CPL_TX_PKT_XT) | TXPKT_PF_V(adap->pf) | in cxgb4_selftest_lb_pkt()
[all …]
H A Dt4_msg.h828 __be32 ctrl0; member
/linux/drivers/net/wireless/ath/ath9k/
H A Dar9003_paprd.c141 static const u32 ctrl0[3] = { in ar9003_paprd_setup_single_table() local
184 REG_RMW_FIELD(ah, ctrl0[i], in ar9003_paprd_setup_single_table()
198 REG_RMW_FIELD(ah, ctrl0[i], in ar9003_paprd_setup_single_table()
/linux/drivers/video/fbdev/mmp/hw/
H A Dmmp_ctrl.h1025 u32 ctrl0; member
1057 u32 ctrl0; member
/linux/drivers/gpu/drm/msm/adreno/
H A Da6xx_gpu_state.c236 static int vbif_debugbus_read(struct msm_gpu *gpu, u32 ctrl0, u32 ctrl1, in vbif_debugbus_read() argument
241 gpu_write(gpu, ctrl0, reg); in vbif_debugbus_read()
/linux/drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/
H A Dchcr_ktls.c1042 cpl->ctrl0 = htonl(TXPKT_OPCODE_V(CPL_TX_PKT) | TXPKT_INTF_V(tx_chan) | in chcr_ktls_write_tcp_options()
1626 cpl->ctrl0 = htonl(TXPKT_OPCODE_V(CPL_TX_PKT) | in chcr_ktls_tunnel_pkt()
/linux/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2_main.c6431 u32 old_ctrl0, ctrl0; in mvpp2_gmac_config() local
6435 old_ctrl0 = ctrl0 = readl(port->base + MVPP2_GMAC_CTRL_0_REG); in mvpp2_gmac_config()
6439 ctrl0 &= ~MVPP2_GMAC_PORT_TYPE_MASK; in mvpp2_gmac_config()
6476 ctrl0 |= MVPP2_GMAC_PORT_TYPE_MASK; in mvpp2_gmac_config()
6479 if (old_ctrl0 != ctrl0) in mvpp2_gmac_config()
6480 writel(ctrl0, port->base + MVPP2_GMAC_CTRL_0_REG); in mvpp2_gmac_config()
/linux/drivers/net/wireless/ath/ath6kl/
H A Dhtc_mbox.c360 int ctrl0, int ctrl1) in ath6kl_htc_tx_prep_pkt() argument
370 hdr->ctrl[0] = ctrl0; in ath6kl_htc_tx_prep_pkt()
/linux/drivers/net/ethernet/chelsio/cxgb4vf/
H A Dsge.c1354 cpl->ctrl0 = cpu_to_be32(TXPKT_OPCODE_V(CPL_TX_PKT_XT) | in t4vf_eth_xmit()