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Searched refs:csr_write (Results 1 – 22 of 22) sorted by relevance

/linux/tools/testing/selftests/kvm/loongarch/
H A Dpmu_test.c65 csr_write(0, LOONGARCH_CSR_PERFCNTR0); in guest_pmu_base_test()
66 csr_write(0, LOONGARCH_CSR_PERFCNTR1); in guest_pmu_base_test()
67 csr_write(0, LOONGARCH_CSR_PERFCNTR2); in guest_pmu_base_test()
68 csr_write(0, LOONGARCH_CSR_PERFCNTR3); in guest_pmu_base_test()
70 csr_write(PMU_ENVENT_ENABLED | in guest_pmu_base_test()
73 csr_write(PMU_ENVENT_ENABLED | in guest_pmu_base_test()
76 csr_write(PMU_ENVENT_ENABLED | in guest_pmu_base_test()
79 csr_write(PMU_ENVENT_ENABLED | in guest_pmu_base_test()
119 csr_write(PMU_OVERFLOW - 1, LOONGARCH_CSR_PERFCNTR0); in guest_pmu_interrupt_test()
120 …csr_write(PMU_ENVENT_ENABLED | CSR_PERFCTRL_PMIE | LOONGARCH_PMU_EVENT_CYCLES, LOONGARCH_CSR_PERFC… in guest_pmu_interrupt_test()
H A Darch_timer.c24 csr_write(CSR_TINTCLR_TI, LOONGARCH_CSR_TINTCLR); in do_idle()
44 csr_write(CSR_TINTCLR_TI, LOONGARCH_CSR_TINTCLR); in guest_irq_handler()
61 csr_write(CSR_TINTCLR_TI, LOONGARCH_CSR_TINTCLR); in guest_irq_handler()
/linux/arch/loongarch/power/
H A Dsuspend.c49 csr_write(eentry, LOONGARCH_CSR_EENTRY); in loongarch_common_resume()
50 csr_write(eentry, LOONGARCH_CSR_MERRENTRY); in loongarch_common_resume()
51 csr_write(tlbrentry, LOONGARCH_CSR_TLBRENTRY); in loongarch_common_resume()
53 csr_write(saved_regs.pgd, LOONGARCH_CSR_PGDL); in loongarch_common_resume()
54 csr_write(saved_regs.kpgd, LOONGARCH_CSR_PGDH); in loongarch_common_resume()
59 csr_write(saved_regs.pcpu_base, PERCPU_BASE_KS); in loongarch_common_resume()
H A Dhibernate.c36 csr_write(saved_pcpu_base, PERCPU_BASE_KS); in restore_processor_state()
/linux/arch/riscv/kernel/
H A Dsuspend.c46 csr_write(CSR_SCRATCH, 0); in suspend_restore_csrs()
48 csr_write(CSR_ENVCFG, context->envcfg); in suspend_restore_csrs()
49 csr_write(CSR_TVEC, context->tvec); in suspend_restore_csrs()
50 csr_write(CSR_IE, context->ie); in suspend_restore_csrs()
55 csr_write(CSR_STIMECMP, ULONG_MAX); in suspend_restore_csrs()
56 csr_write(CSR_STIMECMPH, context->stimecmph); in suspend_restore_csrs()
58 csr_write(CSR_STIMECMP, context->stimecmp); in suspend_restore_csrs()
61 csr_write(CSR_SATP, context->satp); in suspend_restore_csrs()
H A Dprocess.c130 csr_write(CSR_STATUS, (tmp & ~SR_UXL) | SR_UXL_32); in compat_mode_detect()
134 csr_write(CSR_STATUS, tmp); in compat_mode_detect()
/linux/tools/testing/selftests/kvm/include/loongarch/
H A Darch_timer.h41 csr_write(0, LOONGARCH_CSR_TCFG); in disable_timer()
50 csr_write(val, LOONGARCH_CSR_ECFG); in timer_irq_enable()
59 csr_write(val, LOONGARCH_CSR_ECFG); in timer_irq_disable()
70 csr_write(val, LOONGARCH_CSR_TCFG); in timer_set_next_cmp_ms()
H A Dprocessor.h156 #define csr_write(v, csr) \
142 #define csr_write( global() macro
/linux/drivers/clocksource/
H A Dtimer-riscv.c38 csr_write(CSR_STIMECMP, ULONG_MAX); in riscv_clock_event_stop()
40 csr_write(CSR_STIMECMPH, ULONG_MAX); in riscv_clock_event_stop()
53 csr_write(CSR_STIMECMP, ULONG_MAX); in riscv_clock_next_event()
54 csr_write(CSR_STIMECMPH, next_tval >> 32); in riscv_clock_next_event()
55 csr_write(CSR_STIMECMP, next_tval & 0xFFFFFFFF); in riscv_clock_next_event()
57 csr_write(CSR_STIMECMP, next_tval); in riscv_clock_next_event()
/linux/drivers/firmware/efi/libstub/
H A Dloongarch.c96 csr_write(CSR_DMW0_INIT, LOONGARCH_CSR_DMWIN0); in efi_boot_kernel()
97 csr_write(CSR_DMW1_INIT, LOONGARCH_CSR_DMWIN1); in efi_boot_kernel()
98 csr_write(CSR_DMW2_INIT, LOONGARCH_CSR_DMWIN2); in efi_boot_kernel()
99 csr_write(CSR_DMW3_INIT, LOONGARCH_CSR_DMWIN3); in efi_boot_kernel()
H A Driscv.c96 csr_write(CSR_SATP, 0); in efi_enter_kernel()
/linux/arch/loongarch/kernel/
H A Dtime.c57 csr_write(timer_config, LOONGARCH_CSR_TCFG); in constant_set_state_oneshot()
74 csr_write(timer_config, LOONGARCH_CSR_TCFG); in constant_set_state_periodic()
89 csr_write(timer_config, LOONGARCH_CSR_TCFG); in constant_set_state_shutdown()
102 csr_write(timer_config, LOONGARCH_CSR_TCFG); in constant_timer_next_event()
141 csr_write(init_offset, LOONGARCH_CSR_CNTC); in sync_counter()
/linux/arch/riscv/mm/
H A Dcontext.c192 csr_write(CSR_SATP, virt_to_pfn(mm->pgd) | in set_mm_asid()
203 csr_write(CSR_SATP, virt_to_pfn(mm->pgd) | satp_mode); in set_mm_noasid()
234 csr_write(CSR_SATP, asid_bits); in asids_init()
237 csr_write(CSR_SATP, old); in asids_init()
H A Dkasan_init.c489 csr_write(CSR_SATP, PFN_DOWN(__pa(tmp_pg_dir)) | satp_mode); in kasan_init()
534 csr_write(CSR_SATP, PFN_DOWN(__pa(swapper_pg_dir)) | satp_mode); in kasan_init()
/linux/arch/riscv/include/asm/
H A Dvector.h160 csr_write(CSR_STATUS, status); in __vstate_csr_save()
186 csr_write(CSR_VXRM, (src->vcsr >> CSR_VXRM_SHIFT) & CSR_VXRM_MASK); in __vstate_csr_restore()
187 csr_write(CSR_VXSAT, src->vcsr & CSR_VXSAT_MASK); in __vstate_csr_restore()
190 csr_write(CSR_STATUS, status); in __vstate_csr_restore()
192 csr_write(CSR_VCSR, src->vcsr); in __vstate_csr_restore()
H A Dswitch_to.h81 csr_write(CSR_ENVCFG, envcfg); in envcfg_update_bits()
/linux/drivers/cache/
H A Dax45mp_cache.c74 csr_write(AX45MP_CCTL_REG_UCCTLBEGINADDR_NUM, start); in ax45mp_cpu_cache_operation()
75 csr_write(AX45MP_CCTL_REG_UCCTLCOMMAND_NUM, l1_op); in ax45mp_cpu_cache_operation()
/linux/arch/loongarch/include/asm/
H A Dloongarch.h194 #define csr_write(val, reg) csr_write32(val, reg) macro
198 #define csr_write(val, reg) csr_write64(val, reg) macro
1345 #define write_csr_entryhi(val) csr_write(val, LOONGARCH_CSR_TLBEHI)
1347 #define write_csr_entrylo0(val) csr_write(val, LOONGARCH_CSR_TLBELO0)
1349 #define write_csr_entrylo1(val) csr_write(val, LOONGARCH_CSR_TLBELO1)
1360 #define write_csr_prcfg1(val) csr_write(val, LOONGARCH_CSR_PRCFG1)
1362 #define write_csr_prcfg2(val) csr_write(val, LOONGARCH_CSR_PRCFG2)
1364 #define write_csr_prcfg3(val) csr_write(val, LOONGARCH_CSR_PRCFG3)
1371 #define write_csr_impctl1(val) csr_write(val, LOONGARCH_CSR_IMPCTL1)
1372 #define write_csr_impctl2(val) csr_write(val, LOONGARCH_CSR_IMPCTL2)
/linux/arch/riscv/kvm/
H A Dtlb.c107 csr_write(CSR_HGATP, hgatp); in kvm_riscv_local_hfence_vvma_asid_gva()
119 csr_write(CSR_HGATP, hgatp); in kvm_riscv_local_hfence_vvma_asid_all()
147 csr_write(CSR_HGATP, hgatp); in kvm_riscv_local_hfence_vvma_gva()
158 csr_write(CSR_HGATP, hgatp); in kvm_riscv_local_hfence_vvma_all()
H A Dvcpu_exit.c125 csr_write(CSR_STVEC, old_stvec); in kvm_riscv_vcpu_unpriv_read()
126 csr_write(CSR_HSTATUS, old_hstatus); in kvm_riscv_vcpu_unpriv_read()
/linux/tools/testing/selftests/kvm/include/riscv/
H A Darch_timer.h32 csr_write(CSR_STIMECMP, cval); in timer_set_cmp()
/linux/drivers/perf/
H A Driscv_pmu_sbi.c786 csr_write(CSR_SCOUNTEREN, in pmu_sbi_set_scounteren()
795 csr_write(CSR_SCOUNTEREN, in pmu_sbi_reset_scounteren()
1158 csr_write(CSR_SCOUNTEREN, 0x7); in pmu_sbi_starting_cpu()
1160 csr_write(CSR_SCOUNTEREN, 0x2); in pmu_sbi_starting_cpu()
1184 csr_write(CSR_SCOUNTEREN, 0x0); in pmu_sbi_dying_cpu()
1385 csr_write(CSR_SCOUNTEREN, 0x7); in riscv_pmu_update_counter_access()
1387 csr_write(CSR_SCOUNTEREN, 0x2); in riscv_pmu_update_counter_access()