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Searched refs:csr_write (Results 1 – 25 of 32) sorted by relevance

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/linux/arch/riscv/kvm/
H A Dmain.c44 csr_write(CSR_HEDELEG, KVM_HEDELEG_DEFAULT); in kvm_arch_enable_virtualization_cpu()
45 csr_write(CSR_HIDELEG, KVM_HIDELEG_DEFAULT); in kvm_arch_enable_virtualization_cpu()
48 csr_write(CSR_HCOUNTEREN, 0x02); in kvm_arch_enable_virtualization_cpu()
50 csr_write(CSR_HVIP, 0); in kvm_arch_enable_virtualization_cpu()
67 csr_write(CSR_VSIE, 0); in kvm_arch_disable_virtualization_cpu()
68 csr_write(CSR_HVIP, 0); in kvm_arch_disable_virtualization_cpu()
69 csr_write(CSR_HEDELEG, 0); in kvm_arch_disable_virtualization_cpu()
70 csr_write(CSR_HIDELEG, 0); in kvm_arch_disable_virtualization_cpu()
H A Daia.c130 csr_write(CSR_VSISELECT, csr->vsiselect); in kvm_riscv_vcpu_aia_load()
131 csr_write(CSR_HVIPRIO1, csr->hviprio1); in kvm_riscv_vcpu_aia_load()
132 csr_write(CSR_HVIPRIO2, csr->hviprio2); in kvm_riscv_vcpu_aia_load()
134 csr_write(CSR_VSIEH, csr->vsieh); in kvm_riscv_vcpu_aia_load()
135 csr_write(CSR_HVIPH, csr->hviph); in kvm_riscv_vcpu_aia_load()
136 csr_write(CSR_HVIPRIO1H, csr->hviprio1h); in kvm_riscv_vcpu_aia_load()
137 csr_write(CSR_HVIPRIO2H, csr->hviprio2h); in kvm_riscv_vcpu_aia_load()
540 csr_write(CSR_HVICTL, aia_hvictl_value(false)); in kvm_riscv_aia_enable()
541 csr_write(CSR_HVIPRIO1, 0x0); in kvm_riscv_aia_enable()
542 csr_write(CSR_HVIPRIO2, 0x0); in kvm_riscv_aia_enable()
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H A Daia_imsic.c65 csr_write(CSR_VSISELECT, __c); \
105 csr_write(CSR_VSISELECT, __c); \
144 csr_write(CSR_VSISELECT, __c); \
145 csr_write(CSR_VSIREG, __v); \
181 csr_write(CSR_VSISELECT, __c); \
384 csr_write(CSR_HSTATUS, new_hstatus); in imsic_vsfile_local_read()
418 csr_write(CSR_HSTATUS, old_hstatus); in imsic_vsfile_local_read()
419 csr_write(CSR_VSISELECT, old_vsiselect); in imsic_vsfile_local_read()
456 csr_write(CSR_HSTATUS, new_hstatus); in imsic_vsfile_local_rw()
486 csr_write(CSR_HSTATUS, old_hstatus); in imsic_vsfile_local_rw()
[all …]
H A Dvcpu.c605 csr_write(CSR_VSSTATUS, csr->vsstatus); in kvm_arch_vcpu_load()
606 csr_write(CSR_VSIE, csr->vsie); in kvm_arch_vcpu_load()
607 csr_write(CSR_VSTVEC, csr->vstvec); in kvm_arch_vcpu_load()
608 csr_write(CSR_VSSCRATCH, csr->vsscratch); in kvm_arch_vcpu_load()
609 csr_write(CSR_VSEPC, csr->vsepc); in kvm_arch_vcpu_load()
610 csr_write(CSR_VSCAUSE, csr->vscause); in kvm_arch_vcpu_load()
611 csr_write(CSR_VSTVAL, csr->vstval); in kvm_arch_vcpu_load()
612 csr_write(CSR_HEDELEG, cfg->hedeleg); in kvm_arch_vcpu_load()
613 csr_write(CSR_HVIP, csr->hvip); in kvm_arch_vcpu_load()
614 csr_write(CSR_VSATP, csr->vsatp); in kvm_arch_vcpu_load()
[all …]
H A Dvmid.c29 csr_write(CSR_HGATP, (kvm_riscv_gstage_mode << HGATP_MODE_SHIFT) | HGATP_VMID); in kvm_riscv_gstage_vmid_detect()
33 csr_write(CSR_HGATP, 0); in kvm_riscv_gstage_vmid_detect()
H A Dtlb.c107 csr_write(CSR_HGATP, hgatp); in kvm_riscv_local_hfence_vvma_asid_gva()
119 csr_write(CSR_HGATP, hgatp); in kvm_riscv_local_hfence_vvma_asid_all()
147 csr_write(CSR_HGATP, hgatp); in kvm_riscv_local_hfence_vvma_gva()
158 csr_write(CSR_HGATP, hgatp); in kvm_riscv_local_hfence_vvma_all()
H A Dvcpu_exit.c125 csr_write(CSR_STVEC, old_stvec); in kvm_riscv_vcpu_unpriv_read()
126 csr_write(CSR_HSTATUS, old_hstatus); in kvm_riscv_vcpu_unpriv_read()
H A Dvcpu_timer.c361 csr_write(CSR_VSTIMECMP, -1UL); in kvm_riscv_vcpu_timer_save()
363 csr_write(CSR_VSTIMECMPH, -1UL); in kvm_riscv_vcpu_timer_save()
/linux/arch/loongarch/power/
H A Dsuspend.c49 csr_write(eentry, LOONGARCH_CSR_EENTRY); in loongarch_common_resume()
50 csr_write(eentry, LOONGARCH_CSR_MERRENTRY); in loongarch_common_resume()
51 csr_write(tlbrentry, LOONGARCH_CSR_TLBRENTRY); in loongarch_common_resume()
53 csr_write(saved_regs.pgd, LOONGARCH_CSR_PGDL); in loongarch_common_resume()
54 csr_write(saved_regs.kpgd, LOONGARCH_CSR_PGDH); in loongarch_common_resume()
59 csr_write(saved_regs.pcpu_base, PERCPU_BASE_KS); in loongarch_common_resume()
H A Dhibernate.c36 csr_write(saved_pcpu_base, PERCPU_BASE_KS); in restore_processor_state()
/linux/arch/riscv/kernel/
H A Dsuspend.c46 csr_write(CSR_SCRATCH, 0); in suspend_restore_csrs()
48 csr_write(CSR_ENVCFG, context->envcfg); in suspend_restore_csrs()
49 csr_write(CSR_TVEC, context->tvec); in suspend_restore_csrs()
50 csr_write(CSR_IE, context->ie); in suspend_restore_csrs()
54 csr_write(CSR_STIMECMP, context->stimecmp); in suspend_restore_csrs()
56 csr_write(CSR_STIMECMPH, context->stimecmph); in suspend_restore_csrs()
60 csr_write(CSR_SATP, context->satp); in suspend_restore_csrs()
/linux/tools/testing/selftests/kvm/include/loongarch/
H A Darch_timer.h41 csr_write(0, LOONGARCH_CSR_TCFG); in disable_timer()
50 csr_write(val, LOONGARCH_CSR_ECFG); in timer_irq_enable()
59 csr_write(val, LOONGARCH_CSR_ECFG); in timer_irq_disable()
70 csr_write(val, LOONGARCH_CSR_TCFG); in timer_set_next_cmp_ms()
/linux/drivers/firmware/efi/libstub/
H A Dloongarch.c75 csr_write(CSR_DMW0_INIT, LOONGARCH_CSR_DMWIN0); in efi_boot_kernel()
76 csr_write(CSR_DMW1_INIT, LOONGARCH_CSR_DMWIN1); in efi_boot_kernel()
77 csr_write(CSR_DMW2_INIT, LOONGARCH_CSR_DMWIN2); in efi_boot_kernel()
78 csr_write(CSR_DMW3_INIT, LOONGARCH_CSR_DMWIN3); in efi_boot_kernel()
H A Driscv.c96 csr_write(CSR_SATP, 0); in efi_enter_kernel()
/linux/drivers/clocksource/
H A Dtimer-riscv.c38 csr_write(CSR_STIMECMP, ULONG_MAX); in riscv_clock_event_stop()
40 csr_write(CSR_STIMECMPH, ULONG_MAX); in riscv_clock_event_stop()
53 csr_write(CSR_STIMECMP, next_tval & 0xFFFFFFFF); in riscv_clock_next_event()
54 csr_write(CSR_STIMECMPH, next_tval >> 32); in riscv_clock_next_event()
56 csr_write(CSR_STIMECMP, next_tval); in riscv_clock_next_event()
/linux/arch/loongarch/kernel/
H A Dtime.c57 csr_write(timer_config, LOONGARCH_CSR_TCFG); in constant_set_state_oneshot()
74 csr_write(timer_config, LOONGARCH_CSR_TCFG); in constant_set_state_periodic()
89 csr_write(timer_config, LOONGARCH_CSR_TCFG); in constant_set_state_shutdown()
102 csr_write(timer_config, LOONGARCH_CSR_TCFG); in constant_timer_next_event()
141 csr_write(init_offset, LOONGARCH_CSR_CNTC); in sync_counter()
/linux/arch/loongarch/mm/
H A Dtlb.c232 csr_write(pwctl0, LOONGARCH_CSR_PWCTL0); in setup_ptwalker()
233 csr_write(pwctl1, LOONGARCH_CSR_PWCTL1); in setup_ptwalker()
234 csr_write((long)swapper_pg_dir, LOONGARCH_CSR_PGDH); in setup_ptwalker()
235 csr_write((long)invalid_pg_dir, LOONGARCH_CSR_PGDL); in setup_ptwalker()
236 csr_write((long)smp_processor_id(), LOONGARCH_CSR_TMID); in setup_ptwalker()
/linux/arch/riscv/mm/
H A Dcontext.c192 csr_write(CSR_SATP, virt_to_pfn(mm->pgd) | in set_mm_asid()
203 csr_write(CSR_SATP, virt_to_pfn(mm->pgd) | satp_mode); in set_mm_noasid()
234 csr_write(CSR_SATP, asid_bits); in asids_init()
237 csr_write(CSR_SATP, old); in asids_init()
/linux/arch/riscv/include/asm/
H A Dvector.h160 csr_write(CSR_STATUS, status); in __vstate_csr_save()
186 csr_write(CSR_VXRM, (src->vcsr >> CSR_VXRM_SHIFT) & CSR_VXRM_MASK); in __vstate_csr_restore()
187 csr_write(CSR_VXSAT, src->vcsr & CSR_VXSAT_MASK); in __vstate_csr_restore()
190 csr_write(CSR_STATUS, status); in __vstate_csr_restore()
192 csr_write(CSR_VCSR, src->vcsr); in __vstate_csr_restore()
H A Dswitch_to.h81 csr_write(CSR_ENVCFG, envcfg); in envcfg_update_bits()
/linux/tools/testing/selftests/kvm/loongarch/
H A Darch_timer.c24 csr_write(CSR_TINTCLR_TI, LOONGARCH_CSR_TINTCLR); in do_idle()
44 csr_write(CSR_TINTCLR_TI, LOONGARCH_CSR_TINTCLR); in guest_irq_handler()
61 csr_write(CSR_TINTCLR_TI, LOONGARCH_CSR_TINTCLR); in guest_irq_handler()
/linux/arch/loongarch/include/asm/
H A Dloongarch.h194 #define csr_write(val, reg) csr_write32(val, reg) macro
198 #define csr_write(val, reg) csr_write64(val, reg) macro
1344 #define write_csr_entryhi(val) csr_write(val, LOONGARCH_CSR_TLBEHI)
1346 #define write_csr_entrylo0(val) csr_write(val, LOONGARCH_CSR_TLBELO0)
1348 #define write_csr_entrylo1(val) csr_write(val, LOONGARCH_CSR_TLBELO1)
1359 #define write_csr_prcfg1(val) csr_write(val, LOONGARCH_CSR_PRCFG1)
1361 #define write_csr_prcfg2(val) csr_write(val, LOONGARCH_CSR_PRCFG2)
1363 #define write_csr_prcfg3(val) csr_write(val, LOONGARCH_CSR_PRCFG3)
1370 #define write_csr_impctl1(val) csr_write(val, LOONGARCH_CSR_IMPCTL1)
1371 #define write_csr_impctl2(val) csr_write(val, LOONGARCH_CSR_IMPCTL2)
/linux/drivers/cache/
H A Dax45mp_cache.c74 csr_write(AX45MP_CCTL_REG_UCCTLBEGINADDR_NUM, start); in ax45mp_cpu_cache_operation()
75 csr_write(AX45MP_CCTL_REG_UCCTLCOMMAND_NUM, l1_op); in ax45mp_cpu_cache_operation()
/linux/drivers/irqchip/
H A Dirq-riscv-imsic-state.c31 csr_write(CSR_ISELECT, reg); in imsic_csr_write()
32 csr_write(CSR_IREG, val); in imsic_csr_write()
37 csr_write(CSR_ISELECT, reg); in imsic_csr_read()
43 csr_write(CSR_ISELECT, reg); in imsic_csr_read_clear()
49 csr_write(CSR_ISELECT, reg); in imsic_csr_set()
55 csr_write(CSR_ISELECT, reg); in imsic_csr_clear()
/linux/tools/testing/selftests/kvm/include/riscv/
H A Darch_timer.h32 csr_write(CSR_STIMECMP, cval); in timer_set_cmp()

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