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Searched refs:cp_hqd_pq_base_hi (Results 1 – 22 of 22) sorted by relevance

/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_mqd_manager_cik.c193 m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); in __update_mqd()
353 m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); in update_mqd_hiq()
H A Dkfd_mqd_manager_v12.c195 m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); in update_mqd()
H A Dkfd_mqd_manager_vi.c185 m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); in __update_mqd()
H A Dkfd_mqd_manager_v10.c179 m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); in update_mqd()
H A Dkfd_mqd_manager_v11.c232 m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); in update_mqd()
H A Dkfd_mqd_manager_v9.c256 m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); in update_mqd()
/linux/drivers/gpu/drm/amd/include/
H A Dcik_structs.h88 uint32_t cp_hqd_pq_base_hi; member
H A Dvi_structs.h297 uint32_t cp_hqd_pq_base_hi; member
H A Dv9_structs.h307 uint32_t cp_hqd_pq_base_hi; member
H A Dv11_structs.h812 uint32_t cp_hqd_pq_base_hi; // offset: 137 (0x89) member
H A Dv12_structs.h812 uint32_t cp_hqd_pq_base_hi; // offset: 137 (0x89) member
H A Dv10_structs.h813 uint32_t cp_hqd_pq_base_hi; member
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmes_v11_0.c1126 mqd->cp_hqd_pq_base_hi = upper_32_bits(hqd_gpu_addr); in mes_v11_0_mqd_init()
1216 WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE_HI, mqd->cp_hqd_pq_base_hi); in mes_v11_0_queue_init_register()
H A Dmes_v12_0.c1207 mqd->cp_hqd_pq_base_hi = upper_32_bits(hqd_gpu_addr); in mes_v12_0_mqd_init()
1304 WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE_HI, mqd->cp_hqd_pq_base_hi); in mes_v12_0_queue_init_register()
H A Dgfx_v9_4_3.c1889 mqd->cp_hqd_pq_base_hi = upper_32_bits(hqd_gpu_addr); in gfx_v9_4_3_xcc_mqd_init()
2001 mqd->cp_hqd_pq_base_hi); in gfx_v9_4_3_xcc_kiq_init_register()
H A Dgfx_v12_0.c3093 mqd->cp_hqd_pq_base_hi = upper_32_bits(hqd_gpu_addr); in gfx_v12_0_compute_mqd_init()
3218 mqd->cp_hqd_pq_base_hi); in gfx_v12_0_kiq_init_register()
H A Dgfx_v11_0.c4170 mqd->cp_hqd_pq_base_hi = upper_32_bits(hqd_gpu_addr); in gfx_v11_0_compute_mqd_init()
4296 mqd->cp_hqd_pq_base_hi); in gfx_v11_0_kiq_init_register()
H A Dgfx_v9_0.c3592 mqd->cp_hqd_pq_base_hi = upper_32_bits(hqd_gpu_addr); in gfx_v9_0_mqd_init()
3703 mqd->cp_hqd_pq_base_hi); in gfx_v9_0_kiq_init_register()
H A Dgfx_v7_0.c2856 mqd->cp_hqd_pq_base_hi = upper_32_bits(hqd_gpu_addr); in gfx_v7_0_mqd_init()
H A Dgfx_v10_0.c6874 mqd->cp_hqd_pq_base_hi = upper_32_bits(hqd_gpu_addr); in gfx_v10_0_compute_mqd_init()
6985 mqd->cp_hqd_pq_base_hi); in gfx_v10_0_kiq_init_register()
H A Dgfx_v8_0.c4470 mqd->cp_hqd_pq_base_hi = upper_32_bits(hqd_gpu_addr); in gfx_v8_0_mqd_init()
/linux/drivers/gpu/drm/radeon/
H A Dcik.c4443 u32 cp_hqd_pq_base_hi; member
4653 mqd->queue_state.cp_hqd_pq_base_hi = upper_32_bits(hqd_gpu_addr); in cik_cp_compute_resume()
4655 WREG32(CP_HQD_PQ_BASE_HI, mqd->queue_state.cp_hqd_pq_base_hi); in cik_cp_compute_resume()