Searched refs:controller_base (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/thermal/mediatek/ |
| H A D | auxadc_thermal.c | 882 void __iomem *controller_base = mt->thermal_base + offset; in mtk_thermal_init_bank() local
890 writel(TEMP_MONCTL1_PERIOD_UNIT(12), controller_base + TEMP_MONCTL1); in mtk_thermal_init_bank()
898 controller_base + TEMP_MONCTL2); in mtk_thermal_init_bank()
902 controller_base + TEMP_AHBPOLL); in mtk_thermal_init_bank()
905 writel(0x0, controller_base + TEMP_MSRCTL0); in mtk_thermal_init_bank()
908 writel(0xffffffff, controller_base + TEMP_AHBTO); in mtk_thermal_init_bank()
911 writel(0x0, controller_base + TEMP_MONIDET0); in mtk_thermal_init_bank()
912 writel(0x0, controller_base + TEMP_MONIDET1); in mtk_thermal_init_bank()
927 writel(BIT(conf->auxadc_channel), controller_base + TEMP_ADCMUX); in mtk_thermal_init_bank()
931 controller_base + TEMP_ADCMUXADDR); in mtk_thermal_init_bank()
[all …]
|
| /linux/drivers/pci/controller/dwc/ |
| H A D | pcie-al.c | 132 void __iomem *controller_base; /* base of PCIe unit (not DW core) */ member
144 return readl_relaxed(pcie->controller_base + offset); in al_pcie_controller_readl()
150 writel_relaxed(val, pcie->controller_base + offset); in al_pcie_controller_writel()
353 al_pcie->controller_base = devm_ioremap_resource(dev, controller_res); in al_pcie_probe()
354 if (IS_ERR(al_pcie->controller_base)) { in al_pcie_probe()
357 return PTR_ERR(al_pcie->controller_base); in al_pcie_probe()
360 dev_dbg(dev, "From DT: controller_base: %pR\n", controller_res); in al_pcie_probe()
|