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Searched refs:consts (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/gpu/drm/i915/gt/
H A Dintel_llc.c51 struct ia_constants *consts) in get_ia_constants() argument
59 consts->max_ia_freq = cpu_max_MHz(); in get_ia_constants()
61 consts->min_ring_freq = in get_ia_constants()
64 consts->min_ring_freq = mult_frac(consts->min_ring_freq, 8, 3); in get_ia_constants()
66 consts->min_gpu_freq = intel_rps_get_min_raw_freq(rps); in get_ia_constants()
67 consts->max_gpu_freq = intel_rps_get_max_raw_freq(rps); in get_ia_constants()
74 const struct ia_constants *consts, in calc_ia_freq() argument
79 const int diff = consts->max_gpu_freq - gpu_freq; in calc_ia_freq()
90 ring_freq = max(consts->min_ring_freq, gpu_freq); in calc_ia_freq()
93 ring_freq = max(consts->min_ring_freq, ring_freq); in calc_ia_freq()
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H A Dselftest_llc.c12 struct ia_constants consts; in gen6_verify_ring_freq() local
19 if (!get_ia_constants(llc, &consts)) in gen6_verify_ring_freq()
22 for (gpu_freq = consts.min_gpu_freq; in gen6_verify_ring_freq()
23 gpu_freq <= consts.max_gpu_freq; in gen6_verify_ring_freq()
30 calc_ia_freq(llc, gpu_freq, &consts, &ia_freq, &ring_freq); in gen6_verify_ring_freq()
36 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq); in gen6_verify_ring_freq()
44 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq, in gen6_verify_ring_freq()
54 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq, in gen6_verify_ring_freq()
/linux/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_ptp.c281 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_get_hwtimestamp() local
293 sparx5, PTP_PTP_PIN_CFG(consts->tod_pin)); in sparx5_get_hwtimestamp()
295 ts->tv_sec = spx5_rd(sparx5, PTP_PTP_TOD_SEC_LSB(consts->tod_pin)); in sparx5_get_hwtimestamp()
296 curr_nsec = spx5_rd(sparx5, PTP_PTP_TOD_NSEC(consts->tod_pin)); in sparx5_get_hwtimestamp()
448 const struct sparx5_consts *consts; in sparx5_ptp_settime64() local
451 consts = sparx5->data->consts; in sparx5_ptp_settime64()
462 sparx5, PTP_PTP_PIN_CFG(consts->tod_pin)); in sparx5_ptp_settime64()
466 sparx5, PTP_PTP_TOD_SEC_MSB(consts->tod_pin)); in sparx5_ptp_settime64()
468 sparx5, PTP_PTP_TOD_SEC_LSB(consts->tod_pin)); in sparx5_ptp_settime64()
469 spx5_wr(ts->tv_nsec, sparx5, PTP_PTP_TOD_NSEC(consts->tod_pin)); in sparx5_ptp_settime64()
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H A Dsparx5_calendar.c122 if (portno >= sparx5->data->consts->n_ports) { in sparx5_get_port_cal_speed()
156 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_config_auto_calendar() local
172 for (portno = 0; portno < consts->n_ports_all; portno++) { in sparx5_config_auto_calendar()
180 if (portno < consts->n_ports) in sparx5_config_auto_calendar()
212 for (idx = 0; idx < consts->n_auto_cals; idx++) in sparx5_config_auto_calendar()
303 if (portno < sparx5->data->consts->n_ports_all) { in sparx5_dsm_calendar_calc()
592 for (taxi = 0; taxi < sparx5->data->consts->n_dsm_cal_taxis; ++taxi) { in sparx5_config_dsm_calendar()
H A Dsparx5_main.c606 for (idx = 0; idx < sparx5->data->consts->n_sio_clks; idx++) in sparx5_init_coreclock()
628 return (sparx5->data->consts->buf_size / SPX5_BUFFER_CELL_SZ - 100) * in qlim_wm()
634 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_qlim_set() local
641 consts->qres_max_prio_idx + in sparx5_qlim_set()
647 consts->qres_max_colour_idx + in sparx5_qlim_set()
677 for (idx = 0; idx < sparx5->data->consts->n_ports; idx++) in sparx5_board_init()
688 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_start() local
695 for (idx = 0; idx < consts->n_own_upsids; idx++) { in sparx5_start()
703 for (idx = consts->n_ports; idx < consts->n_ports_all; idx++) in sparx5_start()
1111 .consts = &sparx5_consts,
H A Dsparx5_ethtool.c1125 for (idx = 0; idx < sparx5->data->consts->n_ports; idx++) in sparx5_update_stats()
1231 const struct sparx5_consts *consts = sparx5->data->consts; in sparx_stats_init() local
1239 consts->n_ports_all * in sparx_stats_init()
1247 for (portno = 0; portno < consts->n_ports; portno++) in sparx_stats_init()
H A Dsparx5_mirror.c202 sparx5->data->consts->n_ports); in sparx5_mirror_del()
H A Dsparx5_port.c1423 return sparx5->data->consts->n_ports + port; in sparx5_get_internal_port()
/linux/crypto/
H A Dcmac.c31 __be64 consts[]; member
55 __be64 *consts = ctx->consts; in crypto_cmac_digest_setkey() local
65 memset(consts, 0, bs); in crypto_cmac_digest_setkey()
66 crypto_cipher_encrypt_one(ctx->child, (u8 *)consts, (u8 *)consts); in crypto_cmac_digest_setkey()
71 _const[0] = be64_to_cpu(consts[1]); in crypto_cmac_digest_setkey()
72 _const[1] = be64_to_cpu(consts[0]); in crypto_cmac_digest_setkey()
80 consts[i + 0] = cpu_to_be64(_const[1]); in crypto_cmac_digest_setkey()
81 consts[i + 1] = cpu_to_be64(_const[0]); in crypto_cmac_digest_setkey()
87 _const[0] = be64_to_cpu(consts[0]); in crypto_cmac_digest_setkey()
94 consts[i] = cpu_to_be64(_const[0]); in crypto_cmac_digest_setkey()
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H A Dxcbc.c30 u8 consts[]; member
55 u8 *consts = ctx->consts; in crypto_xcbc_digest_setkey() local
63 crypto_cipher_encrypt_one(ctx->child, consts, (u8 *)ks + bs); in crypto_xcbc_digest_setkey()
64 crypto_cipher_encrypt_one(ctx->child, consts + bs, (u8 *)ks + bs * 2); in crypto_xcbc_digest_setkey()
155 crypto_xor(prev, &tctx->consts[offset], bs); in crypto_xcbc_digest_final()
/linux/arch/arm64/crypto/
H A Dsm4-ce-glue.c63 u8 __aligned(8) consts[];
527 be128 *consts = (be128 *)ctx->consts; in sm4_cmac_setkey() local
533 memset(consts, 0, SM4_BLOCK_SIZE); in sm4_cmac_setkey()
541 sm4_ce_crypt_block(ctx->key.rkey_enc, (u8 *)consts, (const u8 *)consts); in sm4_cmac_setkey()
546 a = be64_to_cpu(consts[0].a); in sm4_cmac_setkey()
547 b = be64_to_cpu(consts[0].b); in sm4_cmac_setkey()
548 consts[0].a = cpu_to_be64((a << 1) | (b >> 63)); in sm4_cmac_setkey()
549 consts[0].b = cpu_to_be64((b << 1) ^ ((a >> 63) ? 0x87 : 0)); in sm4_cmac_setkey()
551 a = be64_to_cpu(consts[0].a); in sm4_cmac_setkey()
552 b = be64_to_cpu(consts[0].b); in sm4_cmac_setkey()
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H A Daes-glue.c129 u8 __aligned(8) consts[];
821 be128 *consts = (be128 *)ctx->consts; in cmac_setkey() local
831 aes_ecb_encrypt(ctx->consts, (u8[AES_BLOCK_SIZE]){}, ctx->key.key_enc, in cmac_setkey()
835 cmac_gf128_mul_by_x(consts, consts); in cmac_setkey()
836 cmac_gf128_mul_by_x(consts + 1, consts); in cmac_setkey()
861 aes_ecb_encrypt(ctx->consts, ks[1], ctx->key.key_enc, rounds, 2); in xcbc_setkey()
964 u8 *consts = tctx->consts; in cmac_final() local
968 consts += AES_BLOCK_SIZE; in cmac_final()
971 mac_do_update(&tctx->key, consts, 1, ctx->dg, 0, 1); in cmac_final()
/linux/rust/macros/
H A Dvtable.rs31 let mut consts = HashSet::new(); in vtable() localVariable
48 consts.insert(const_name); in vtable()
66 if consts.contains(&gen_const_name) { in vtable()
77 consts.insert(gen_const_name); in vtable()
84 if consts.contains(&gen_const_name) { in vtable()
/linux/arch/powerpc/crypto/
H A Daesp10-ppc.pl533 my $consts=1;
538 if ($consts && m/\.(long|byte)\s+(.+)\s+(\?[a-z]*)$/o) {
564 $consts=0 if (m/Lconsts:/o); # end of table
H A Daesp8-ppc.pl3837 my $consts=1;
3842 if ($consts && m/\.(long|byte)\s+(.+)\s+(\?[a-z]*)$/o) {
3868 $consts=0 if (m/Lconsts:/o); # end of table
/linux/tools/testing/selftests/net/lib/py/
H A Dynl.py5 from .consts import KSRC, KSFT_DIR
/linux/drivers/net/ethernet/microchip/sparx5/lan969x/
H A Dlan969x_calendar.c97 if (portno < sparx5->data->consts->n_ports_all) in lan969x_dsm_calendar_calc()
H A Dlan969x.c355 .consts = &lan969x_consts,
/linux/arch/mips/cavium-octeon/
H A Docteon-irq.c2881 union cvmx_ciu3_const consts; in octeon_irq_init_ciu3() local
2896 consts.u64 = cvmx_read_csr(base_addr + CIU3_CONST); in octeon_irq_init_ciu3()