| /linux/drivers/gpu/drm/i915/gt/ |
| H A D | intel_llc.c | 51 struct ia_constants *consts) in get_ia_constants() argument 59 consts->max_ia_freq = cpu_max_MHz(); in get_ia_constants() 61 consts->min_ring_freq = in get_ia_constants() 64 consts->min_ring_freq = mult_frac(consts->min_ring_freq, 8, 3); in get_ia_constants() 66 consts->min_gpu_freq = intel_rps_get_min_raw_freq(rps); in get_ia_constants() 67 consts->max_gpu_freq = intel_rps_get_max_raw_freq(rps); in get_ia_constants() 74 const struct ia_constants *consts, in calc_ia_freq() argument 79 const int diff = consts->max_gpu_freq - gpu_freq; in calc_ia_freq() 90 ring_freq = max(consts->min_ring_freq, gpu_freq); in calc_ia_freq() 93 ring_freq = max(consts->min_ring_freq, ring_freq); in calc_ia_freq() [all …]
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| H A D | selftest_llc.c | 12 struct ia_constants consts; in gen6_verify_ring_freq() local 19 if (!get_ia_constants(llc, &consts)) in gen6_verify_ring_freq() 22 for (gpu_freq = consts.min_gpu_freq; in gen6_verify_ring_freq() 23 gpu_freq <= consts.max_gpu_freq; in gen6_verify_ring_freq() 30 calc_ia_freq(llc, gpu_freq, &consts, &ia_freq, &ring_freq); in gen6_verify_ring_freq() 36 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq); in gen6_verify_ring_freq() 44 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq, in gen6_verify_ring_freq() 54 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq, in gen6_verify_ring_freq()
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| /linux/lib/crc/riscv/ |
| H A D | crc-clmul-template.h | 91 crc_clmul_long(unsigned long msgpoly, const struct crc_clmul_consts *consts) in crc_clmul_long() argument 118 tmp = clmul(msgpoly, consts->barrett_reduction_const_1); in crc_clmul_long() 120 tmp = clmulr(msgpoly, consts->barrett_reduction_const_1); in crc_clmul_long() 146 return clmulr(tmp, consts->barrett_reduction_const_2); in crc_clmul_long() 148 return clmul(tmp, consts->barrett_reduction_const_2); in crc_clmul_long() 155 const struct crc_clmul_consts *consts) in crc_clmul_update_long() argument 157 return crc_clmul_long(crc_clmul_prep(crc, msgpoly), consts); in crc_clmul_update_long() 163 const struct crc_clmul_consts *consts) in crc_clmul_update_partial() argument 184 return crc_clmul_long(msgpoly, consts); in crc_clmul_update_partial() 188 return crc_clmul_long(msgpoly, consts) ^ (crc >> (8*len)); in crc_clmul_update_partial() [all …]
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| H A D | crc-clmul.h | 11 const struct crc_clmul_consts *consts); 13 const struct crc_clmul_consts *consts); 15 const struct crc_clmul_consts *consts); 18 const struct crc_clmul_consts *consts); 20 const struct crc_clmul_consts *consts);
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| H A D | crc32_msb.c | 15 const struct crc_clmul_consts *consts) in crc32_msb_clmul() argument 17 return crc_clmul(crc, p, len, consts); in crc32_msb_clmul()
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| H A D | crc16_msb.c | 15 const struct crc_clmul_consts *consts) in crc16_msb_clmul() argument 17 return crc_clmul(crc, p, len, consts); in crc16_msb_clmul()
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| H A D | crc64_lsb.c | 15 const struct crc_clmul_consts *consts) in crc64_lsb_clmul() argument 17 return crc_clmul(crc, p, len, consts); in crc64_lsb_clmul()
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| H A D | crc32_lsb.c | 15 const struct crc_clmul_consts *consts) in crc32_lsb_clmul() argument 17 return crc_clmul(crc, p, len, consts); in crc32_lsb_clmul()
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| H A D | crc64_msb.c | 15 const struct crc_clmul_consts *consts) in crc64_msb_clmul() argument 17 return crc_clmul(crc, p, len, consts); in crc64_msb_clmul()
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| /linux/drivers/net/ethernet/microchip/sparx5/ |
| H A D | sparx5_ptp.c | 281 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_get_hwtimestamp() local 293 sparx5, PTP_PTP_PIN_CFG(consts->tod_pin)); in sparx5_get_hwtimestamp() 295 ts->tv_sec = spx5_rd(sparx5, PTP_PTP_TOD_SEC_LSB(consts->tod_pin)); in sparx5_get_hwtimestamp() 296 curr_nsec = spx5_rd(sparx5, PTP_PTP_TOD_NSEC(consts->tod_pin)); in sparx5_get_hwtimestamp() 448 const struct sparx5_consts *consts; in sparx5_ptp_settime64() local 451 consts = sparx5->data->consts; in sparx5_ptp_settime64() 462 sparx5, PTP_PTP_PIN_CFG(consts->tod_pin)); in sparx5_ptp_settime64() 466 sparx5, PTP_PTP_TOD_SEC_MSB(consts->tod_pin)); in sparx5_ptp_settime64() 468 sparx5, PTP_PTP_TOD_SEC_LSB(consts->tod_pin)); in sparx5_ptp_settime64() 469 spx5_wr(ts->tv_nsec, sparx5, PTP_PTP_TOD_NSEC(consts->tod_pin)); in sparx5_ptp_settime64() [all …]
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| H A D | sparx5_calendar.c | 122 if (portno >= sparx5->data->consts->n_ports) { in sparx5_get_port_cal_speed() 156 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_config_auto_calendar() local 172 for (portno = 0; portno < consts->n_ports_all; portno++) { in sparx5_config_auto_calendar() 180 if (portno < consts->n_ports) in sparx5_config_auto_calendar() 212 for (idx = 0; idx < consts->n_auto_cals; idx++) in sparx5_config_auto_calendar() 303 if (portno < sparx5->data->consts->n_ports_all) { in sparx5_dsm_calendar_calc() 592 for (taxi = 0; taxi < sparx5->data->consts->n_dsm_cal_taxis; ++taxi) { in sparx5_config_dsm_calendar()
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| /linux/arch/arm64/crypto/ |
| H A D | sm4-ce-glue.c | 62 u8 __aligned(8) consts[]; 508 be128 *consts = (be128 *)ctx->consts; in sm4_cmac_setkey() local 514 memset(consts, 0, SM4_BLOCK_SIZE); in sm4_cmac_setkey() 521 sm4_ce_crypt_block(ctx->key.rkey_enc, (u8 *)consts, (const u8 *)consts); in sm4_cmac_setkey() 525 a = be64_to_cpu(consts[0].a); in sm4_cmac_setkey() 526 b = be64_to_cpu(consts[0].b); in sm4_cmac_setkey() 527 consts[0].a = cpu_to_be64((a << 1) | (b >> 63)); in sm4_cmac_setkey() 528 consts[0].b = cpu_to_be64((b << 1) ^ ((a >> 63) ? 0x87 : 0)); in sm4_cmac_setkey() 530 a = be64_to_cpu(consts[0].a); in sm4_cmac_setkey() 531 b = be64_to_cpu(consts[0].b); in sm4_cmac_setkey() [all …]
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| H A D | aes-glue.c | 130 u8 __aligned(8) consts[]; 788 be128 *consts = (be128 *)ctx->consts; in cmac_setkey() local 798 aes_ecb_encrypt(ctx->consts, (u8[AES_BLOCK_SIZE]){}, in cmac_setkey() 801 cmac_gf128_mul_by_x(consts, consts); in cmac_setkey() 802 cmac_gf128_mul_by_x(consts + 1, consts); in cmac_setkey() 827 aes_ecb_encrypt(ctx->consts, ks[1], ctx->key.key_enc, rounds, 2); in xcbc_setkey() 886 u8 *consts = tctx->consts; in cmac_finup() local 891 consts += AES_BLOCK_SIZE; in cmac_finup() 893 mac_do_update(&tctx->key, consts, 1, ctx->dg, 0); in cmac_finup()
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| /linux/rust/macros/ |
| H A D | vtable.rs | 31 let mut consts = HashSet::new(); in vtable() localVariable 48 consts.insert(const_name); in vtable() 66 if consts.contains(&gen_const_name) { in vtable() 77 consts.insert(gen_const_name); in vtable() 84 if consts.contains(&gen_const_name) { in vtable()
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| /linux/lib/crc/x86/ |
| H A D | crc-pclmul-template.S | 138 .macro _fold_vec acc, data, consts, tmp 139 _pclmulqdq \consts, HI64_TERMS, \acc, HI64_TERMS, \tmp 140 _pclmulqdq \consts, LO64_TERMS, \acc, LO64_TERMS, \acc 154 .macro _fold_vec_mem vl, acc, data, consts, bswap_mask, tmp1, tmp2 157 _fold_vec \acc, \tmp1, \consts, \tmp2 159 _fold_vec \acc, \data, \consts, \tmp1 174 .macro _fold_vec_final vl, v0, v1, consts, bswap_mask, tmp1, tmp2 175 _fold_vec \v0, \v1, \consts, \tmp1 178 _fold_vec_mem \vl, \v0, (BUF), \consts, \bswap_mask, \tmp1, \tmp2
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| H A D | crc-pclmul-template.h | 56 #define CRC_PCLMUL(crc, p, len, prefix, consts, have_pclmulqdq) \ argument 62 consts_ptr = (consts).fold_across_128_bits_consts; \
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| /linux/sound/soc/sdca/ |
| H A D | sdca_regmap.c | 234 * @consts: Pointer to the array which should be filled with the DisCo in sdca_regmap_count_constants() 247 struct reg_default *consts) 264 consts[k].reg = SDW_SDCA_CTL(function->desc->adr, in sdca_regmap_populate_constants() 267 consts[k].def = control->values[l]; in sdca_regmap_populate_constants() 254 sdca_regmap_populate_constants(struct device * dev,struct sdca_function_data * function,struct reg_default * consts) sdca_regmap_populate_constants() argument
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| /linux/arch/powerpc/crypto/ |
| H A D | aesp10-ppc.pl | 533 my $consts=1; 538 if ($consts && m/\.(long|byte)\s+(.+)\s+(\?[a-z]*)$/o) { 564 $consts=0 if (m/Lconsts:/o); # end of table
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| /linux/tools/testing/selftests/net/lib/py/ |
| H A D | __init__.py | 7 from .consts import KSRC
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| H A D | ynl.py | 5 from .consts import KSRC, KSFT_DIR
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| H A D | ksft.py | 10 from .consts import KSFT_MAIN_NAME
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| /linux/tools/net/ynl/pyynl/ |
| H A D | ynl_gen_c.py | 78 if self.nested_attrs in self.family.consts: 113 if value in self.family.consts: 114 return self.family.consts[value]["value"] 123 if value in self.family.consts: 124 const = self.family.consts[value] 381 self.is_bitfield = self.family.consts[self.attr['enum']]['type'] == 'flags' 386 self.type_name = self.family.consts[self.attr['enum']].user_type 394 enum = self.family.consts[self.attr['enum']] 420 enum = self.family.consts[self.attr['enum']] 423 flags = self.family.consts[self.checks['flags-mask']] [all …]
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| /linux/drivers/net/ethernet/microchip/sparx5/lan969x/ |
| H A D | lan969x_calendar.c | 97 if (portno < sparx5->data->consts->n_ports_all) in lan969x_dsm_calendar_calc()
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| H A D | lan969x.c | 355 .consts = &lan969x_consts,
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| /linux/tools/net/ynl/pyynl/lib/ |
| H A D | ynl.py | 537 enum = self.consts[attr_spec['enum']] 666 enum = self.consts[attr_spec['enum']] 892 members = self.consts[name].members 908 members = self.consts[name].members 937 members = self.consts[name].members
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