1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Based on arch/arm/include/asm/ptrace.h 4 * 5 * Copyright (C) 1996-2003 Russell King 6 * Copyright (C) 2012 ARM Ltd. 7 */ 8 #ifndef __ASM_PTRACE_H 9 #define __ASM_PTRACE_H 10 11 #include <asm/cpufeature.h> 12 13 #include <uapi/asm/ptrace.h> 14 15 /* Current Exception Level values, as contained in CurrentEL */ 16 #define CurrentEL_EL1 (1 << 2) 17 #define CurrentEL_EL2 (2 << 2) 18 19 #define INIT_PSTATE_EL1 \ 20 (PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL1h) 21 22 #include <linux/irqchip/arm-gic-v3-prio.h> 23 24 #define GIC_PRIO_IRQON GICV3_PRIO_UNMASKED 25 #define GIC_PRIO_IRQOFF GICV3_PRIO_IRQ 26 27 #define GIC_PRIO_PSR_I_SET GICV3_PRIO_PSR_I_SET 28 29 #if ARM64_S390_COMMON == 1 30 31 /* Additional SPSR bits not exposed in the UABI */ 32 #define PSR_MODE_THREAD_BIT (1 << 0) 33 #define PSR_IL_BIT (1 << 20) 34 35 /* AArch32-specific ptrace requests */ 36 #define COMPAT_PTRACE_GETREGS 12 37 #define COMPAT_PTRACE_SETREGS 13 38 #define COMPAT_PTRACE_GET_THREAD_AREA 22 39 #define COMPAT_PTRACE_SET_SYSCALL 23 40 #define COMPAT_PTRACE_GETVFPREGS 27 41 #define COMPAT_PTRACE_SETVFPREGS 28 42 #define COMPAT_PTRACE_GETHBPREGS 29 43 #define COMPAT_PTRACE_SETHBPREGS 30 44 45 /* SPSR_ELx bits for exceptions taken from AArch32 */ 46 #define PSR_AA32_MODE_MASK 0x0000001f 47 #define PSR_AA32_MODE_USR 0x00000010 48 #define PSR_AA32_MODE_FIQ 0x00000011 49 #define PSR_AA32_MODE_IRQ 0x00000012 50 #define PSR_AA32_MODE_SVC 0x00000013 51 #define PSR_AA32_MODE_ABT 0x00000017 52 #define PSR_AA32_MODE_HYP 0x0000001a 53 #define PSR_AA32_MODE_UND 0x0000001b 54 #define PSR_AA32_MODE_SYS 0x0000001f 55 #define PSR_AA32_T_BIT 0x00000020 56 #define PSR_AA32_F_BIT 0x00000040 57 #define PSR_AA32_I_BIT 0x00000080 58 #define PSR_AA32_A_BIT 0x00000100 59 #define PSR_AA32_E_BIT 0x00000200 60 #define PSR_AA32_PAN_BIT 0x00400000 61 #define PSR_AA32_SSBS_BIT 0x00800000 62 #define PSR_AA32_DIT_BIT 0x01000000 63 #define PSR_AA32_Q_BIT 0x08000000 64 #define PSR_AA32_V_BIT 0x10000000 65 #define PSR_AA32_C_BIT 0x20000000 66 #define PSR_AA32_Z_BIT 0x40000000 67 #define PSR_AA32_N_BIT 0x80000000 68 #define PSR_AA32_IT_MASK 0x0600fc00 /* If-Then execution state mask */ 69 #define PSR_AA32_GE_MASK 0x000f0000 70 71 #endif /* ARM64_S390_COMMON == 1 */ 72 73 /* AArch32 CPSR bits, as seen in AArch32 */ 74 #define COMPAT_PSR_DIT_BIT 0x00200000 75 76 /* 77 * These are 'magic' values for PTRACE_PEEKUSR that return info about where a 78 * process is located in memory. 79 */ 80 #define COMPAT_PT_TEXT_ADDR 0x10000 81 #define COMPAT_PT_DATA_ADDR 0x10004 82 #define COMPAT_PT_TEXT_END_ADDR 0x10008 83 84 /* 85 * If pt_regs.syscallno == NO_SYSCALL, then the thread is not executing 86 * a syscall -- i.e., its most recent entry into the kernel from 87 * userspace was not via SVC, or otherwise a tracer cancelled the syscall. 88 * 89 * This must have the value -1, for ABI compatibility with ptrace etc. 90 */ 91 #define NO_SYSCALL (-1) 92 93 #ifndef __ASSEMBLER__ 94 #include <linux/bug.h> 95 #include <linux/types.h> 96 97 #include <asm/stacktrace/frame.h> 98 99 /* sizeof(struct user) for AArch32 */ 100 #define COMPAT_USER_SZ 296 101 102 /* Architecturally defined mapping between AArch32 and AArch64 registers */ 103 enum { 104 __compat_fp = 11, 105 __compat_sp = 13, 106 __compat_lr = 14, 107 __compat_sp_hyp = 15, 108 __compat_lr_irq = 16, 109 __compat_sp_irq = 17, 110 __compat_lr_svc = 18, 111 __compat_sp_svc = 19, 112 __compat_lr_abt = 20, 113 __compat_sp_abt = 21, 114 __compat_lr_und = 22, 115 __compat_sp_und = 23, 116 __compat_r8_fiq = 24, 117 __compat_r9_fiq = 25, 118 __compat_r10_fiq = 26, 119 __compat_r11_fiq = 27, 120 __compat_r12_fiq = 28, 121 __compat_sp_fiq = 29, 122 __compat_lr_fiq = 30, 123 }; 124 125 #define compat_usr(x) regs[(x)] 126 #define compat_fp regs[__compat_fp] 127 #define compat_sp regs[__compat_sp] 128 #define compat_lr regs[__compat_lr] 129 #define compat_sp_hyp regs[__compat_sp_hyp] 130 #define compat_lr_irq regs[__compat_lr_irq] 131 #define compat_sp_irq regs[__compat_sp_irq] 132 #define compat_lr_svc regs[__compat_lr_svc] 133 #define compat_sp_svc regs[__compat_sp_svc] 134 #define compat_lr_abt regs[__compat_lr_abt] 135 #define compat_sp_abt regs[__compat_sp_abt] 136 #define compat_lr_und regs[__compat_lr_und] 137 #define compat_sp_und regs[__compat_sp_und] 138 #define compat_r8_fiq regs[__compat_r8_fiq] 139 #define compat_r9_fiq regs[__compat_r9_fiq] 140 #define compat_r10_fiq regs[__compat_r10_fiq] 141 #define compat_r11_fiq regs[__compat_r11_fiq] 142 #define compat_r12_fiq regs[__compat_r12_fiq] 143 #define compat_sp_fiq regs[__compat_sp_fiq] 144 #define compat_lr_fiq regs[__compat_lr_fiq] 145 146 static inline unsigned long compat_psr_to_pstate(const unsigned long psr) 147 { 148 unsigned long pstate; 149 150 pstate = psr & ~COMPAT_PSR_DIT_BIT; 151 152 if (psr & COMPAT_PSR_DIT_BIT) 153 pstate |= PSR_AA32_DIT_BIT; 154 155 return pstate; 156 } 157 158 static inline unsigned long pstate_to_compat_psr(const unsigned long pstate) 159 { 160 unsigned long psr; 161 162 psr = pstate & ~PSR_AA32_DIT_BIT; 163 164 if (pstate & PSR_AA32_DIT_BIT) 165 psr |= COMPAT_PSR_DIT_BIT; 166 167 return psr; 168 } 169 170 /* 171 * This struct defines the way the registers are stored on the stack during an 172 * exception. struct user_pt_regs must form a prefix of struct pt_regs. 173 */ 174 struct pt_regs { 175 union { 176 struct user_pt_regs user_regs; 177 struct { 178 u64 regs[31]; 179 u64 sp; 180 u64 pc; 181 u64 pstate; 182 }; 183 }; 184 u64 orig_x0; 185 s32 syscallno; 186 u32 pmr; 187 188 u64 sdei_ttbr1; 189 struct frame_record_meta stackframe; 190 191 u16 pcpu_gprs; 192 u16 __unused1; 193 u32 __unused2; 194 u64 __unused3; 195 }; 196 197 /* For correct stack alignment, pt_regs has to be a multiple of 16 bytes. */ 198 static_assert(IS_ALIGNED(sizeof(struct pt_regs), 16)); 199 200 static inline bool in_syscall(struct pt_regs const *regs) 201 { 202 return regs->syscallno != NO_SYSCALL; 203 } 204 205 static inline void forget_syscall(struct pt_regs *regs) 206 { 207 regs->syscallno = NO_SYSCALL; 208 } 209 210 #define MAX_REG_OFFSET offsetof(struct pt_regs, pstate) 211 212 #define arch_has_single_step() (1) 213 214 #ifdef CONFIG_COMPAT 215 #define compat_thumb_mode(regs) \ 216 (((regs)->pstate & PSR_AA32_T_BIT)) 217 #else 218 #define compat_thumb_mode(regs) (0) 219 #endif 220 221 #define user_mode(regs) \ 222 (((regs)->pstate & PSR_MODE_MASK) == PSR_MODE_EL0t) 223 224 #define compat_user_mode(regs) \ 225 (((regs)->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK)) == \ 226 (PSR_MODE32_BIT | PSR_MODE_EL0t)) 227 228 #define processor_mode(regs) \ 229 ((regs)->pstate & PSR_MODE_MASK) 230 231 #define irqs_priority_unmasked(regs) \ 232 (system_uses_irq_prio_masking() ? \ 233 (regs)->pmr == GIC_PRIO_IRQON : \ 234 true) 235 236 static __always_inline bool regs_irqs_disabled(const struct pt_regs *regs) 237 { 238 return (regs->pstate & PSR_I_BIT) || !irqs_priority_unmasked(regs); 239 } 240 241 #define interrupts_enabled(regs) (!regs_irqs_disabled(regs)) 242 243 static inline unsigned long user_stack_pointer(struct pt_regs *regs) 244 { 245 if (compat_user_mode(regs)) 246 return regs->compat_sp; 247 return regs->sp; 248 } 249 250 extern int regs_query_register_offset(const char *name); 251 extern unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, 252 unsigned int n); 253 254 /** 255 * regs_get_register() - get register value from its offset 256 * @regs: pt_regs from which register value is gotten 257 * @offset: offset of the register. 258 * 259 * regs_get_register returns the value of a register whose offset from @regs. 260 * The @offset is the offset of the register in struct pt_regs. 261 * If @offset is bigger than MAX_REG_OFFSET, this returns 0. 262 */ 263 static inline u64 regs_get_register(struct pt_regs *regs, unsigned int offset) 264 { 265 u64 val = 0; 266 267 WARN_ON(offset & 7); 268 269 offset >>= 3; 270 switch (offset) { 271 case 0 ... 30: 272 val = regs->regs[offset]; 273 break; 274 case offsetof(struct pt_regs, sp) >> 3: 275 val = regs->sp; 276 break; 277 case offsetof(struct pt_regs, pc) >> 3: 278 val = regs->pc; 279 break; 280 case offsetof(struct pt_regs, pstate) >> 3: 281 val = regs->pstate; 282 break; 283 default: 284 val = 0; 285 } 286 287 return val; 288 } 289 290 /* 291 * Read a register given an architectural register index r. 292 * This handles the common case where 31 means XZR, not SP. 293 */ 294 static __always_inline unsigned long 295 pt_regs_read_reg(const struct pt_regs *regs, int r) 296 { 297 return (r == 31) ? 0 : regs->regs[r]; 298 } 299 300 /* 301 * Write a register given an architectural register index r. 302 * This handles the common case where 31 means XZR, not SP. 303 */ 304 static __always_inline void 305 pt_regs_write_reg(struct pt_regs *regs, int r, unsigned long val) 306 { 307 if (r != 31) 308 regs->regs[r] = val; 309 } 310 311 /* Valid only for Kernel mode traps. */ 312 static inline unsigned long kernel_stack_pointer(struct pt_regs *regs) 313 { 314 return regs->sp; 315 } 316 317 static inline unsigned long regs_return_value(struct pt_regs *regs) 318 { 319 unsigned long val = regs->regs[0]; 320 321 /* 322 * Audit currently uses regs_return_value() instead of 323 * syscall_get_return_value(). Apply the same sign-extension here until 324 * audit is updated to use syscall_get_return_value(). 325 */ 326 if (compat_user_mode(regs)) 327 val = sign_extend64(val, 31); 328 329 return val; 330 } 331 332 static inline void regs_set_return_value(struct pt_regs *regs, unsigned long rc) 333 { 334 regs->regs[0] = rc; 335 } 336 337 /** 338 * regs_get_kernel_argument() - get Nth function argument in kernel 339 * @regs: pt_regs of that context 340 * @n: function argument number (start from 0) 341 * 342 * regs_get_argument() returns @n th argument of the function call. 343 * 344 * Note that this chooses the most likely register mapping. In very rare 345 * cases this may not return correct data, for example, if one of the 346 * function parameters is 16 bytes or bigger. In such cases, we cannot 347 * get access the parameter correctly and the register assignment of 348 * subsequent parameters will be shifted. 349 */ 350 static inline unsigned long regs_get_kernel_argument(struct pt_regs *regs, 351 unsigned int n) 352 { 353 #define NR_REG_ARGUMENTS 8 354 if (n < NR_REG_ARGUMENTS) 355 return pt_regs_read_reg(regs, n); 356 return 0; 357 } 358 359 /* We must avoid circular header include via sched.h */ 360 struct task_struct; 361 int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task); 362 363 static inline unsigned long instruction_pointer(struct pt_regs *regs) 364 { 365 return regs->pc; 366 } 367 static inline void instruction_pointer_set(struct pt_regs *regs, 368 unsigned long val) 369 { 370 regs->pc = val; 371 } 372 373 static inline unsigned long frame_pointer(struct pt_regs *regs) 374 { 375 return regs->regs[29]; 376 } 377 378 #define procedure_link_pointer(regs) ((regs)->regs[30]) 379 380 static inline void procedure_link_pointer_set(struct pt_regs *regs, 381 unsigned long val) 382 { 383 procedure_link_pointer(regs) = val; 384 } 385 386 extern unsigned long profile_pc(struct pt_regs *regs); 387 388 #endif /* __ASSEMBLER__ */ 389 #endif 390