Searched refs:clks_cfg (Results 1 – 5 of 5) sorted by relevance
1198 if (context->bw_ctx.bw.dcn.clk.dppclk_khz < pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000) in dcn20_calculate_dlg_params()1199 context->bw_ctx.bw.dcn.clk.dppclk_khz = pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000; in dcn20_calculate_dlg_params()1201 pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000; in dcn20_calculate_dlg_params()1368 pipes[pipe_cnt].clks_cfg.refclk_mhz = dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000.0; in dcn20_populate_dml_pipes_from_context()1746 pipes[pipe_cnt].clks_cfg.refclk_mhz = dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000.0; in dcn20_calculate_wm()1747 …pipes[pipe_cnt].clks_cfg.dispclk_mhz = context->bw_ctx.dml.vba.RequiredDISPCLK[vlevel][context->bw… in dcn20_calculate_wm()1750 pipes[pipe_cnt].clks_cfg.dppclk_mhz = in dcn20_calculate_wm()1759 pipes[pipe_cnt].clks_cfg.dppclk_mhz = in dcn20_calculate_wm()1769 pipes[pipe_cnt].clks_cfg.dispclk_mhz = context->bw_ctx.dml.soc.clock_limits[0].dispclk_mhz; in dcn20_calculate_wm()1770 pipes[pipe_cnt].clks_cfg.dppclk_mhz = context->bw_ctx.dml.soc.clock_limits[0].dppclk_mhz; in dcn20_calculate_wm()[all …]
506 pipes[0].clks_cfg.voltage = vlevel; in dcn31_calculate_wm_and_dlg_fp()507 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dcn31_calculate_wm_and_dlg_fp()508 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; in dcn31_calculate_wm_and_dlg_fp()544 …pipes[pipe_idx].clks_cfg.dispclk_mhz = get_dispclk_calculated(&context->bw_ctx.dml, pipes, pipe_cn… in dcn31_calculate_wm_and_dlg_fp()545 …pipes[pipe_idx].clks_cfg.dppclk_mhz = get_dppclk_calculated(&context->bw_ctx.dml, pipes, pipe_cnt,… in dcn31_calculate_wm_and_dlg_fp()548 pipes[pipe_idx].clks_cfg.dispclk_mhz = context->bw_ctx.dml.soc.clock_limits[0].dispclk_mhz; in dcn31_calculate_wm_and_dlg_fp()549 pipes[pipe_idx].clks_cfg.dppclk_mhz = context->bw_ctx.dml.soc.clock_limits[0].dppclk_mhz; in dcn31_calculate_wm_and_dlg_fp()551 if (dc->debug.min_disp_clk_khz > pipes[pipe_idx].clks_cfg.dispclk_mhz * 1000) in dcn31_calculate_wm_and_dlg_fp()552 pipes[pipe_idx].clks_cfg.dispclk_mhz = dc->debug.min_disp_clk_khz / 1000.0; in dcn31_calculate_wm_and_dlg_fp()553 if (dc->debug.min_dpp_clk_khz > pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000) in dcn31_calculate_wm_and_dlg_fp()[all …]
506 pipes[0].clks_cfg.voltage = vlevel; in dcn32_set_phantom_stream_timing()507 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dcn32_set_phantom_stream_timing()508 pipes[0].clks_cfg.socclk_mhz = socclk; in dcn32_set_phantom_stream_timing()1524 pipes[0].clks_cfg.dppclk_mhz = get_dppclk_calculated(&context->bw_ctx.dml, pipes, *pipe_cnt, 0); in dcn32_full_validate_bw_helper()1692 if (context->bw_ctx.bw.dcn.clk.dppclk_khz < pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000) in dcn32_calculate_dlg_params()1693 context->bw_ctx.bw.dcn.clk.dppclk_khz = pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000; in dcn32_calculate_dlg_params()1695 … context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz = pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000; in dcn32_calculate_dlg_params()2398 pipes[0].clks_cfg.voltage = vlevel_temp; in dcn32_calculate_wm_and_dlg_fpu()2399 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dcn32_calculate_wm_and_dlg_fpu()2400 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel_temp].socclk_mhz; in dcn32_calculate_wm_and_dlg_fpu()[all …]
68 if (need_recalculate && pipes[0].clks_cfg.dppclk_mhz != 0) in dml_get_voltage_level()538 display_clocks_and_cfg_st *clks = &pipes[j].clks_cfg; in fetch_pipe_params()1083 mode_lib->vba.VoltageLevel = mode_lib->vba.cache_pipes[0].clks_cfg.voltage; in ModeSupportAndSystemConfiguration()1093 mode_lib->vba.DCFCLK = mode_lib->vba.cache_pipes[0].clks_cfg.dcfclk_mhz; in ModeSupportAndSystemConfiguration()1094 mode_lib->vba.SOCCLK = mode_lib->vba.cache_pipes[0].clks_cfg.socclk_mhz; in ModeSupportAndSystemConfiguration()1095 if (mode_lib->vba.cache_pipes[0].clks_cfg.dispclk_mhz > 0.0) in ModeSupportAndSystemConfiguration()1096 mode_lib->vba.DISPCLK = mode_lib->vba.cache_pipes[0].clks_cfg.dispclk_mhz; in ModeSupportAndSystemConfiguration()1109 if (mode_lib->vba.cache_pipes[pipe_idx].clks_cfg.dppclk_mhz > 0.0) in ModeSupportAndSystemConfiguration()1110 mode_lib->vba.DPPCLK[k] = mode_lib->vba.cache_pipes[pipe_idx].clks_cfg.dppclk_mhz; in ModeSupportAndSystemConfiguration()
560 display_clocks_and_cfg_st clks_cfg; member