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Searched refs:cfg_reg (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/clk/spear/
H A Dclk-vco-pll.c134 p = readl_relaxed(pll->vco->cfg_reg); in clk_pll_recalc_rate()
157 val = readl_relaxed(pll->vco->cfg_reg); in clk_pll_set_rate()
160 writel_relaxed(val, pll->vco->cfg_reg); in clk_pll_set_rate()
206 val = readl_relaxed(vco->cfg_reg); in clk_vco_recalc_rate()
251 val = readl_relaxed(vco->cfg_reg); in clk_vco_set_rate()
263 writel_relaxed(val, vco->cfg_reg); in clk_vco_set_rate()
280 *cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt, in clk_register_vco_pll()
290 if (!vco_name || !pll_name || !parent_name || !mode_reg || !cfg_reg || in clk_register_vco_pll()
306 vco->cfg_reg = cfg_reg; in clk_register_vco_pll()
H A Dclk.h93 void __iomem *cfg_reg; member
123 *cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt,
/linux/arch/sparc/kernel/
H A Dsbus.c66 unsigned long cfg_reg; in sbus_set_sbus64() local
78 cfg_reg = iommu->write_complete_reg; in sbus_set_sbus64()
81 cfg_reg += 0x20UL; in sbus_set_sbus64()
84 cfg_reg += 0x28UL; in sbus_set_sbus64()
87 cfg_reg += 0x30UL; in sbus_set_sbus64()
90 cfg_reg += 0x38UL; in sbus_set_sbus64()
93 cfg_reg += 0x40UL; in sbus_set_sbus64()
96 cfg_reg += 0x48UL; in sbus_set_sbus64()
99 cfg_reg += 0x50UL; in sbus_set_sbus64()
106 val = upa_readq(cfg_reg); in sbus_set_sbus64()
[all …]
/linux/drivers/pinctrl/renesas/
H A Dcore.c878 const struct pinmux_cfg_reg *cfg_reg) in sh_pfc_check_cfg_reg() argument
883 sh_pfc_check_reg(drvname, cfg_reg->reg, in sh_pfc_check_cfg_reg()
884 GENMASK(cfg_reg->reg_width - 1, 0)); in sh_pfc_check_cfg_reg()
886 if (cfg_reg->field_width) { in sh_pfc_check_cfg_reg()
887 fw = cfg_reg->field_width; in sh_pfc_check_cfg_reg()
888 n = (cfg_reg->reg_width / fw) << fw; in sh_pfc_check_cfg_reg()
890 if (is0s(&cfg_reg->enum_ids[i], 1 << fw)) in sh_pfc_check_cfg_reg()
894 if ((r << fw) * sizeof(u16) > cfg_reg->reg_width / fw) in sh_pfc_check_cfg_reg()
896 cfg_reg->reg); in sh_pfc_check_cfg_reg()
902 for (i = 0, n = 0, rw = 0; (fw = cfg_reg->var_field_width[i]); i++) { in sh_pfc_check_cfg_reg()
[all …]
/linux/drivers/clk/
H A Dclk-lochnagar.c32 u16 cfg_reg; member
87 .cfg_reg = LOCHNAGAR1_##REG, \
96 .cfg_reg = LOCHNAGAR2_##ID##_CTRL, \
152 ret = regmap_update_bits(regmap, lclk->cfg_reg, in lochnagar_clk_prepare()
168 ret = regmap_update_bits(regmap, lclk->cfg_reg, lclk->ena_mask, 0); in lochnagar_clk_unprepare()
/linux/arch/arm/mach-omap1/
H A Dmux.c399 || !arch_mux_cfg->cfg_reg) { in omap_mux_register()
437 if (!mux_cfg->cfg_reg) in omap_cfg_reg()
440 return mux_cfg->cfg_reg(reg); in omap_cfg_reg()
449 arch_mux_cfg.cfg_reg = omap1_cfg_reg; in omap1_mux_init()
H A Dmux.h130 int (*cfg_reg)(const struct pin_config *cfg); member
/linux/drivers/net/wireless/silabs/wfx/
H A Dbh.c224 u32 cfg_reg; in ack_sdio_data() local
226 wfx_config_reg_read(wdev, &cfg_reg); in ack_sdio_data()
227 if (cfg_reg & 0xFF) { in ack_sdio_data()
228 dev_warn(wdev->dev, "chip reports errors: %02x\n", cfg_reg & 0xFF); in ack_sdio_data()
/linux/drivers/iommu/intel/
H A Dperfmon.c102 dmar_writel(iommu_pmu->cfg_reg + _idx * IOMMU_PMU_CFG_OFFSET + \
112 dmar_writel(iommu_pmu->cfg_reg + _idx * IOMMU_PMU_CFG_OFFSET + \
223 return iommu_pmu->cfg_reg + idx * IOMMU_PMU_CFG_OFFSET; in iommu_config_base()
644 iommu_pmu->cfg_reg = get_perf_reg_address(iommu, DMAR_PERFCFGOFF_REG); in alloc_iommu_pmu()
654 cap = dmar_readl(iommu_pmu->cfg_reg + in alloc_iommu_pmu()
678 cap = dmar_readl(iommu_pmu->cfg_reg + i * IOMMU_PMU_CFG_OFFSET + in alloc_iommu_pmu()
/linux/drivers/gpu/drm/arm/display/komeda/d71/
H A Dd71_component.c579 u32 __iomem *cfg_reg, in compiz_enable_input() argument
595 malidp_write32(cfg_reg, CU_INPUT0_SIZE, in compiz_enable_input()
597 malidp_write32(cfg_reg, CU_INPUT0_OFFSET, in compiz_enable_input()
599 malidp_write32(cfg_reg, CU_INPUT0_CONTROL, ctrl); in compiz_enable_input()
607 u32 __iomem *id_reg, *cfg_reg; in d71_compiz_update() local
612 cfg_reg = reg + index * CU_PER_INPUT_REGS; in d71_compiz_update()
614 compiz_enable_input(id_reg, cfg_reg, in d71_compiz_update()
619 malidp_write32(cfg_reg, CU_INPUT0_CONTROL, 0); in d71_compiz_update()
/linux/drivers/hwmon/
H A Dadt7470.c732 u8 cfg_reg[2]; in pwm1_freq_get() local
736 err = regmap_multi_reg_read(data->regmap, regs, cfg_reg, 2); in pwm1_freq_get()
740 index = (cfg_reg[1] & ADT7470_FREQ_MASK) >> ADT7470_FREQ_SHIFT; in pwm1_freq_get()
741 if (!(cfg_reg[0] & ADT7470_CFG_LF)) in pwm1_freq_get()
/linux/drivers/net/ethernet/hisilicon/
H A Dhns_mdio.c146 u32 cfg_reg, u32 set_val, in mdio_sc_cfg_reg_write() argument
153 regmap_write(mdio_dev->subctrl_vbase, cfg_reg, set_val); in mdio_sc_cfg_reg_write()
/linux/drivers/net/ethernet/freescale/fman/
H A Dfman.c929 u32 cfg_reg = 0; in enable() local
936 cfg_reg = QMI_CFG_EN_COUNTERS; in enable()
939 cfg_reg |= (cfg->qmi_def_tnums_thresh << 8) | cfg->qmi_def_tnums_thresh; in enable()
942 iowrite32be(cfg_reg | QMI_CFG_ENQ_EN | QMI_CFG_DEQ_EN, in enable()
/linux/drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/
H A Dtrans.c3492 u32 base, end, cfg_reg, monitor_len; in iwl_trans_get_fw_monitor_len() local
3495 cfg_reg = le32_to_cpu(trans->dbg.dest_tlv->base_reg); in iwl_trans_get_fw_monitor_len()
3496 cfg_reg = iwl_read_prph(trans, cfg_reg); in iwl_trans_get_fw_monitor_len()
3497 base = (cfg_reg & IWL_LDBG_M2S_BUF_BA_MSK) << in iwl_trans_get_fw_monitor_len()
3503 (cfg_reg & IWL_LDBG_M2S_BUF_SIZE_MSK) >> in iwl_trans_get_fw_monitor_len()
/linux/drivers/net/wireless/intel/iwlwifi/
H A Diwl-drv.c1743 dest_tlv->base_reg = pieces->dbg_dest_tlv->cfg_reg; in iwl_req_fw_callback()
/linux/drivers/accel/habanalabs/goya/
H A Dgoya.c1206 static int goya_stop_queue(struct hl_device *hdev, u32 cfg_reg, in goya_stop_queue() argument
1214 WREG32(cfg_reg, 1 << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT); in goya_stop_queue()