Searched refs:cfg_offset (Results 1 – 8 of 8) sorted by relevance
139 dcb->cfg_offset + NFP_DCB_DATA_OFF_RATE + dcb->tc2idx[i] * 2); in nfp_fill_maxrate()166 dcb->dcbcfg_tbl + dcb->cfg_offset + in update_dscp_maxrate()186 writeb(trust, dcb->dcbcfg_tbl + dcb->cfg_offset + in nfp_nic_set_trust()200 value = readl(dcb->dcbcfg_tbl + dcb->cfg_offset + in nfp_nic_set_enable()203 writel(enable, dcb->dcbcfg_tbl + dcb->cfg_offset + in nfp_nic_set_enable()243 dcb->dcbcfg_tbl + dcb->cfg_offset + NFP_DCB_DATA_OFF_PCP2IDX + i); in nfp_nic_fill_ets()245 dcb->cfg_offset + NFP_DCB_DATA_OFF_IDX_BW_PCT + dcb->tc2idx[i]); in nfp_nic_fill_ets()247 dcb->cfg_offset + NFP_DCB_DATA_OFF_TSA + dcb->tc2idx[i]); in nfp_nic_fill_ets()384 writeb(status, dcb->dcbcfg_tbl + dcb->cfg_offset + in nfp_nic_set_trust_status()415 writeb(idx, dcb->dcbcfg_tbl + dcb->cfg_offset + in nfp_nic_set_dscp2prio()[all …]
30 u32 cfg_offset; member
116 if (remaining < (fm_entry->cfg_offset + fm_entry->cfg_count) * in sof_ipc4_fw_parse_ext_man()119 fm_entry->cfg_offset); in sof_ipc4_fw_parse_ext_man()123 fw_module->fw_mod_cfg = &fm_config[fm_entry->cfg_offset]; in sof_ipc4_fw_parse_ext_man()128 fm_config[fm_entry->cfg_offset].is_bytes); in sof_ipc4_fw_parse_ext_man()
100 uint16_t cfg_offset; member
172 static uint32_t cvmx_pcie_cfgx_read(int pcie_port, uint32_t cfg_offset) in cvmx_pcie_cfgx_read() argument177 pescx_cfg_rd.s.addr = cfg_offset; in cvmx_pcie_cfgx_read()184 pemx_cfg_rd.s.addr = cfg_offset; in cvmx_pcie_cfgx_read()199 static void cvmx_pcie_cfgx_write(int pcie_port, uint32_t cfg_offset, in cvmx_pcie_cfgx_write() argument205 pescx_cfg_wr.s.addr = cfg_offset; in cvmx_pcie_cfgx_write()211 pemx_cfg_wr.s.addr = cfg_offset; in cvmx_pcie_cfgx_write()
215 u8 cfg_offset; member
659 static const u16 cfg_offset[] = { in brcmf_pcie_reset_device() local699 for (i = 0; i < ARRAY_SIZE(cfg_offset); i++) { in brcmf_pcie_reset_device()702 cfg_offset[i]); in brcmf_pcie_reset_device()706 cfg_offset[i], val); in brcmf_pcie_reset_device()
582 u16 cfg_offset; member