Searched refs:cfg5 (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/gpu/drm/v3d/ |
| H A D | v3d_trace.h | 187 TP_PROTO(struct drm_device *dev, u32 cfg5, u32 cfg6),
188 TP_ARGS(dev, cfg5, cfg6),
192 __field(u32, cfg5)
198 __entry->cfg5 = cfg5;
204 __entry->cfg5,
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| /linux/arch/mips/kvm/ |
| H A D | mips.c | 1371 unsigned int sr, cfg5; in kvm_own_fpu() local
1393 cfg5 = kvm_read_c0_guest_config5(cop0); in kvm_own_fpu()
1394 change_c0_config5(MIPS_CONF5_FRE, cfg5); in kvm_own_fpu()
1415 unsigned int sr, cfg5; in kvm_own_msa() local
1437 cfg5 = kvm_read_c0_guest_config5(cop0); in kvm_own_msa()
1438 change_c0_config5(MIPS_CONF5_FRE, cfg5); in kvm_own_msa()
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| /linux/drivers/memory/tegra/ |
| H A D | tegra210-emc-core.c | 1224 u32 cmd_pad, dq_pad, rfu1, cfg5, common_tx, ramp_up_wait = 0; in tegra210_emc_dvfs_power_ramp_up() local
1235 cfg5 = timing->burst_regs[EMC_FBIO_CFG5_INDEX]; in tegra210_emc_dvfs_power_ramp_up()
1313 ccfifo_writel(emc, cfg5 & ~EMC_FBIO_CFG5_CMD_TX_DIS, in tegra210_emc_dvfs_power_ramp_up()
1319 ccfifo_writel(emc, cfg5 & ~EMC_FBIO_CFG5_CMD_TX_DIS, in tegra210_emc_dvfs_power_ramp_up()
1325 ccfifo_writel(emc, cfg5 & ~EMC_FBIO_CFG5_CMD_TX_DIS, in tegra210_emc_dvfs_power_ramp_up()
1339 u32 ramp_down_wait = 0, cmd_pad, dq_pad, rfu1, cfg5, common_tx; in tegra210_emc_dvfs_power_ramp_down() local
1351 cfg5 = entry->burst_regs[EMC_FBIO_CFG5_INDEX]; in tegra210_emc_dvfs_power_ramp_down()
1357 ccfifo_writel(emc, cfg5 | EMC_FBIO_CFG5_CMD_TX_DIS, in tegra210_emc_dvfs_power_ramp_down()
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| /linux/drivers/net/ethernet/broadcom/ |
| H A D | tg3.c | 15253 u32 cfg2 = 0, cfg4 = 0, cfg5 = 0; in tg3_get_eeprom_hw_cfg() local
15274 tg3_read_mem(tp, NIC_SRAM_DATA_CFG_5, &cfg5); in tg3_get_eeprom_hw_cfg()
15429 if (cfg5 & NIC_SRAM_DISABLE_1G_HALF_ADV) in tg3_get_eeprom_hw_cfg()
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