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Searched refs:cfg1 (Results 1 – 25 of 37) sorted by relevance

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/linux/drivers/spi/
H A Dspi-qpic-snand.c98 u32 cfg1; member
373 ecc_cfg->cfg1 = FIELD_PREP(NAND_RECOVERY_CYCLES_MASK, 0) | in qcom_spi_ecc_init_ctx_pipelined()
544 snandc->regs->cfg1 = cpu_to_le32(ecc_cfg->cfg1_raw); in qcom_spi_block_erase()
607 u32 cfg0, cfg1, ecc_bch_cfg; in qcom_spi_read_last_cw() local
622 cfg1 = ecc_cfg->cfg1_raw; in qcom_spi_read_last_cw()
627 snandc->regs->cfg1 = cpu_to_le32(cfg1); in qcom_spi_read_last_cw()
740 u32 cfg0, cfg1, ecc_bch_cfg, num_cw = snandc->qspi->num_cw; in qcom_spi_read_cw_raw() local
751 cfg1 = ecc_cfg->cfg1_raw; in qcom_spi_read_cw_raw()
760 snandc->regs->cfg1 = cpu_to_le32(cfg1); in qcom_spi_read_cw_raw()
856 u32 cfg0, cfg1, ecc_bch_cfg, num_cw = snandc->qspi->num_cw; in qcom_spi_read_page_ecc() local
[all …]
/linux/arch/loongarch/mm/
H A Dcache.c86 unsigned int cfg1; \
88 cfg1 = read_cpucfg(LOONGARCH_CPUCFG17 + leaf); \
99 cdesc->ways = ((cfg1 & CPUCFG_CACHE_WAYS_M) >> CPUCFG_CACHE_WAYS) + 1; \
100 cdesc->sets = 1 << ((cfg1 & CPUCFG_CACHE_SETS_M) >> CPUCFG_CACHE_SETS); \
101 cdesc->linesz = 1 << ((cfg1 & CPUCFG_CACHE_LSIZE_M) >> CPUCFG_CACHE_LSIZE); \
/linux/drivers/comedi/drivers/
H A Dni_at_ao.c106 unsigned short cfg1; member
118 devpriv->cfg1 |= ATAO_CFG1_GRP2WR; in atao_select_reg_group()
120 devpriv->cfg1 &= ~ATAO_CFG1_GRP2WR; in atao_select_reg_group()
121 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG); in atao_select_reg_group()
269 devpriv->cfg1 = 0; in atao_reset()
270 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG); in atao_reset()
/linux/drivers/gpu/drm/exynos/
H A Dexynos_drm_fimc.c419 u32 cfg1, cfg2; in fimc_src_set_transf() local
423 cfg1 = fimc_read(ctx, EXYNOS_MSCTRL); in fimc_src_set_transf()
424 cfg1 &= ~(EXYNOS_MSCTRL_FLIP_X_MIRROR | in fimc_src_set_transf()
433 cfg1 |= EXYNOS_MSCTRL_FLIP_X_MIRROR; in fimc_src_set_transf()
435 cfg1 |= EXYNOS_MSCTRL_FLIP_Y_MIRROR; in fimc_src_set_transf()
440 cfg1 |= EXYNOS_MSCTRL_FLIP_X_MIRROR; in fimc_src_set_transf()
442 cfg1 |= EXYNOS_MSCTRL_FLIP_Y_MIRROR; in fimc_src_set_transf()
445 cfg1 |= (EXYNOS_MSCTRL_FLIP_X_MIRROR | in fimc_src_set_transf()
448 cfg1 &= ~EXYNOS_MSCTRL_FLIP_X_MIRROR; in fimc_src_set_transf()
450 cfg1 &= ~EXYNOS_MSCTRL_FLIP_Y_MIRROR; in fimc_src_set_transf()
[all …]
/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Darb.c202 uint32_t cfg1 = nvif_rd32(device, NV04_PFB_CFG1); in nv04_update_arb() local
225 sim_data.mem_latency = cfg1 & 0xf; in nv04_update_arb()
226 sim_data.mem_page_miss = ((cfg1 >> 4) & 0xf) + ((cfg1 >> 31) & 0x1); in nv04_update_arb()
/linux/drivers/usb/typec/mux/
H A Dps883x.c147 int cfg1, int cfg2, bool reset) in ps883x_configure() argument
175 ret = regmap_write(retimer->regmap, REG_USB_PORT_CONN_STATUS_1, cfg1); in ps883x_configure()
195 int cfg1 = 0x00; in ps883x_set() local
205 cfg1 |= CONN_STATUS_1_DP_CONNECTED | in ps883x_set()
213 cfg1 |= CONN_STATUS_1_DP_SINK_REQUESTED | in ps883x_set()
266 return ps883x_configure(retimer, cfg0, cfg1, cfg2, reset); in ps883x_set()
/linux/drivers/iio/adc/
H A Dimx7d_adc.c235 u32 cfg1 = 0; in imx7d_adc_channel_set() local
242 cfg1 |= (IMX7D_REG_ADC_CH_CFG1_CHANNEL_EN | in imx7d_adc_channel_set()
252 cfg1 |= IMX7D_REG_ADC_CH_CFG1_CHANNEL_SEL(channel); in imx7d_adc_channel_set()
269 writel(cfg1, info->regs + IMX7D_EACH_CHANNEL_REG_OFFSET * channel); in imx7d_adc_channel_set()
H A Dad7173.c659 static bool ad7173_is_setup_equal(const struct ad7173_channel_config *cfg1, in ad7173_is_setup_equal() argument
676 return cfg1->bipolar == cfg2->bipolar && in ad7173_is_setup_equal()
677 cfg1->input_buf == cfg2->input_buf && in ad7173_is_setup_equal()
678 cfg1->sinc3_odr_div == cfg2->sinc3_odr_div && in ad7173_is_setup_equal()
679 cfg1->sinc5_odr_index == cfg2->sinc5_odr_index && in ad7173_is_setup_equal()
680 cfg1->ref_sel == cfg2->ref_sel && in ad7173_is_setup_equal()
681 cfg1->filter_type == cfg2->filter_type; in ad7173_is_setup_equal()
1435 const struct ad7173_channel_config *cfg1, *cfg2; in ad7173_update_scan_mode() local
1437 cfg1 = &st->channels[i].cfg; in ad7173_update_scan_mode()
1446 if (i == j || cfg1->cfg_slot != cfg2->cfg_slot) in ad7173_update_scan_mode()
[all …]
/linux/drivers/net/wireless/realtek/rtw89/
H A Dpci_be.c552 u32 ctrl0, cfg0, cfg1, dec_ctrl, idle_ltcy, act_ltcy, dis_ltcy; in rtw89_pci_ltr_set_v2() local
561 cfg1 = rtw89_read32(rtwdev, R_BE_LTR_CFG_1); in rtw89_pci_ltr_set_v2()
562 if (rtw89_pci_ltr_is_err_reg_val(cfg1)) in rtw89_pci_ltr_set_v2()
590 cfg1 = u32_replace_bits(cfg1, 0xC0, B_BE_LTR_CMAC0_RX_USE_PG_TH_MASK); in rtw89_pci_ltr_set_v2()
591 cfg1 = u32_replace_bits(cfg1, 0xC0, B_BE_LTR_CMAC1_RX_USE_PG_TH_MASK); in rtw89_pci_ltr_set_v2()
609 rtw89_write32(rtwdev, R_BE_LTR_CFG_1, cfg1); in rtw89_pci_ltr_set_v2()
/linux/drivers/perf/
H A Dfsl_imx8_ddr_perf.c601 int cfg1 = event->attr.config1; in ddr_perf_event_add() local
615 cfg1 ^= AXI_MASKING_REVERT; in ddr_perf_event_add()
616 writel(cfg1, pmu->base + COUNTER_DPCR1); in ddr_perf_event_add()
629 cfg1 ^= AXI_MASKING_REVERT; in ddr_perf_event_add()
630 writel(cfg1, pmu->base + COUNTER_MASK_COMP + ((counter - 1) << 4)); in ddr_perf_event_add()
H A Dfsl_imx9_ddr_perf.c634 int cfg1 = event->attr.config1; in ddr_perf_event_add() local
654 imx93_ddr_perf_monitor_config(pmu, event_id, counter, cfg1, cfg2); in ddr_perf_event_add()
658 imx95_ddr_perf_monitor_config(pmu, event_id, counter, cfg1, cfg2); in ddr_perf_event_add()
/linux/drivers/clk/ultrarisc/
H A Dclk-ultrarisc.c45 u32 cfg1, cfg2; in ultrarisc_pll_recalc_rate() local
47 cfg1 = readl_relaxed(pll->base + layout->cfg1_offset); in ultrarisc_pll_recalc_rate()
50 frac = field_get(layout->frac_mask, cfg1); in ultrarisc_pll_recalc_rate()
/linux/drivers/video/fbdev/nvidia/
H A Dnv_hw.c387 unsigned int MClk, NVClk, cfg1; in nv4UpdateArbitrationSettings() local
391 cfg1 = NV_RD32(par->PFB, 0x00000204); in nv4UpdateArbitrationSettings()
397 sim_data.mem_latency = (char)cfg1 & 0x0F; in nv4UpdateArbitrationSettings()
400 (char)(((cfg1 >> 4) & 0x0F) + ((cfg1 >> 31) & 0x01)); in nv4UpdateArbitrationSettings()
626 unsigned int MClk, NVClk, cfg1; in nv10UpdateArbitrationSettings() local
630 cfg1 = NV_RD32(par->PFB, 0x0204); in nv10UpdateArbitrationSettings()
637 sim_data.mem_latency = (char)cfg1 & 0x0F; in nv10UpdateArbitrationSettings()
640 (char)(((cfg1 >> 4) & 0x0F) + ((cfg1 >> 31) & 0x01)); in nv10UpdateArbitrationSettings()
/linux/drivers/net/ethernet/agere/
H A Det131x.c819 &macregs->cfg1); in et1310_config_mac_regs1()
861 writel(0, &macregs->cfg1); in et1310_config_mac_regs1()
869 u32 cfg1; in et1310_config_mac_regs2() local
875 cfg1 = readl(&mac->cfg1); in et1310_config_mac_regs2()
889 cfg1 |= ET_MAC_CFG1_RX_ENABLE | ET_MAC_CFG1_TX_ENABLE | in et1310_config_mac_regs2()
892 cfg1 &= ~(ET_MAC_CFG1_LOOPBACK | ET_MAC_CFG1_RX_FLOW); in et1310_config_mac_regs2()
894 cfg1 |= ET_MAC_CFG1_RX_FLOW; in et1310_config_mac_regs2()
895 writel(cfg1, &mac->cfg1); in et1310_config_mac_regs2()
921 cfg1 = readl(&mac->cfg1); in et1310_config_mac_regs2()
922 } while ((cfg1 & ET_MAC_CFG1_WAIT) != ET_MAC_CFG1_WAIT && delay < 100); in et1310_config_mac_regs2()
[all …]
H A Det131x.h1047 u32 cfg1; /* 0x5000 */ member
/linux/sound/pci/
H A Dals4000.c684 u32 cfg1 = 0; in snd_als4000_set_addr() local
692 cfg1 |= (game_io | 1) << 16; in snd_als4000_set_addr()
694 cfg1 |= (opl_io | 1); in snd_als4000_set_addr()
695 snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA8_LEGACY_CFG1, cfg1); in snd_als4000_set_addr()
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-edp.c1099 u8 cfg1; in qcom_edp_phy_power_on() local
1177 cfg1 = 0x1; in qcom_edp_phy_power_on()
1183 cfg1 = 0x3; in qcom_edp_phy_power_on()
1189 cfg1 = 0xf; in qcom_edp_phy_power_on()
1196 writel(cfg1, edp->edp + DP_PHY_CFG_1); in qcom_edp_phy_power_on()
/linux/include/linux/
H A Dswitchtec.h233 struct partition_info cfg1; member
260 struct partition_info cfg1; member
/linux/sound/pci/au88x0/
H A Dau88x0_core.c1097 dma->cfg1 = 0; in vortex_adbdma_setbuffers()
1102 dma->cfg1 |= 0x88000000 | 0x44000000 | 0x30000000 | (psize - 1); in vortex_adbdma_setbuffers()
1110 dma->cfg1 |= 0x80000000 | 0x40000000 | ((psize - 1) << 0xc); in vortex_adbdma_setbuffers()
1135 hwwrite(vortex->mmio, VORTEX_ADBDMA_BUFCFG1 + (adbdma << 3), dma->cfg1); in vortex_adbdma_setbuffers()
1376 dma->cfg1 = 0; in vortex_wtdma_setbuffers()
1381 dma->cfg1 |= 0x88000000 | 0x44000000 | 0x30000000 | (psize-1); in vortex_wtdma_setbuffers()
1388 dma->cfg1 |= 0x80000000 | 0x40000000 | ((psize-1) << 0xc); in vortex_wtdma_setbuffers()
1406 hwwrite(vortex->mmio, VORTEX_WTDMA_BUFCFG1 + (wtdma << 3), dma->cfg1); in vortex_wtdma_setbuffers()
H A Dau88x0.h112 int cfg1; member
/linux/drivers/net/ethernet/atheros/
H A Dag71xx.c1022 u32 cfg1, cfg2; in ag71xx_mac_link_up() local
1056 cfg1 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG1); in ag71xx_mac_link_up()
1057 cfg1 &= ~(MAC_CFG1_TFC | MAC_CFG1_RFC); in ag71xx_mac_link_up()
1059 cfg1 |= MAC_CFG1_TFC; in ag71xx_mac_link_up()
1062 cfg1 |= MAC_CFG1_RFC; in ag71xx_mac_link_up()
1063 ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, cfg1); in ag71xx_mac_link_up()
/linux/drivers/pci/controller/
H A Dpcie-altera.c380 u8 cfg1 = read ? pcie->pcie_data->cfgrd1 : pcie->pcie_data->cfgwr1; in get_tlp_header() local
384 cfg = (bus == pcie->root_bus_nr) ? cfg0 : cfg1; in get_tlp_header()
386 cfg = (bus > S10_RP_SECONDARY(pcie)) ? cfg0 : cfg1; in get_tlp_header()
/linux/sound/soc/stm/
H A Dstm32_i2s.c862 u32 cfgr, cfgr_mask, cfg1; in stm32_i2s_configure() local
898 cfg1 = I2S_CFG1_FTHVL_SET(fthlv - 1); in stm32_i2s_configure()
901 I2S_CFG1_FTHVL_MASK, cfg1); in stm32_i2s_configure()
/linux/drivers/net/ethernet/smsc/
H A Dsmc91x.c899 int bmcr, cfg1; in smc_phy_fixed() local
904 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG); in smc_phy_fixed()
905 cfg1 |= PHY_CFG1_LNKDIS; in smc_phy_fixed()
906 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1); in smc_phy_fixed()
/linux/drivers/pinctrl/intel/
H A Dpinctrl-intel.c349 u32 cfg0, cfg1, mode; in intel_pin_dbg_show() local
359 cfg1 = readl(intel_get_padcfg(pctrl, pin, PADCFG1)); in intel_pin_dbg_show()
367 seq_printf(s, "0x%08x 0x%08x", cfg0, cfg1); in intel_pin_dbg_show()

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