Searched refs:cascaded (Results 1 – 25 of 30) sorted by relevance
12
51 unsigned int cascaded = offset / 16; in exar_offset_to_sel_addr() local54 return addr + (cascaded ? exar_gpio->cascaded_offset : 0); in exar_offset_to_sel_addr()61 unsigned int cascaded = offset / 16; in exar_offset_to_lvl_addr() local64 return addr + (cascaded ? exar_gpio->cascaded_offset : 0); in exar_offset_to_lvl_addr()
168 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */175 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
24 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
176 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */188 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
69 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
86 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
61 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
145 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
151 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
430 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */444 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
179 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
281 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
267 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
148 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
218 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
631 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
43 /* Secondary IC cascaded to intc0 */
47 /* Secondary IC cascaded to intc0 */
49 /* Secondary IC cascaded to intc0 */
46 /* Secondary IC cascaded to intc0 */
59 /* We are not cascaded */
179 /* The SIC is cascaded off IRQ 26 on the PIC */
96 vlocks can be cascaded in a voting hierarchy to permit better scaling
330 * This PCI host bridge variant has a cascaded interrupt
176 cascaded off of peripheral interrupt 0, which the driver interprets as a