Searched refs:cascade (Results 1 – 25 of 29) sorted by relevance
12
94 u8 val = readb(docg3->cascade->base + reg); in doc_readb()102 u16 val = readw(docg3->cascade->base + reg); in doc_readw()110 writeb(val, docg3->cascade->base + reg); in doc_writeb()116 writew(val, docg3->cascade->base + reg); in doc_writew()650 numerrs = bch_decode(docg3->cascade->bch, NULL, in doc_ecc_bch_fix_data()898 mutex_lock(&docg3->cascade->lock); in doc_read_oob()977 mutex_unlock(&docg3->cascade->lock); in doc_read_oob()1199 mutex_lock(&docg3->cascade->lock); in doc_erase()1207 mutex_unlock(&docg3->cascade->lock); in doc_erase()1436 mutex_lock(&docg3->cascade->lock); in doc_write_oob()[all …]
55 2 ISA cascade79 2 ISA cascade
18 - cascade pattern19 - inversed cascade pattern
58 Inverted cascade mode for Pipe LED::
67 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */79 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */91 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
76 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */88 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */100 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
71 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */83 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */95 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
73 interrupts = <0x1 0x4 0x0 0x4>; /* cascade - first non-critical */86 interrupts = <0x3 0x4 0x2 0x4>; /* cascade */98 interrupts = <0x5 0x4 0x4 0x4>; /* cascade */
70 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */82 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */94 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
71 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
75 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */87 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
74 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */86 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */98 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
72 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */84 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */96 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
68 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
75 interrupts = <0x1e 4 0x1f 4>; /* cascade */
404 parent_irq[0] = irq_create_mapping(parent, acpi_liointc->cascade[0]); in liointc_acpi_init()405 parent_irq[1] = irq_create_mapping(parent, acpi_liointc->cascade[1]); in liointc_acpi_init()
600 priv->parent_hwirq = acpi_eiointc->cascade; in eiointc_acpi_init()601 parent_irq = irq_create_mapping(parent, acpi_eiointc->cascade); in eiointc_acpi_init()
221 fwspec.param[0] = acpi_pchlpc->cascade + GSI_MIN_PCH_IRQ; in pch_lpc_acpi_init()
318 parent_irq[i] = irq_create_mapping(parent, acpi_htvec->cascade[i]); in htvec_acpi_init()
23 errors to cascade after the initial failure, hiding the original failure
140 - interrupts : should contain the cascade interrupt of the "flipper" pic
30 2: 0 XT-PIC cascade