1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * This header is for implementations of dma_map_ops and related code.
4 * It should not be included in drivers just using the DMA API.
5 */
6 #ifndef _LINUX_DMA_MAP_OPS_H
7 #define _LINUX_DMA_MAP_OPS_H
8
9 #include <linux/dma-mapping.h>
10 #include <linux/pgtable.h>
11 #include <linux/slab.h>
12
13 struct cma;
14 struct iommu_ops;
15
16 struct dma_map_ops {
17 void *(*alloc)(struct device *dev, size_t size,
18 dma_addr_t *dma_handle, gfp_t gfp,
19 unsigned long attrs);
20 void (*free)(struct device *dev, size_t size, void *vaddr,
21 dma_addr_t dma_handle, unsigned long attrs);
22 struct page *(*alloc_pages_op)(struct device *dev, size_t size,
23 dma_addr_t *dma_handle, enum dma_data_direction dir,
24 gfp_t gfp);
25 void (*free_pages)(struct device *dev, size_t size, struct page *vaddr,
26 dma_addr_t dma_handle, enum dma_data_direction dir);
27 int (*mmap)(struct device *, struct vm_area_struct *,
28 void *, dma_addr_t, size_t, unsigned long attrs);
29
30 int (*get_sgtable)(struct device *dev, struct sg_table *sgt,
31 void *cpu_addr, dma_addr_t dma_addr, size_t size,
32 unsigned long attrs);
33
34 dma_addr_t (*map_page)(struct device *dev, struct page *page,
35 unsigned long offset, size_t size,
36 enum dma_data_direction dir, unsigned long attrs);
37 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
38 size_t size, enum dma_data_direction dir,
39 unsigned long attrs);
40 /*
41 * map_sg should return a negative error code on error. See
42 * dma_map_sgtable() for a list of appropriate error codes
43 * and their meanings.
44 */
45 int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents,
46 enum dma_data_direction dir, unsigned long attrs);
47 void (*unmap_sg)(struct device *dev, struct scatterlist *sg, int nents,
48 enum dma_data_direction dir, unsigned long attrs);
49 dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr,
50 size_t size, enum dma_data_direction dir,
51 unsigned long attrs);
52 void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle,
53 size_t size, enum dma_data_direction dir,
54 unsigned long attrs);
55 void (*sync_single_for_cpu)(struct device *dev, dma_addr_t dma_handle,
56 size_t size, enum dma_data_direction dir);
57 void (*sync_single_for_device)(struct device *dev,
58 dma_addr_t dma_handle, size_t size,
59 enum dma_data_direction dir);
60 void (*sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg,
61 int nents, enum dma_data_direction dir);
62 void (*sync_sg_for_device)(struct device *dev, struct scatterlist *sg,
63 int nents, enum dma_data_direction dir);
64 void (*cache_sync)(struct device *dev, void *vaddr, size_t size,
65 enum dma_data_direction direction);
66 int (*dma_supported)(struct device *dev, u64 mask);
67 u64 (*get_required_mask)(struct device *dev);
68 size_t (*max_mapping_size)(struct device *dev);
69 size_t (*opt_mapping_size)(void);
70 unsigned long (*get_merge_boundary)(struct device *dev);
71 };
72
73 #ifdef CONFIG_ARCH_HAS_DMA_OPS
74 #include <asm/dma-mapping.h>
75
get_dma_ops(struct device * dev)76 static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
77 {
78 if (dev->dma_ops)
79 return dev->dma_ops;
80 return get_arch_dma_ops();
81 }
82
set_dma_ops(struct device * dev,const struct dma_map_ops * dma_ops)83 static inline void set_dma_ops(struct device *dev,
84 const struct dma_map_ops *dma_ops)
85 {
86 dev->dma_ops = dma_ops;
87 }
88 #else /* CONFIG_ARCH_HAS_DMA_OPS */
get_dma_ops(struct device * dev)89 static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
90 {
91 return NULL;
92 }
set_dma_ops(struct device * dev,const struct dma_map_ops * dma_ops)93 static inline void set_dma_ops(struct device *dev,
94 const struct dma_map_ops *dma_ops)
95 {
96 }
97 #endif /* CONFIG_ARCH_HAS_DMA_OPS */
98
99 #ifdef CONFIG_DMA_CMA
100 extern struct cma *dma_contiguous_default_area;
101
dev_get_cma_area(struct device * dev)102 static inline struct cma *dev_get_cma_area(struct device *dev)
103 {
104 if (dev && dev->cma_area)
105 return dev->cma_area;
106 return dma_contiguous_default_area;
107 }
108
109 void dma_contiguous_reserve(phys_addr_t addr_limit);
110 int __init dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base,
111 phys_addr_t limit, struct cma **res_cma, bool fixed);
112
113 struct page *dma_alloc_from_contiguous(struct device *dev, size_t count,
114 unsigned int order, bool no_warn);
115 bool dma_release_from_contiguous(struct device *dev, struct page *pages,
116 int count);
117 struct page *dma_alloc_contiguous(struct device *dev, size_t size, gfp_t gfp);
118 void dma_free_contiguous(struct device *dev, struct page *page, size_t size);
119
120 void dma_contiguous_early_fixup(phys_addr_t base, unsigned long size);
121 #else /* CONFIG_DMA_CMA */
dev_get_cma_area(struct device * dev)122 static inline struct cma *dev_get_cma_area(struct device *dev)
123 {
124 return NULL;
125 }
dma_contiguous_reserve(phys_addr_t limit)126 static inline void dma_contiguous_reserve(phys_addr_t limit)
127 {
128 }
dma_contiguous_reserve_area(phys_addr_t size,phys_addr_t base,phys_addr_t limit,struct cma ** res_cma,bool fixed)129 static inline int dma_contiguous_reserve_area(phys_addr_t size,
130 phys_addr_t base, phys_addr_t limit, struct cma **res_cma,
131 bool fixed)
132 {
133 return -ENOSYS;
134 }
dma_alloc_from_contiguous(struct device * dev,size_t count,unsigned int order,bool no_warn)135 static inline struct page *dma_alloc_from_contiguous(struct device *dev,
136 size_t count, unsigned int order, bool no_warn)
137 {
138 return NULL;
139 }
dma_release_from_contiguous(struct device * dev,struct page * pages,int count)140 static inline bool dma_release_from_contiguous(struct device *dev,
141 struct page *pages, int count)
142 {
143 return false;
144 }
145 /* Use fallback alloc() and free() when CONFIG_DMA_CMA=n */
dma_alloc_contiguous(struct device * dev,size_t size,gfp_t gfp)146 static inline struct page *dma_alloc_contiguous(struct device *dev, size_t size,
147 gfp_t gfp)
148 {
149 return NULL;
150 }
dma_free_contiguous(struct device * dev,struct page * page,size_t size)151 static inline void dma_free_contiguous(struct device *dev, struct page *page,
152 size_t size)
153 {
154 __free_pages(page, get_order(size));
155 }
dma_contiguous_early_fixup(phys_addr_t base,unsigned long size)156 static inline void dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
157 {
158 }
159 #endif /* CONFIG_DMA_CMA*/
160
161 #ifdef CONFIG_DMA_DECLARE_COHERENT
162 int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
163 dma_addr_t device_addr, size_t size);
164 void dma_release_coherent_memory(struct device *dev);
165 int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size,
166 dma_addr_t *dma_handle, void **ret);
167 int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr);
168 int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma,
169 void *cpu_addr, size_t size, int *ret);
170 #else
dma_declare_coherent_memory(struct device * dev,phys_addr_t phys_addr,dma_addr_t device_addr,size_t size)171 static inline int dma_declare_coherent_memory(struct device *dev,
172 phys_addr_t phys_addr, dma_addr_t device_addr, size_t size)
173 {
174 return -ENOSYS;
175 }
176
177 #define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0)
178 #define dma_release_from_dev_coherent(dev, order, vaddr) (0)
179 #define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0)
dma_release_coherent_memory(struct device * dev)180 static inline void dma_release_coherent_memory(struct device *dev) { }
181 #endif /* CONFIG_DMA_DECLARE_COHERENT */
182
183 #ifdef CONFIG_DMA_GLOBAL_POOL
184 void *dma_alloc_from_global_coherent(struct device *dev, ssize_t size,
185 dma_addr_t *dma_handle);
186 int dma_release_from_global_coherent(int order, void *vaddr);
187 int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr,
188 size_t size, int *ret);
189 int dma_init_global_coherent(phys_addr_t phys_addr, size_t size);
190 #else
dma_alloc_from_global_coherent(struct device * dev,ssize_t size,dma_addr_t * dma_handle)191 static inline void *dma_alloc_from_global_coherent(struct device *dev,
192 ssize_t size, dma_addr_t *dma_handle)
193 {
194 return NULL;
195 }
dma_release_from_global_coherent(int order,void * vaddr)196 static inline int dma_release_from_global_coherent(int order, void *vaddr)
197 {
198 return 0;
199 }
dma_mmap_from_global_coherent(struct vm_area_struct * vma,void * cpu_addr,size_t size,int * ret)200 static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma,
201 void *cpu_addr, size_t size, int *ret)
202 {
203 return 0;
204 }
205 #endif /* CONFIG_DMA_GLOBAL_POOL */
206
207 int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
208 void *cpu_addr, dma_addr_t dma_addr, size_t size,
209 unsigned long attrs);
210 int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
211 void *cpu_addr, dma_addr_t dma_addr, size_t size,
212 unsigned long attrs);
213 struct page *dma_common_alloc_pages(struct device *dev, size_t size,
214 dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp);
215 void dma_common_free_pages(struct device *dev, size_t size, struct page *vaddr,
216 dma_addr_t dma_handle, enum dma_data_direction dir);
217
218 struct page **dma_common_find_pages(void *cpu_addr);
219 void *dma_common_contiguous_remap(struct page *page, size_t size, pgprot_t prot,
220 const void *caller);
221 void *dma_common_pages_remap(struct page **pages, size_t size, pgprot_t prot,
222 const void *caller);
223 void dma_common_free_remap(void *cpu_addr, size_t size);
224
225 struct page *dma_alloc_from_pool(struct device *dev, size_t size,
226 void **cpu_addr, gfp_t flags,
227 bool (*phys_addr_ok)(struct device *, phys_addr_t, size_t));
228 bool dma_free_from_pool(struct device *dev, void *start, size_t size);
229
230 int dma_direct_set_offset(struct device *dev, phys_addr_t cpu_start,
231 dma_addr_t dma_start, u64 size);
232
233 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
234 defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
235 defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL)
236 extern bool dma_default_coherent;
dev_is_dma_coherent(struct device * dev)237 static inline bool dev_is_dma_coherent(struct device *dev)
238 {
239 return dev->dma_coherent;
240 }
241 #else
242 #define dma_default_coherent true
243
dev_is_dma_coherent(struct device * dev)244 static inline bool dev_is_dma_coherent(struct device *dev)
245 {
246 return true;
247 }
248 #endif
249
dma_reset_need_sync(struct device * dev)250 static inline void dma_reset_need_sync(struct device *dev)
251 {
252 #ifdef CONFIG_DMA_NEED_SYNC
253 /* Reset it only once so that the function can be called on hotpath */
254 if (unlikely(dev->dma_skip_sync))
255 dev->dma_skip_sync = false;
256 #endif
257 }
258
259 /*
260 * Check whether potential kmalloc() buffers are safe for non-coherent DMA.
261 */
dma_kmalloc_safe(struct device * dev,enum dma_data_direction dir)262 static inline bool dma_kmalloc_safe(struct device *dev,
263 enum dma_data_direction dir)
264 {
265 /*
266 * If DMA bouncing of kmalloc() buffers is disabled, the kmalloc()
267 * caches have already been aligned to a DMA-safe size.
268 */
269 if (!IS_ENABLED(CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC))
270 return true;
271
272 /*
273 * kmalloc() buffers are DMA-safe irrespective of size if the device
274 * is coherent or the direction is DMA_TO_DEVICE (non-desctructive
275 * cache maintenance and benign cache line evictions).
276 */
277 if (dev_is_dma_coherent(dev) || dir == DMA_TO_DEVICE)
278 return true;
279
280 return false;
281 }
282
283 /*
284 * Check whether the given size, assuming it is for a kmalloc()'ed buffer, is
285 * sufficiently aligned for non-coherent DMA.
286 */
dma_kmalloc_size_aligned(size_t size)287 static inline bool dma_kmalloc_size_aligned(size_t size)
288 {
289 /*
290 * Larger kmalloc() sizes are guaranteed to be aligned to
291 * ARCH_DMA_MINALIGN.
292 */
293 if (size >= 2 * ARCH_DMA_MINALIGN ||
294 IS_ALIGNED(kmalloc_size_roundup(size), dma_get_cache_alignment()))
295 return true;
296
297 return false;
298 }
299
300 /*
301 * Check whether the given object size may have originated from a kmalloc()
302 * buffer with a slab alignment below the DMA-safe alignment and needs
303 * bouncing for non-coherent DMA. The pointer alignment is not considered and
304 * in-structure DMA-safe offsets are the responsibility of the caller. Such
305 * code should use the static ARCH_DMA_MINALIGN for compiler annotations.
306 *
307 * The heuristics can have false positives, bouncing unnecessarily, though the
308 * buffers would be small. False negatives are theoretically possible if, for
309 * example, multiple small kmalloc() buffers are coalesced into a larger
310 * buffer that passes the alignment check. There are no such known constructs
311 * in the kernel.
312 */
dma_kmalloc_needs_bounce(struct device * dev,size_t size,enum dma_data_direction dir)313 static inline bool dma_kmalloc_needs_bounce(struct device *dev, size_t size,
314 enum dma_data_direction dir)
315 {
316 return !dma_kmalloc_safe(dev, dir) && !dma_kmalloc_size_aligned(size);
317 }
318
319 void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
320 gfp_t gfp, unsigned long attrs);
321 void arch_dma_free(struct device *dev, size_t size, void *cpu_addr,
322 dma_addr_t dma_addr, unsigned long attrs);
323
324 #ifdef CONFIG_ARCH_HAS_DMA_SET_MASK
325 void arch_dma_set_mask(struct device *dev, u64 mask);
326 #else
327 #define arch_dma_set_mask(dev, mask) do { } while (0)
328 #endif
329
330 #ifdef CONFIG_MMU
331 /*
332 * Page protection so that devices that can't snoop CPU caches can use the
333 * memory coherently. We default to pgprot_noncached which is usually used
334 * for ioremap as a safe bet, but architectures can override this with less
335 * strict semantics if possible.
336 */
337 #ifndef pgprot_dmacoherent
338 #define pgprot_dmacoherent(prot) pgprot_noncached(prot)
339 #endif
340
341 pgprot_t dma_pgprot(struct device *dev, pgprot_t prot, unsigned long attrs);
342 #else
dma_pgprot(struct device * dev,pgprot_t prot,unsigned long attrs)343 static inline pgprot_t dma_pgprot(struct device *dev, pgprot_t prot,
344 unsigned long attrs)
345 {
346 return prot; /* no protection bits supported without page tables */
347 }
348 #endif /* CONFIG_MMU */
349
350 #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE
351 void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
352 enum dma_data_direction dir);
353 #else
arch_sync_dma_for_device(phys_addr_t paddr,size_t size,enum dma_data_direction dir)354 static inline void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
355 enum dma_data_direction dir)
356 {
357 }
358 #endif /* ARCH_HAS_SYNC_DMA_FOR_DEVICE */
359
360 #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU
361 void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
362 enum dma_data_direction dir);
363 #else
arch_sync_dma_for_cpu(phys_addr_t paddr,size_t size,enum dma_data_direction dir)364 static inline void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
365 enum dma_data_direction dir)
366 {
367 }
368 #endif /* ARCH_HAS_SYNC_DMA_FOR_CPU */
369
370 #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
371 void arch_sync_dma_for_cpu_all(void);
372 #else
arch_sync_dma_for_cpu_all(void)373 static inline void arch_sync_dma_for_cpu_all(void)
374 {
375 }
376 #endif /* CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL */
377
378 #ifdef CONFIG_ARCH_HAS_DMA_PREP_COHERENT
379 void arch_dma_prep_coherent(struct page *page, size_t size);
380 #else
arch_dma_prep_coherent(struct page * page,size_t size)381 static inline void arch_dma_prep_coherent(struct page *page, size_t size)
382 {
383 }
384 #endif /* CONFIG_ARCH_HAS_DMA_PREP_COHERENT */
385
386 #ifdef CONFIG_ARCH_HAS_DMA_MARK_CLEAN
387 void arch_dma_mark_clean(phys_addr_t paddr, size_t size);
388 #else
arch_dma_mark_clean(phys_addr_t paddr,size_t size)389 static inline void arch_dma_mark_clean(phys_addr_t paddr, size_t size)
390 {
391 }
392 #endif /* ARCH_HAS_DMA_MARK_CLEAN */
393
394 void *arch_dma_set_uncached(void *addr, size_t size);
395 void arch_dma_clear_uncached(void *addr, size_t size);
396
397 #ifdef CONFIG_ARCH_HAS_DMA_MAP_DIRECT
398 bool arch_dma_map_page_direct(struct device *dev, phys_addr_t addr);
399 bool arch_dma_unmap_page_direct(struct device *dev, dma_addr_t dma_handle);
400 bool arch_dma_map_sg_direct(struct device *dev, struct scatterlist *sg,
401 int nents);
402 bool arch_dma_unmap_sg_direct(struct device *dev, struct scatterlist *sg,
403 int nents);
404 #else
405 #define arch_dma_map_page_direct(d, a) (false)
406 #define arch_dma_unmap_page_direct(d, a) (false)
407 #define arch_dma_map_sg_direct(d, s, n) (false)
408 #define arch_dma_unmap_sg_direct(d, s, n) (false)
409 #endif
410
411 #ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS
412 void arch_setup_dma_ops(struct device *dev, bool coherent);
413 #else
arch_setup_dma_ops(struct device * dev,bool coherent)414 static inline void arch_setup_dma_ops(struct device *dev, bool coherent)
415 {
416 }
417 #endif /* CONFIG_ARCH_HAS_SETUP_DMA_OPS */
418
419 #ifdef CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS
420 void arch_teardown_dma_ops(struct device *dev);
421 #else
arch_teardown_dma_ops(struct device * dev)422 static inline void arch_teardown_dma_ops(struct device *dev)
423 {
424 }
425 #endif /* CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS */
426
427 #ifdef CONFIG_DMA_API_DEBUG
428 void dma_debug_add_bus(const struct bus_type *bus);
429 void debug_dma_dump_mappings(struct device *dev);
430 #else
dma_debug_add_bus(const struct bus_type * bus)431 static inline void dma_debug_add_bus(const struct bus_type *bus)
432 {
433 }
debug_dma_dump_mappings(struct device * dev)434 static inline void debug_dma_dump_mappings(struct device *dev)
435 {
436 }
437 #endif /* CONFIG_DMA_API_DEBUG */
438
439 extern const struct dma_map_ops dma_dummy_ops;
440 #endif /* _LINUX_DMA_MAP_OPS_H */
441