xref: /linux/drivers/staging/rtl8723bs/include/rtw_rf.h (revision 3a39d672e7f48b8d6b91a09afa4b55352773b4b5)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /******************************************************************************
3  *
4  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5  *
6  ******************************************************************************/
7 #ifndef	__RTW_RF_H_
8 #define __RTW_RF_H_
9 
10 
11 #define OFDM_PHY		1
12 #define MIXED_PHY		2
13 #define CCK_PHY			3
14 
15 #define NumRates		13
16 
17 /*  slot time for 11g */
18 #define SHORT_SLOT_TIME		9
19 #define NON_SHORT_SLOT_TIME	20
20 
21 #define RTL8711_RF_MAX_SENS	 6
22 #define RTL8711_RF_DEF_SENS	 4
23 
24 /*
25  * We now define the following channels as the max channels in each channel plan.
26  * 2G, total 14 chnls
27  * {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}
28  */
29 #define	MAX_CHANNEL_NUM_2G	14
30 #define	MAX_CHANNEL_NUM		14
31 
32 #define NUM_REGULATORYS	1
33 
34 /* Country codes */
35 #define USA			0x555320
36 #define EUROPE			0x1 /* temp, should be provided later */
37 #define JAPAN			0x2 /* temp, should be provided later */
38 
39 struct	regulatory_class {
40 	u32 starting_freq;			/* MHz, */
41 	u8 channel_set[MAX_CHANNEL_NUM];
42 	u8 channel_cck_power[MAX_CHANNEL_NUM];/* dbm */
43 	u8 channel_ofdm_power[MAX_CHANNEL_NUM];/* dbm */
44 	u8 txpower_limit;			/* dbm */
45 	u8 channel_spacing;			/* MHz */
46 	u8 modem;
47 };
48 
49 enum {
50 	cESS			= 0x0001,
51 	cIBSS			= 0x0002,
52 	cPollable		= 0x0004,
53 	cPollReq		= 0x0008,
54 	cPrivacy		= 0x0010,
55 	cShortPreamble		= 0x0020,
56 	cPBCC			= 0x0040,
57 	cChannelAgility		= 0x0080,
58 	cSpectrumMgnt		= 0x0100,
59 	cQos			= 0x0200,	/*  For HCCA, use with CF-Pollable and CF-PollReq */
60 	cShortSlotTime		= 0x0400,
61 	cAPSD			= 0x0800,
62 	cRM			= 0x1000,	/*  RRM (Radio Request Measurement) */
63 	cDSSS_OFDM		= 0x2000,
64 	cDelayedBA		= 0x4000,
65 	cImmediateBA		= 0x8000,
66 };
67 
68 enum {
69 	PREAMBLE_LONG	= 1,
70 	PREAMBLE_AUTO	= 2,
71 	PREAMBLE_SHORT	= 3,
72 };
73 
74 /*  Bandwidth Offset */
75 #define HAL_PRIME_CHNL_OFFSET_DONT_CARE	0
76 #define HAL_PRIME_CHNL_OFFSET_LOWER	1
77 #define HAL_PRIME_CHNL_OFFSET_UPPER	2
78 
79 /*  Represent Channel Width in HT Capabilities */
80 enum channel_width {
81 	CHANNEL_WIDTH_20 = 0,
82 	CHANNEL_WIDTH_40 = 1,
83 };
84 
85 /*  Represent Extension Channel Offset in HT Capabilities */
86 /*  This is available only in 40Mhz mode. */
87 enum extchnl_offset {
88 	EXTCHNL_OFFSET_NO_EXT = 0,
89 	EXTCHNL_OFFSET_UPPER = 1,
90 	EXTCHNL_OFFSET_NO_DEF = 2,
91 	EXTCHNL_OFFSET_LOWER = 3,
92 };
93 
94 enum {
95 	HT_DATA_SC_DONOT_CARE = 0,
96 	HT_DATA_SC_20_UPPER_OF_40MHZ = 1,
97 	HT_DATA_SC_20_LOWER_OF_40MHZ = 2,
98 };
99 
100 #endif /* _RTL8711_RF_H_ */
101