| /linux/drivers/gpu/drm/amd/display/dc/basics/ |
| H A D | dc_common.c | 56 if (pipe_ctx->bottom_pipe && is_lower_pipe_tree_visible(pipe_ctx->bottom_pipe)) in is_lower_pipe_tree_visible()
76 if (pipe_ctx->bottom_pipe && is_lower_pipe_tree_visible(pipe_ctx->bottom_pipe)) in is_pipe_tree_visible()
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| H A D | dce_calcs.c | 2803 if (!pipe[i].stream || !pipe[i].bottom_pipe) in populate_initial_data()
2880 …data->src_height[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.v… in populate_initial_data()
2881 …data->src_width[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.vi… in populate_initial_data()
2883 pipe[i].bottom_pipe->plane_state->plane_size.surface_pitch); in populate_initial_data()
2884 …data->h_taps[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.taps.… in populate_initial_data()
2885 …data->v_taps[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.taps.… in populate_initial_data()
2887 pipe[i].bottom_pipe->plane_res.scl_data.ratios.horz.value); in populate_initial_data()
2889 pipe[i].bottom_pipe->plane_res.scl_data.ratios.vert.value); in populate_initial_data()
2890 switch (pipe[i].bottom_pipe->plane_state->rotation) { in populate_initial_data()
2915 if (!pipe[i].stream || pipe[i].bottom_pipe) in populate_initial_data()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 570 pipe = pipe->bottom_pipe; in dcn32_get_num_free_pipes()
639 pipe = pipe->bottom_pipe; in dcn32_assign_subvp_pipe()
693 pipe = pipe->bottom_pipe; in dcn32_enough_pipes_for_subvp()
1897 pri_pipe->top_pipe->next_odm_pipe->bottom_pipe = sec_pipe; in dcn32_split_stream_for_mpc_or_odm()
1900 if (pri_pipe->bottom_pipe && pri_pipe->bottom_pipe->next_odm_pipe) { in dcn32_split_stream_for_mpc_or_odm()
1901 pri_pipe->bottom_pipe->next_odm_pipe->top_pipe = sec_pipe; in dcn32_split_stream_for_mpc_or_odm()
1902 sec_pipe->bottom_pipe = pri_pipe->bottom_pipe->next_odm_pipe; in dcn32_split_stream_for_mpc_or_odm()
1919 if (pri_pipe->bottom_pipe) { in dcn32_split_stream_for_mpc_or_odm()
1920 ASSERT(pri_pipe->bottom_pipe != sec_pipe); in dcn32_split_stream_for_mpc_or_odm()
1921 sec_pipe->bottom_pipe = pri_pipe->bottom_pipe; in dcn32_split_stream_for_mpc_or_odm()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml2/ |
| H A D | dml2_mall_phantom.c | 118 pipe->bottom_pipe = NULL; in merge_pipes_for_subvp()
130 struct pipe_ctx *bottom_pipe = pipe->bottom_pipe; in merge_pipes_for_subvp() local
132 top_pipe->bottom_pipe = bottom_pipe; in merge_pipes_for_subvp()
133 if (bottom_pipe) in merge_pipes_for_subvp()
134 bottom_pipe->top_pipe = top_pipe; in merge_pipes_for_subvp()
137 pipe->bottom_pipe = NULL; in merge_pipes_for_subvp()
197 pipe = pipe->bottom_pipe; in get_num_free_pipes()
260 pipe = pipe->bottom_pipe; in assign_subvp_pipe()
324 pipe = pipe->bottom_pipe; in enough_pipes_for_subvp()
779 curr_pipe = curr_pipe->bottom_pipe; in enable_phantom_plane()
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| H A D | dml2_translation_helper.c | 1194 pipe = pipe->bottom_pipe; in dml2_populate_pipe_to_plane_index_mapping()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| H A D | dcn_calcs.c | 314 } else if (pipe->bottom_pipe != NULL && pipe->bottom_pipe->plane_state == pipe->plane_state) { in pipe_ctx_to_e2e_pipe_params()
542 if (primary_pipe->bottom_pipe) { in split_stream_across_pipes()
543 ASSERT(primary_pipe->bottom_pipe != secondary_pipe); in split_stream_across_pipes()
544 secondary_pipe->bottom_pipe = primary_pipe->bottom_pipe; in split_stream_across_pipes()
545 secondary_pipe->bottom_pipe->top_pipe = secondary_pipe; in split_stream_across_pipes()
547 primary_pipe->bottom_pipe = secondary_pipe; in split_stream_across_pipes()
946 if (pipe->bottom_pipe && pipe->bottom_pipe->plane_state == pipe->plane_state) { in dcn_validate_bandwidth()
950 int viewport_b_end = pipe->bottom_pipe->plane_res.scl_data.viewport.width in dcn_validate_bandwidth()
951 + pipe->bottom_pipe->plane_res.scl_data.viewport.x; in dcn_validate_bandwidth()
955 - pipe->bottom_pipe->plane_res.scl_data.viewport.x; in dcn_validate_bandwidth()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource_helpers.c | 125 pipe->bottom_pipe = NULL; in dcn32_merge_pipes_for_subvp()
137 struct pipe_ctx *bottom_pipe = pipe->bottom_pipe; in dcn32_merge_pipes_for_subvp() local
139 top_pipe->bottom_pipe = bottom_pipe; in dcn32_merge_pipes_for_subvp()
140 if (bottom_pipe) in dcn32_merge_pipes_for_subvp()
141 bottom_pipe->top_pipe = top_pipe; in dcn32_merge_pipes_for_subvp()
144 pipe->bottom_pipe = NULL; in dcn32_merge_pipes_for_subvp()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_state.c | 156 if (cur_pipe->bottom_pipe) in dc_state_copy_internal()
157 cur_pipe->bottom_pipe = &dst_state->res_ctx.pipe_ctx[cur_pipe->bottom_pipe->pipe_idx]; in dc_state_copy_internal()
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| /linux/drivers/gpu/drm/amd/display/dc/dce60/ |
| H A D | dce60_hw_sequencer.c | 312 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0; in dce60_program_front_end_for_pipe()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| H A D | dce110_hwseq.c | 1693 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != NULL; in dce110_apply_single_controller_ctx_to_hw()
2559 if (pipe_ctx->bottom_pipe) { in program_surface_visibility()
2562 ASSERT(pipe_ctx->bottom_pipe->bottom_pipe == NULL); in program_surface_visibility()
2564 if (pipe_ctx->bottom_pipe->plane_state->visible) { in program_surface_visibility()
2918 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != NULL; in dce110_program_front_end_for_pipe()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| H A D | dcn10_hwseq.c | 941 for (other_pipe = pipe->bottom_pipe; other_pipe != NULL; other_pipe = other_pipe->bottom_pipe) { in calculate_vready_offset_for_group()
1333 pipe_ctx->bottom_pipe = NULL; in dcn10_plane_atomic_disable()
2679 bool per_pixel_alpha = pipe_ctx->plane_state->per_pixel_alpha && pipe_ctx->bottom_pipe; in dcn10_update_mpcc()
2756 pipe_ctx->plane_state->per_pixel_alpha && pipe_ctx->bottom_pipe; in update_scaler()
3502 if ((pipe_ctx->top_pipe != NULL) || (pipe_ctx->bottom_pipe != NULL)) { in dcn10_set_cursor_position()
3642 if (pipe_ctx->bottom_pipe) { in dcn10_set_cursor_position()
3644 pipe_ctx->bottom_pipe->plane_res.scl_data.viewport.y; in dcn10_set_cursor_position()
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_dmub_srv.c | 819 if (subvp_pipe->bottom_pipe) { in populate_subvp_cmd_pipe_info()
820 pipe_data->pipe_config.subvp_data.main_split_pipe_index = subvp_pipe->bottom_pipe->pipe_idx; in populate_subvp_cmd_pipe_info()
834 if (phantom_pipe->bottom_pipe) { in populate_subvp_cmd_pipe_info()
835 …pipe_data->pipe_config.subvp_data.phantom_split_pipe_index = phantom_pipe->bottom_pipe->plane_res.… in populate_subvp_cmd_pipe_info()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn21/ |
| H A D | dcn21_resource.c | 823 struct pipe_ctx *mpo_pipe = pipe->bottom_pipe; in dcn21_fast_validate_bw()
847 struct pipe_ctx *hsplit_pipe = pipe->bottom_pipe; in dcn21_fast_validate_bw()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| H A D | dcn201_hwseq.c | 426 bool per_pixel_alpha = pipe_ctx->plane_state->per_pixel_alpha && pipe_ctx->bottom_pipe; in dcn201_update_mpcc()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.c | 1593 …pipe_cnt].pipe.src.is_hsplit = (res_ctx->pipe_ctx[i].bottom_pipe && res_ctx->pipe_ctx[i].bottom_pi… in dcn20_populate_dml_pipes_from_context()
1657 struct pipe_ctx *split_pipe = res_ctx->pipe_ctx[i].bottom_pipe; in dcn20_populate_dml_pipes_from_context()
1661 split_pipe = split_pipe->bottom_pipe; in dcn20_populate_dml_pipes_from_context()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| H A D | dcn35_hwseq.c | 953 pipe_ctx->bottom_pipe = NULL; in dcn35_plane_atomic_disable()
|