1 /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) */ 2 /* 3 * Broadcom NetXtreme-E RoCE driver. 4 * 5 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term 6 * Broadcom refers to Broadcom Limited and/or its subsidiaries. 7 * 8 * This software is available to you under a choice of one of two 9 * licenses. You may choose to be licensed under the terms of the GNU 10 * General Public License (GPL) Version 2, available from the file 11 * COPYING in the main directory of this source tree, or the 12 * BSD license below: 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in 22 * the documentation and/or other materials provided with the 23 * distribution. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 27 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 32 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 33 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 34 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 35 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * Description: Uverbs ABI header file 38 */ 39 40 #ifndef __BNXT_RE_UVERBS_ABI_H__ 41 #define __BNXT_RE_UVERBS_ABI_H__ 42 43 #include <linux/types.h> 44 #include <rdma/ib_user_ioctl_cmds.h> 45 46 #define BNXT_RE_ABI_VERSION 1 47 48 #define BNXT_RE_CHIP_ID0_CHIP_NUM_SFT 0x00 49 #define BNXT_RE_CHIP_ID0_CHIP_REV_SFT 0x10 50 #define BNXT_RE_CHIP_ID0_CHIP_MET_SFT 0x18 51 52 enum { 53 BNXT_RE_UCNTX_CMASK_HAVE_CCTX = 0x1ULL, 54 BNXT_RE_UCNTX_CMASK_HAVE_MODE = 0x02ULL, 55 BNXT_RE_UCNTX_CMASK_WC_DPI_ENABLED = 0x04ULL, 56 BNXT_RE_UCNTX_CMASK_DBR_PACING_ENABLED = 0x08ULL, 57 BNXT_RE_UCNTX_CMASK_POW2_DISABLED = 0x10ULL, 58 BNXT_RE_UCNTX_CMASK_MSN_TABLE_ENABLED = 0x40, 59 BNXT_RE_UCNTX_CMASK_QP_RATE_LIMIT_ENABLED = 0x80ULL, 60 BNXT_RE_UCNTX_CMASK_TOGGLE_MEM_UOBJ_SUPPORT = 0x400000ULL, 61 }; 62 63 enum bnxt_re_wqe_mode { 64 BNXT_QPLIB_WQE_MODE_STATIC = 0x00, 65 BNXT_QPLIB_WQE_MODE_VARIABLE = 0x01, 66 BNXT_QPLIB_WQE_MODE_INVALID = 0x02, 67 }; 68 69 enum { 70 BNXT_RE_COMP_MASK_REQ_UCNTX_POW2_SUPPORT = 0x01, 71 BNXT_RE_COMP_MASK_REQ_UCNTX_VAR_WQE_SUPPORT = 0x02, 72 }; 73 74 struct bnxt_re_uctx_req { 75 __aligned_u64 comp_mask; 76 }; 77 78 struct bnxt_re_uctx_resp { 79 __u32 dev_id; 80 __u32 max_qp; 81 __u32 pg_size; 82 __u32 cqe_sz; 83 __u32 max_cqd; 84 __u32 rsvd; 85 __aligned_u64 comp_mask; 86 __u32 chip_id0; 87 __u32 chip_id1; 88 __u32 mode; 89 __u32 rsvd1; /* padding */ 90 }; 91 92 /* 93 * This struct is placed after the ib_uverbs_alloc_pd_resp struct, which is 94 * not 8 byted aligned. To avoid undesired padding in various cases we have to 95 * set this struct to packed. 96 */ 97 struct bnxt_re_pd_resp { 98 __u32 pdid; 99 __u32 dpi; 100 __u64 dbr; 101 } __attribute__((packed, aligned(4))); 102 103 struct bnxt_re_cq_req { 104 __aligned_u64 cq_va; 105 __aligned_u64 cq_handle; 106 __aligned_u64 comp_mask; 107 }; 108 109 enum bnxt_re_resp_cq_mask { 110 BNXT_RE_CQ_TOGGLE_PAGE_SUPPORT = 0x1, 111 }; 112 113 enum bnxt_re_req_cq_mask { 114 BNXT_RE_CQ_FIXED_NUM_CQE_ENABLE = 0x1, 115 }; 116 117 struct bnxt_re_cq_resp { 118 __u32 cqid; 119 __u32 tail; 120 __u32 phase; 121 __u32 rsvd; 122 __aligned_u64 comp_mask; 123 }; 124 125 struct bnxt_re_resize_cq_req { 126 __aligned_u64 cq_va; 127 }; 128 129 enum bnxt_re_qp_mask { 130 BNXT_RE_QP_REQ_MASK_FIXED_QUE_ATTR = 0x1, 131 }; 132 133 struct bnxt_re_qp_req { 134 __aligned_u64 qpsva; 135 __aligned_u64 qprva; 136 __aligned_u64 qp_handle; 137 __aligned_u64 comp_mask; 138 __u32 sq_slots; 139 __u32 sq_npsn; 140 }; 141 142 enum bnxt_re_create_qp_attrs { 143 BNXT_RE_CREATE_QP_ATTR_DBR_HANDLE = UVERBS_ID_DRIVER_NS_WITH_UHW, 144 }; 145 146 struct bnxt_re_qp_resp { 147 __u32 qpid; 148 __u32 rsvd; 149 }; 150 151 struct bnxt_re_srq_req { 152 __aligned_u64 srqva; 153 __aligned_u64 srq_handle; 154 }; 155 156 enum bnxt_re_srq_mask { 157 BNXT_RE_SRQ_TOGGLE_PAGE_SUPPORT = 0x1, 158 }; 159 160 struct bnxt_re_srq_resp { 161 __u32 srqid; 162 __u32 rsvd; /* padding */ 163 __aligned_u64 comp_mask; 164 }; 165 166 enum bnxt_re_shpg_offt { 167 BNXT_RE_BEG_RESV_OFFT = 0x00, 168 BNXT_RE_AVID_OFFT = 0x10, 169 BNXT_RE_AVID_SIZE = 0x04, 170 BNXT_RE_END_RESV_OFFT = 0xFF0 171 }; 172 173 enum bnxt_re_objects { 174 BNXT_RE_OBJECT_ALLOC_PAGE = (1U << UVERBS_ID_NS_SHIFT), 175 BNXT_RE_OBJECT_NOTIFY_DRV, 176 BNXT_RE_OBJECT_GET_TOGGLE_MEM, 177 BNXT_RE_OBJECT_DBR, 178 BNXT_RE_OBJECT_DEFAULT_DBR, 179 }; 180 181 enum bnxt_re_alloc_page_type { 182 BNXT_RE_ALLOC_WC_PAGE = 0, 183 BNXT_RE_ALLOC_DBR_BAR_PAGE, 184 BNXT_RE_ALLOC_DBR_PAGE, 185 }; 186 187 enum bnxt_re_var_alloc_page_attrs { 188 BNXT_RE_ALLOC_PAGE_HANDLE = (1U << UVERBS_ID_NS_SHIFT), 189 BNXT_RE_ALLOC_PAGE_TYPE, 190 BNXT_RE_ALLOC_PAGE_DPI, 191 BNXT_RE_ALLOC_PAGE_MMAP_OFFSET, 192 BNXT_RE_ALLOC_PAGE_MMAP_LENGTH, 193 }; 194 195 enum bnxt_re_alloc_page_attrs { 196 BNXT_RE_DESTROY_PAGE_HANDLE = (1U << UVERBS_ID_NS_SHIFT), 197 }; 198 199 enum bnxt_re_alloc_page_methods { 200 BNXT_RE_METHOD_ALLOC_PAGE = (1U << UVERBS_ID_NS_SHIFT), 201 BNXT_RE_METHOD_DESTROY_PAGE, 202 }; 203 204 enum bnxt_re_notify_drv_methods { 205 BNXT_RE_METHOD_NOTIFY_DRV = (1U << UVERBS_ID_NS_SHIFT), 206 }; 207 208 /* Toggle mem */ 209 210 enum bnxt_re_get_toggle_mem_type { 211 BNXT_RE_CQ_TOGGLE_MEM = 0, 212 BNXT_RE_SRQ_TOGGLE_MEM, 213 }; 214 215 enum bnxt_re_var_toggle_mem_attrs { 216 BNXT_RE_TOGGLE_MEM_HANDLE = (1U << UVERBS_ID_NS_SHIFT), 217 BNXT_RE_TOGGLE_MEM_TYPE, 218 BNXT_RE_TOGGLE_MEM_RES_ID, 219 BNXT_RE_TOGGLE_MEM_MMAP_PAGE, 220 BNXT_RE_TOGGLE_MEM_MMAP_OFFSET, 221 BNXT_RE_TOGGLE_MEM_MMAP_LENGTH, 222 BNXT_RE_TOGGLE_MEM_CQ_HANDLE, 223 BNXT_RE_TOGGLE_MEM_SRQ_HANDLE, 224 }; 225 226 enum bnxt_re_toggle_mem_attrs { 227 BNXT_RE_RELEASE_TOGGLE_MEM_HANDLE = (1U << UVERBS_ID_NS_SHIFT), 228 }; 229 230 enum bnxt_re_toggle_mem_methods { 231 BNXT_RE_METHOD_GET_TOGGLE_MEM = (1U << UVERBS_ID_NS_SHIFT), 232 BNXT_RE_METHOD_RELEASE_TOGGLE_MEM, 233 }; 234 235 struct bnxt_re_packet_pacing_caps { 236 __u32 qp_rate_limit_min; 237 __u32 qp_rate_limit_max; /* In kbps */ 238 /* Corresponding bit will be set if qp type from 239 * 'enum ib_qp_type' is supported, e.g. 240 * supported_qpts |= 1 << IB_QPT_RC 241 */ 242 __u32 supported_qpts; 243 __u32 reserved; 244 }; 245 246 struct bnxt_re_query_device_ex_resp { 247 struct bnxt_re_packet_pacing_caps packet_pacing_caps; 248 }; 249 250 struct bnxt_re_db_region { 251 __u32 dpi; 252 __u32 reserved; 253 __aligned_u64 reserved2; 254 }; 255 256 enum bnxt_re_obj_dbr_alloc_attrs { 257 BNXT_RE_ALLOC_DBR_HANDLE = (1U << UVERBS_ID_NS_SHIFT), 258 BNXT_RE_ALLOC_DBR_ATTR, 259 BNXT_RE_ALLOC_DBR_OFFSET, 260 }; 261 262 enum bnxt_re_obj_dbr_free_attrs { 263 BNXT_RE_FREE_DBR_HANDLE = (1U << UVERBS_ID_NS_SHIFT), 264 }; 265 266 enum bnxt_re_obj_default_dbr_attrs { 267 BNXT_RE_DEFAULT_DBR_ATTR = (1U << UVERBS_ID_NS_SHIFT), 268 }; 269 270 enum bnxt_re_obj_dpi_methods { 271 BNXT_RE_METHOD_DBR_ALLOC = (1U << UVERBS_ID_NS_SHIFT), 272 BNXT_RE_METHOD_DBR_FREE, 273 BNXT_RE_METHOD_GET_DEFAULT_DBR, 274 }; 275 276 #endif /* __BNXT_RE_UVERBS_ABI_H__*/ 277