| /linux/arch/x86/kernel/cpu/mce/ |
| H A D | intel.c | 78 static bool cmci_supported(int *banks) in cmci_supported() argument
98 *banks = min_t(unsigned, MAX_NR_BANKS, cap & MCG_BANKCNT_MASK); in cmci_supported()
241 storm->banks[bank].poll_only = true; in cmci_claim_bank()
277 static void cmci_discover(int banks) in cmci_discover() argument
284 for (i = 0; i < banks; i++) { in cmci_discover()
310 int banks; in cmci_recheck() local
312 if (!mce_available(raw_cpu_ptr(&cpu_info)) || !cmci_supported(&banks)) in cmci_recheck()
344 int banks; in cmci_clear() local
346 if (!cmci_supported(&banks)) in cmci_clear()
349 for (i = 0; i < banks; i++) in cmci_clear()
[all …]
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| /linux/arch/arm/mach-omap2/ |
| H A D | powerdomains7xx_data.c | 37 .banks = 4,
78 .banks = 2,
92 .banks = 1,
105 .banks = 2,
119 .banks = 1,
132 .banks = 1,
144 .banks = 5,
170 .banks = 1,
186 .banks = 1,
201 .banks = 1,
[all …]
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| H A D | powerdomains44xx_data.c | 38 .banks = 5,
63 .banks = 1,
81 .banks = 2,
101 .banks = 1,
119 .banks = 3,
140 .banks = 1,
157 .banks = 1,
174 .banks = 1,
190 .banks = 1,
207 .banks = 3,
[all …]
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| H A D | powerdomains54xx_data.c | 36 .banks = 5,
62 .banks = 2,
91 .banks = 1,
109 .banks = 1,
126 .banks = 1,
142 .banks = 1,
159 .banks = 2,
188 .banks = 3,
209 .banks = 1,
227 .banks = 2,
[all …]
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| H A D | powerdomains3xxx_data.c | 37 .banks = 4,
59 .banks = 1,
75 .banks = 1,
100 .banks = 2,
122 .banks = 2,
139 .banks = 2,
156 .banks = 1,
171 .banks = 1,
192 .banks = 1,
207 .banks = 1,
[all …]
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| H A D | powerdomains2xxx_data.c | 31 .banks = 1,
46 .banks = 1,
61 .banks = 3,
87 .banks = 1,
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| H A D | powerdomains43xx_data.c | 23 .banks = 1,
37 .banks = 3,
65 .banks = 1,
95 .banks = 4,
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| H A D | powerdomains33xx_data.c | 25 .banks = 1,
76 .banks = 3,
119 .banks = 3,
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| /linux/drivers/net/ethernet/intel/ice/ |
| H A D | ice_nvm.c | 248 struct ice_bank_info *banks = &hw->flash.banks; in ice_get_flash_bank_offset() local
255 offset = banks->nvm_ptr; in ice_get_flash_bank_offset()
256 size = banks->nvm_size; in ice_get_flash_bank_offset()
257 active_bank = banks->nvm_bank; in ice_get_flash_bank_offset()
260 offset = banks->orom_ptr; in ice_get_flash_bank_offset()
261 size = banks->orom_size; in ice_get_flash_bank_offset()
262 active_bank = banks->orom_bank; in ice_get_flash_bank_offset()
265 offset = banks->netlist_ptr; in ice_get_flash_bank_offset()
266 size = banks->netlist_size; in ice_get_flash_bank_offset()
267 active_bank = banks->netlist_bank; in ice_get_flash_bank_offset()
[all …]
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_aca.c | 39 static void aca_banks_init(struct aca_banks *banks) in aca_banks_init() argument
41 if (!banks) in aca_banks_init()
44 memset(banks, 0, sizeof(*banks)); in aca_banks_init()
45 INIT_LIST_HEAD(&banks->list); in aca_banks_init()
48 static int aca_banks_add_bank(struct aca_banks *banks, struct aca_bank *bank) in aca_banks_add_bank() argument
62 list_add_tail(&node->node, &banks->list); in aca_banks_add_bank()
64 banks->nr_banks++; in aca_banks_add_bank()
69 static void aca_banks_release(struct aca_banks *banks) in aca_banks_release() argument
73 if (list_empty(&banks->list)) in aca_banks_release()
76 list_for_each_entry_safe(node, tmp, &banks->list, node) { in aca_banks_release()
[all …]
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| /linux/drivers/memory/ |
| H A D | fsl_ifc.c | 54 for (i = 0; i < fsl_ifc_ctrl_dev->banks; i++) { in fsl_ifc_find()
205 int version, banks; in fsl_ifc_ctrl_probe() local
235 banks = (version == FSL_IFC_VERSION_1_0_0) ? 4 : 8; in fsl_ifc_ctrl_probe()
237 version >> 24, (version >> 16) & 0xf, banks); in fsl_ifc_ctrl_probe()
240 fsl_ifc_ctrl_dev->banks = banks; in fsl_ifc_ctrl_probe()
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| /linux/drivers/clk/tegra/ |
| H A D | clk.c | 213 static int tegra_clk_periph_ctx_init(int banks) in tegra_clk_periph_ctx_init() argument
215 periph_state_ctx = kcalloc(2 * banks, sizeof(*periph_state_ctx), in tegra_clk_periph_ctx_init()
223 struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks) in tegra_clk_init() argument
227 if (WARN_ON(banks > ARRAY_SIZE(periph_regs))) in tegra_clk_init()
230 periph_clk_enb_refcnt = kzalloc_objs(*periph_clk_enb_refcnt, 32 * banks); in tegra_clk_init()
234 periph_banks = banks; in tegra_clk_init()
245 if (tegra_clk_periph_ctx_init(banks)) { in tegra_clk_init()
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| /linux/drivers/crypto/intel/qat/qat_common/ |
| H A D | adf_vf_isr.c | 168 struct adf_etr_bank_data *bank = &etr_data->banks[0]; in adf_isr()
207 tasklet_init(&priv_data->banks[0].resp_handler, adf_response_handler, in adf_setup_bh()
208 (unsigned long)priv_data->banks); in adf_setup_bh()
216 tasklet_disable(&priv_data->banks[0].resp_handler); in adf_cleanup_bh()
217 tasklet_kill(&priv_data->banks[0].resp_handler); in adf_cleanup_bh()
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| H A D | adf_isr.c | 230 free_irq(irq, &etr_data->banks[i]); in adf_request_irqs()
251 /* Request msix irq for all banks unless SR-IOV enabled */ in adf_request_irqs()
254 struct adf_etr_bank_data *bank = &etr_data->banks[i]; in adf_request_irqs()
342 tasklet_init(&priv_data->banks[i].resp_handler,
344 (unsigned long)&priv_data->banks[i]); in adf_isr_resource_alloc()
355 tasklet_disable(&priv_data->banks[i].resp_handler); in adf_isr_resource_alloc()
356 tasklet_kill(&priv_data->banks[i].resp_handler); in adf_isr_resource_alloc()
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| H A D | adf_gen2_config.c | 16 int banks = GET_MAX_BANKS(accel_dev); in adf_gen2_crypto_dev_config() local
24 instances = min(cpus, banks); in adf_gen2_crypto_dev_config()
115 int banks = GET_MAX_BANKS(accel_dev); in adf_gen2_comp_dev_config() local
123 instances = min(cpus, banks); in adf_gen2_comp_dev_config()
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| H A D | adf_transport.c | 261 bank = &transport_data->banks[bank_num]; in adf_create_ring()
489 etr_data->banks = kzalloc_node(size, GFP_KERNEL, in adf_init_etr_data()
491 if (!etr_data->banks) { in adf_init_etr_data()
504 ret = adf_init_bank(accel_dev, &etr_data->banks[i], i, in adf_init_etr_data()
514 kfree(etr_data->banks); in adf_init_etr_data()
549 cleanup_bank(&etr_data->banks[i]); in adf_cleanup_etr_handles()
569 kfree(etr_data->banks->rings); in adf_cleanup_etr_data()
570 kfree(etr_data->banks); in adf_cleanup_etr_data()
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| /linux/arch/mips/bcm63xx/ |
| H A D | cpu.c | 258 unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0; in detect_memory_size() local
274 banks = (val & SDRAM_CFG_BANK_MASK) ? 2 : 1; in detect_memory_size()
282 banks = 2; in detect_memory_size()
291 return 1 << (cols + rows + (is_32bits + 1) + banks); in detect_memory_size()
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| /linux/drivers/pinctrl/meson/ |
| H A D | pinctrl-amlogic-a4.c | 105 struct aml_gpio_bank *banks;
238 if (info->banks[i].bank_id == p_mux->m_bank_id) { in aml_pmx_get_groups()
239 bank = &info->banks[i]; in aml_pmx_get_groups()
1050 struct aml_gpio_bank *bank = &info->banks[bank_nr]; in aml_pctl_probe_dt()
1119 info->banks = devm_kcalloc(dev, info->nbanks, sizeof(*info->banks), GFP_KERNEL);
1121 if (!info->functions || !info->groups || !info->banks) in aml_pctl_probe()
1144 k = info->banks[bank].pin_base; in aml_pctl_probe()
1145 bank_name = info->banks[bank].gpio_chip.label; in aml_pctl_probe()
1148 info->banks[ban in aml_pctl_probe()
101 struct aml_gpio_bank *banks; global() member
[all...] |
| /linux/drivers/net/ethernet/intel/ixgbe/ |
| H A D | ixgbe_e610.c | 2499 * Update the control word with the required banks' validity bits in ixgbe_nvm_validate_checksum()
2502 * cmd_flags controls which banks to activate, the preservation level to use in ixgbe_nvm_validate_checksum()
2692 * Read the Shadow RAM control word and determine which banks are active for in ixgbe_determine_active_flash_banks()
2702 struct ixgbe_bank_info *banks = &hw->flash.banks;
2716 banks->nvm_bank = IXGBE_1ST_FLASH_BANK; in ixgbe_get_flash_bank_offset()
2718 banks->nvm_bank = IXGBE_2ND_FLASH_BANK; in ixgbe_get_flash_bank_offset()
2721 banks->orom_bank = IXGBE_1ST_FLASH_BANK; in ixgbe_get_flash_bank_offset()
2723 banks->orom_bank = IXGBE_2ND_FLASH_BANK; in ixgbe_get_flash_bank_offset()
2726 banks in ixgbe_get_flash_bank_offset()
2644 struct ixgbe_bank_info *banks = &hw->flash.banks; ixgbe_determine_active_flash_banks() local
2719 struct ixgbe_bank_info *banks = &hw->flash.banks; ixgbe_get_flash_bank_offset() local
[all...] |
| /linux/drivers/pinctrl/vt8500/ |
| H A D | pinctrl-wmt.c | 89 u32 reg_en = data->banks[bank].reg_en; in wmt_set_pinmux()
90 u32 reg_dir = data->banks[bank].reg_dir; in wmt_set_pinmux()
425 u32 reg_pull_en = data->banks[bank].reg_pull_en; in wmt_pinconf_set()
426 u32 reg_pull_cfg = data->banks[bank].reg_pull_cfg; in wmt_pinconf_set()
484 u32 reg_dir = data->banks[bank].reg_dir; in wmt_gpio_get_direction()
499 u32 reg_data_in = data->banks[bank].reg_data_in; in wmt_gpio_get_value()
515 u32 reg_data_out = data->banks[bank].reg_data_out; in wmt_gpio_set_value()
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| /linux/drivers/gpio/ |
| H A D | gpio-pxa.c | 29 * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
81 struct pxa_gpio_bank *banks; member
150 for (i = 0, b = pc->banks; i <= pxa_last_gpio; i += 32, b++)
162 struct pxa_gpio_bank *bank = p->banks + (gpio / 32); in gpio_bank_base()
170 return chip_to_pxachip(c)->banks + gpio / 32; in gpio_to_pxabank()
348 pchip->banks = devm_kcalloc(pchip->dev, nbanks, sizeof(*pchip->banks), in pxa_init_gpio_chip()
350 if (!pchip->banks) in pxa_init_gpio_chip()
370 bank = pchip->banks + i; in pxa_init_gpio_chip()
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| H A D | gpio-usbio.c | 22 struct mutex config_mutex; /* Protects banks[x].config */
23 struct usbio_gpio_bank banks[USBIO_MAX_GPIOBANKS]; member
47 bank = &gpio->banks[offset / USBIO_GPIOSPERBANK]; in usbio_gpio_get_bank_and_pin()
206 gpio->banks[bank].bitmap = le32_to_cpu(bank_desc[bank].bmap); in usbio_gpio_probe()
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | cavium-mix.txt | 9 - reg: The base addresses of four separate register banks. The first
16 register banks corresponds to this MIX device.
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| /linux/Documentation/arch/x86/x86_64/ |
| H A D | machinecheck.rst | 11 Machine checks are organized in banks (normally associated with
13 of the banks and subevent is CPU specific.
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| /linux/drivers/phy/mediatek/ |
| H A D | Kconfig | 37 different banks layout, the T-PHY with shared banks between
39 so you can easily distinguish them by banks layout.
|