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Searched refs:asid (Results 1 – 25 of 117) sorted by relevance

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/linux/arch/arm64/mm/
H A Dcontext.c38 #define ctxid2asid(asid) ((asid) & ~ASID_MASK) argument
39 #define asid2ctxid(asid, genid) ((asid) | (genid)) argument
44 u32 asid; in get_cpu_asid_bits() local
54 asid = 8; in get_cpu_asid_bits()
57 asid = 16; in get_cpu_asid_bits()
60 return asid; in get_cpu_asid_bits()
66 u32 asid = get_cpu_asid_bits(); in verify_cpu_asid_bits() local
68 if (asid < asid_bits) { in verify_cpu_asid_bits()
74 smp_processor_id(), asid, asid_bits); in verify_cpu_asid_bits()
101 #define asid_gen_match(asid) \ argument
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/linux/arch/arm/mm/
H A Dcontext.c56 u64 context_id, asid; in a15_erratum_get_cpumask() local
67 asid = per_cpu(active_asids, cpu).counter; in a15_erratum_get_cpumask()
68 if (asid == 0) in a15_erratum_get_cpumask()
69 asid = per_cpu(reserved_asids, cpu); in a15_erratum_get_cpumask()
70 if (context_id == asid) in a15_erratum_get_cpumask()
139 u64 asid; in flush_context() local
144 asid = atomic64_xchg(&per_cpu(active_asids, i), 0); in flush_context()
152 if (asid == 0) in flush_context()
153 asid = per_cpu(reserved_asids, i); in flush_context()
154 __set_bit(asid & ~ASID_MASK, asid_map); in flush_context()
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/linux/arch/csky/mm/
H A Dasid.c21 #define asid2idx(info, asid) (((asid) & ~ASID_MASK(info)) >> (info)->ctxt_shift) argument
27 u64 asid; in flush_context() local
33 asid = atomic64_xchg_relaxed(&active_asid(info, i), 0); in flush_context()
41 if (asid == 0) in flush_context()
42 asid = reserved_asid(info, i); in flush_context()
43 __set_bit(asid2idx(info, asid), info->map); in flush_context()
44 reserved_asid(info, i) = asid; in flush_context()
54 static bool check_update_reserved_asid(struct asid_info *info, u64 asid, in check_update_reserved_asid() argument
70 if (reserved_asid(info, cpu) == asid) { in check_update_reserved_asid()
83 u64 asid = atomic64_read(pasid); in new_context() local
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/linux/arch/riscv/mm/
H A Dtlbflush.c24 static inline void local_sinval_vma(unsigned long vma, unsigned long asid) in local_sinval_vma() argument
26 if (asid != FLUSH_TLB_NO_ASID) in local_sinval_vma()
27 asm volatile(SINVAL_VMA(%0, %1) : : "r" (vma), "r" (asid) : "memory"); in local_sinval_vma()
41 unsigned long asid) in local_flush_tlb_range_threshold_asid() argument
47 local_flush_tlb_all_asid(asid); in local_flush_tlb_range_threshold_asid()
54 local_sinval_vma(start, asid); in local_flush_tlb_range_threshold_asid()
62 local_flush_tlb_page_asid(start, asid); in local_flush_tlb_range_threshold_asid()
68 unsigned long size, unsigned long stride, unsigned long asid) in local_flush_tlb_range_asid() argument
71 local_flush_tlb_page_asid(start, asid); in local_flush_tlb_range_asid()
73 local_flush_tlb_all_asid(asid); in local_flush_tlb_range_asid()
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H A Dcontext.c98 unsigned long asid, ver = atomic_long_read(&current_version); in __new_context() local
125 asid = find_next_zero_bit(context_asid_map, num_asids, cur_idx); in __new_context()
126 if (asid != num_asids) in __new_context()
136 asid = find_next_zero_bit(context_asid_map, num_asids, 1); in __new_context()
139 __set_bit(asid, context_asid_map); in __new_context()
140 cur_idx = asid; in __new_context()
141 return asid | ver; in __new_context()
/linux/arch/xtensa/include/asm/
H A Dmmu_context.h72 unsigned long asid = cpu_asid_cache(cpu); in get_new_mmu_context() local
73 if ((++asid & ASID_MASK) == 0) { in get_new_mmu_context()
79 asid += ASID_USER_FIRST; in get_new_mmu_context()
81 cpu_asid_cache(cpu) = asid; in get_new_mmu_context()
82 mm->context.asid[cpu] = asid; in get_new_mmu_context()
93 unsigned long asid = mm->context.asid[cpu]; in get_mmu_context() local
95 if (asid == NO_CONTEXT || in get_mmu_context()
96 ((asid ^ cpu_asid_cache(cpu)) & ~ASID_MASK)) in get_mmu_context()
104 set_rasid_register(ASID_INSERT(mm->context.asid[cpu])); in activate_context()
120 mm->context.asid[cpu] = NO_CONTEXT; in init_new_context()
/linux/arch/sh/mm/
H A Dtlbflush_32.c21 unsigned long asid; in local_flush_tlb_page() local
24 asid = cpu_asid(cpu, vma->vm_mm); in local_flush_tlb_page()
30 set_asid(asid); in local_flush_tlb_page()
32 local_flush_tlb_one(asid, page); in local_flush_tlb_page()
56 unsigned long asid; in local_flush_tlb_range() local
59 asid = cpu_asid(cpu, mm); in local_flush_tlb_range()
65 set_asid(asid); in local_flush_tlb_range()
68 local_flush_tlb_one(asid, start); in local_flush_tlb_range()
89 unsigned long asid; in local_flush_tlb_kernel_range() local
92 asid = cpu_asid(cpu, &init_mm); in local_flush_tlb_kernel_range()
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/linux/arch/sh/include/asm/
H A Dmmu_context_32.h6 static inline void set_asid(unsigned long asid) in set_asid() argument
8 __raw_writel(asid, MMU_PTEAEX); in set_asid()
16 static inline void set_asid(unsigned long asid) in set_asid() argument
25 : "r" (asid), "m" (__m(MMU_PTEH)), in set_asid()
31 unsigned long asid; in get_asid() local
34 : "=r" (asid) in get_asid()
36 asid &= MMU_CONTEXT_ASID_MASK; in get_asid()
37 return asid; in get_asid()
H A Dmmu_context.h57 unsigned long asid = asid_cache(cpu); in get_mmu_context() local
60 if (((cpu_context(cpu, mm) ^ asid) & MMU_CONTEXT_VERSION_MASK) == 0) in get_mmu_context()
65 if (!(++asid & MMU_CONTEXT_ASID_MASK)) { in get_mmu_context()
76 if (!asid) in get_mmu_context()
77 asid = MMU_CONTEXT_FIRST_VERSION; in get_mmu_context()
80 cpu_context(cpu, mm) = asid_cache(cpu) = asid; in get_mmu_context()
128 #define set_asid(asid) do { } while (0) argument
131 #define switch_and_save_asid(asid) (0) argument
/linux/arch/arm64/include/asm/
H A Dtlbflush.h50 #define __TLBI_VADDR(addr, asid) \ argument
54 __ta |= (unsigned long)(asid) << 48; \
144 #define __TLBI_VADDR_RANGE(baddr, asid, scale, num, ttl) \ argument
153 __ta |= FIELD_PREP(TLBIR_ASID_MASK, asid); \
308 unsigned long asid; in flush_tlb_mm() local
311 asid = __TLBI_VADDR(0, ASID(mm)); in flush_tlb_mm()
312 __tlbi(aside1is, asid); in flush_tlb_mm()
313 __tlbi_user(aside1is, asid); in flush_tlb_mm()
431 asid, tlb_level, tlbi_user, lpa2) \ argument
444 addr = __TLBI_VADDR(__flush_start, asid); \
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/linux/arch/loongarch/include/asm/
H A Dmmu_context.h34 #define cpu_context(cpu, mm) ((mm)->context.asid[cpu])
54 u64 asid = asid_cache(cpu); in get_new_mmu_context() local
56 if (!((++asid) & cpu_asid_mask(&cpu_data[cpu]))) in get_new_mmu_context()
59 cpu_context(cpu, mm) = asid_cache(cpu) = asid; in get_new_mmu_context()
77 static inline void atomic_update_pgd_asid(unsigned long asid, unsigned long pgdl) in atomic_update_pgd_asid() argument
82 : [asid_val] "+r" (asid), [pgdl_val] "+r" (pgdl) in atomic_update_pgd_asid()
143 int asid; in drop_mmu_context() local
148 asid = read_csr_asid() & cpu_asid_mask(&current_cpu_data); in drop_mmu_context()
150 if (asid == cpu_asid(cpu, mm)) { in drop_mmu_context()
/linux/drivers/iommu/arm/arm-smmu-v3/
H A Darm-smmu-v3-sva.c53 u16 asid) in arm_smmu_make_sva_cd() argument
75 FIELD_PREP(CTXDESC_CD_0_ASID, asid)); in arm_smmu_make_sva_cd()
158 arm_smmu_tlb_inv_asid(smmu_domain->smmu, smmu_domain->cd.asid); in arm_smmu_mm_arch_invalidate_secondary_tlbs()
160 arm_smmu_tlb_inv_range_asid(start, size, smmu_domain->cd.asid, in arm_smmu_mm_arch_invalidate_secondary_tlbs()
188 smmu_domain->cd.asid); in arm_smmu_mm_release()
194 arm_smmu_tlb_inv_asid(smmu_domain->smmu, smmu_domain->cd.asid); in arm_smmu_mm_release()
290 arm_smmu_make_sva_cd(&target, master, domain->mm, smmu_domain->cd.asid); in arm_smmu_sva_set_dev_pasid()
304 arm_smmu_tlb_inv_asid(smmu_domain->smmu, smmu_domain->cd.asid); in arm_smmu_sva_domain_free()
312 xa_erase(&arm_smmu_asid_xa, smmu_domain->cd.asid); in arm_smmu_sva_domain_free()
332 u32 asid; in arm_smmu_sva_domain_alloc() local
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/linux/arch/riscv/kvm/
H A Dtlb.c81 unsigned long asid, in kvm_riscv_local_hfence_vvma_asid_gva() argument
89 kvm_riscv_local_hfence_vvma_asid_all(vmid, asid); in kvm_riscv_local_hfence_vvma_asid_gva()
99 : : "r" (pos), "r" (asid) : "memory"); in kvm_riscv_local_hfence_vvma_asid_gva()
104 : : "r" (pos), "r" (asid) : "memory"); in kvm_riscv_local_hfence_vvma_asid_gva()
111 unsigned long asid) in kvm_riscv_local_hfence_vvma_asid_all() argument
117 asm volatile(HFENCE_VVMA(zero, %0) : : "r" (asid) : "memory"); in kvm_riscv_local_hfence_vvma_asid_all()
293 nacl_hfence_vvma_asid(nacl_shmem(), d.vmid, d.asid, in kvm_riscv_hfence_process()
296 kvm_riscv_local_hfence_vvma_asid_gva(d.vmid, d.asid, d.addr, in kvm_riscv_hfence_process()
302 nacl_hfence_vvma_asid_all(nacl_shmem(), d.vmid, d.asid); in kvm_riscv_hfence_process()
304 kvm_riscv_local_hfence_vvma_asid_all(d.vmid, d.asid); in kvm_riscv_hfence_process()
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/linux/drivers/misc/sgi-gru/
H A Dgrumain.c89 static int gru_reset_asid_limit(struct gru_state *gru, int asid) in gru_reset_asid_limit() argument
93 gru_dbg(grudev, "gid %d, asid 0x%x\n", gru->gs_gid, asid); in gru_reset_asid_limit()
96 if (asid >= limit) in gru_reset_asid_limit()
97 asid = gru_wrap_asid(gru); in gru_reset_asid_limit()
108 if (inuse_asid == asid) { in gru_reset_asid_limit()
109 asid += ASID_INC; in gru_reset_asid_limit()
110 if (asid >= limit) { in gru_reset_asid_limit()
116 if (asid >= MAX_ASID) in gru_reset_asid_limit()
117 asid = gru_wrap_asid(gru); in gru_reset_asid_limit()
122 if ((inuse_asid > asid) && (inuse_asid < limit)) in gru_reset_asid_limit()
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H A Dgrutlbpurge.c150 int grupagesize, pagesize, pageshift, gid, asid; in gru_flush_tlb_range() local
167 asid = asids->mt_asid; in gru_flush_tlb_range()
168 if (asids->mt_ctxbitmap && asid) { in gru_flush_tlb_range()
170 asid = GRUASID(asid, start); in gru_flush_tlb_range()
173 gid, asid, start, grupagesize, num, asids->mt_ctxbitmap); in gru_flush_tlb_range()
175 tgh_invalidate(tgh, start, ~0, asid, grupagesize, 0, in gru_flush_tlb_range()
184 gid, asid, asids->mt_ctxbitmap, in gru_flush_tlb_range()
H A Dgruhandles.c135 int asid, int pagesize, int global, int n, in tgh_invalidate() argument
139 tgh->asid = asid; in tgh_invalidate()
152 unsigned long vaddr, int asid, int dirty, in tfh_write_only() argument
155 tfh->fillasid = asid; in tfh_write_only()
168 unsigned long vaddr, int asid, int dirty, in tfh_write_restart() argument
171 tfh->fillasid = asid; in tfh_write_restart()
/linux/arch/riscv/include/asm/
H A Dtlbflush.h23 static inline void local_flush_tlb_all_asid(unsigned long asid) in local_flush_tlb_all_asid() argument
25 if (asid != FLUSH_TLB_NO_ASID) in local_flush_tlb_all_asid()
26 ALT_SFENCE_VMA_ASID(asid); in local_flush_tlb_all_asid()
38 unsigned long asid) in local_flush_tlb_page_asid() argument
40 if (asid != FLUSH_TLB_NO_ASID) in local_flush_tlb_page_asid()
41 ALT_SFENCE_VMA_ADDR_ASID(addr, asid); in local_flush_tlb_page_asid()
H A Dkvm_tlb.h23 unsigned long asid; member
42 unsigned long asid,
47 unsigned long asid);
72 unsigned long order, unsigned long asid,
76 unsigned long asid, unsigned long vmid);
/linux/drivers/vhost/
H A Dvdpa.c71 u64 last, u32 asid);
80 static struct vhost_vdpa_as *asid_to_as(struct vhost_vdpa *v, u32 asid) in asid_to_as() argument
82 struct hlist_head *head = &v->as[asid % VHOST_VDPA_IOTLB_BUCKETS]; in asid_to_as()
86 if (as->id == asid) in asid_to_as()
92 static struct vhost_iotlb *asid_to_iotlb(struct vhost_vdpa *v, u32 asid) in asid_to_iotlb() argument
94 struct vhost_vdpa_as *as = asid_to_as(v, asid); in asid_to_iotlb()
102 static struct vhost_vdpa_as *vhost_vdpa_alloc_as(struct vhost_vdpa *v, u32 asid) in vhost_vdpa_alloc_as() argument
104 struct hlist_head *head = &v->as[asid % VHOST_VDPA_IOTLB_BUCKETS]; in vhost_vdpa_alloc_as()
107 if (asid_to_as(v, asid)) in vhost_vdpa_alloc_as()
110 if (asid >= v->vdpa->nas) in vhost_vdpa_alloc_as()
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/linux/drivers/vdpa/vdpa_user/
H A Dvduse_dev.c335 static int vduse_dev_update_iotlb(struct vduse_dev *dev, u32 asid, in vduse_dev_update_iotlb() argument
350 msg.req.iova_v2.asid = asid; in vduse_dev_update_iotlb()
665 unsigned int asid) in vduse_set_group_asid() argument
676 msg.req.vq_group_asid.asid = asid; in vduse_set_group_asid()
683 dev->groups[group].as = &dev->as[asid]; in vduse_set_group_asid()
853 unsigned int asid, in vduse_vdpa_set_map() argument
859 ret = vduse_domain_set_map(dev->as[asid].domain, iotlb); in vduse_vdpa_set_map()
863 ret = vduse_dev_update_iotlb(dev, asid, 0ULL, ULLONG_MAX); in vduse_vdpa_set_map()
865 vduse_domain_clear_map(dev->as[asid].domain, iotlb); in vduse_vdpa_set_map()
1180 static int vduse_dev_dereg_umem(struct vduse_dev *dev, u32 asid, in vduse_dev_dereg_umem() argument
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/linux/drivers/accel/habanalabs/common/
H A Dasid.c50 void hl_asid_free(struct hl_device *hdev, unsigned long asid) in hl_asid_free() argument
52 if (asid == HL_KERNEL_ASID_ID || asid >= hdev->asic_prop.max_asid) { in hl_asid_free()
53 dev_crit(hdev->dev, "Invalid ASID %lu", asid); in hl_asid_free()
57 clear_bit(asid, hdev->asid_bitmap); in hl_asid_free()
/linux/drivers/vdpa/vdpa_sim/
H A Dvdpa_sim.c601 unsigned int asid) in vdpasim_set_group_asid() argument
607 iommu = &vdpasim->iommu[asid]; in vdpasim_set_group_asid()
621 static int vdpasim_set_map(struct vdpa_device *vdpa, unsigned int asid, in vdpasim_set_map() argument
630 if (asid >= vdpasim->dev_attr.nas) in vdpasim_set_map()
635 iommu = &vdpasim->iommu[asid]; in vdpasim_set_map()
637 vdpasim->iommu_pt[asid] = false; in vdpasim_set_map()
655 static int vdpasim_reset_map(struct vdpa_device *vdpa, unsigned int asid) in vdpasim_reset_map() argument
659 if (asid >= vdpasim->dev_attr.nas) in vdpasim_reset_map()
663 if (vdpasim->iommu_pt[asid]) in vdpasim_reset_map()
665 vhost_iotlb_reset(&vdpasim->iommu[asid]); in vdpasim_reset_map()
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/linux/drivers/accel/habanalabs/gaudi/
H A Dgaudi.c479 static int gaudi_mmu_update_asid_hop0_addr(struct hl_device *hdev, u32 asid,
492 static void gaudi_mmu_prepare(struct hl_device *hdev, u32 asid);
5865 static int gaudi_context_switch(struct hl_device *hdev, u32 asid) in gaudi_context_switch() argument
6062 void gaudi_mmu_prepare_reg(struct hl_device *hdev, u64 reg, u32 asid) in gaudi_mmu_prepare_reg() argument
6066 WREG32_OR(reg, asid); in gaudi_mmu_prepare_reg()
6069 static void gaudi_mmu_prepare(struct hl_device *hdev, u32 asid) in gaudi_mmu_prepare() argument
6076 if (asid & ~DMA0_QM_GLBL_NON_SECURE_PROPS_0_ASID_MASK) { in gaudi_mmu_prepare()
6077 dev_crit(hdev->dev, "asid %u is too big\n", asid); in gaudi_mmu_prepare()
6081 gaudi_mmu_prepare_reg(hdev, mmDMA0_QM_GLBL_NON_SECURE_PROPS_0, asid); in gaudi_mmu_prepare()
6082 gaudi_mmu_prepare_reg(hdev, mmDMA0_QM_GLBL_NON_SECURE_PROPS_1, asid); in gaudi_mmu_prepare()
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/linux/drivers/iommu/arm/arm-smmu/
H A Dqcom_iommu.c62 u8 asid; /* asid and ctx bank # are 1:1 */ member
82 static struct qcom_iommu_ctx * to_ctx(struct qcom_iommu_domain *d, unsigned asid) in to_ctx() argument
87 return qcom_iommu->ctxs[asid]; in to_ctx()
141 iommu_writel(ctx, ARM_SMMU_CB_S1_TLBIASID, ctx->asid); in qcom_iommu_tlb_inv_context()
161 iova |= ctx->asid; in qcom_iommu_tlb_inv_range_nosync()
207 fsr, iova, fsynr, ctx->asid); in qcom_iommu_fault()
256 ret = qcom_scm_restore_sec_cfg(qcom_iommu->sec_id, ctx->asid); in qcom_iommu_init_domain()
280 FIELD_PREP(ARM_SMMU_TTBRn_ASID, ctx->asid)); in qcom_iommu_init_domain()
554 unsigned asid = args->args[0]; in qcom_iommu_of_xlate() local
574 if (WARN_ON(asid > qcom_iommu->max_asid) || in qcom_iommu_of_xlate()
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/linux/arch/mips/lib/
H A Dr3k_dump_tlb.c27 unsigned int asid; in dump_tlb() local
31 asid = read_c0_entryhi() & asid_mask; in dump_tlb()
46 (entryhi & asid_mask) == asid)) { in dump_tlb()
65 write_c0_entryhi(asid); in dump_tlb()

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