Home
last modified time | relevance | path

Searched refs:asMCReg (Results 1 – 25 of 52) sorted by relevance

123

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineCopyPropagation.cpp174 auto Dest = TRI.regunits(CopyOperands->Destination->getReg().asMCReg()); in invalidateRegister()
175 auto Src = TRI.regunits(CopyOperands->Source->getReg().asMCReg()); in invalidateRegister()
207 MCRegister Def = CopyOperands->Destination->getReg().asMCReg(); in clobberRegUnit()
208 MCRegister Src = CopyOperands->Source->getReg().asMCReg(); in clobberRegUnit()
304 MCRegister Src = CopyOperands->Source->getReg().asMCReg(); in trackCopy()
305 MCRegister Def = CopyOperands->Destination->getReg().asMCReg(); in trackCopy()
578 MCRegister PreviousSrc = CopyOperands->Source->getReg().asMCReg(); in isNopCopy()
579 MCRegister PreviousDef = CopyOperands->Destination->getReg().asMCReg(); in isNopCopy()
803 MachineInstr *Copy = Tracker.findAvailCopy(MI, MOUse.getReg().asMCReg(), in forwardUses()
892 MCRegister Def = RegDef.asMCReg(); in ForwardCopyPropagateBlock()
[all …]
H A DBreakFalseDeps.cpp123 MCRegister OriginalReg = MO.getReg().asMCReg(); in pickBestRegisterForUndef()
176 MCRegister Reg = MI->getOperand(OpIdx).getReg().asMCReg(); in shouldBreakDependence()
H A DAggressiveAntiDepBreaker.cpp359 HandleLastUse(Reg.asMCReg(), Count + 1, "", "\tDead Def: ", "\n"); in PrescanInstruction()
400 RegRefs.emplace(Reg.asMCReg(), RR); in PrescanInstruction()
472 HandleLastUse(Reg.asMCReg(), Count, "(last-use)"); in ScanInstruction()
484 RegRefs.emplace(Reg.asMCReg(), RR); in ScanInstruction()
832 MCRegister AntiDepReg = Edge->getReg().asMCReg(); in BreakAntiDependencies()
H A DMachineCSE.cpp297 if (!isCallerPreservedOrConstPhysReg(Reg.asMCReg(), MO, *MI->getMF(), *TRI, in hasLivePhysRegDefUses()
317 if (PhysRefs.count(Reg.asMCReg())) in hasLivePhysRegDefUses()
322 if (!MO.isDead() && !isPhysDefTriviallyDead(Reg.asMCReg(), I, MBB->end())) in hasLivePhysRegDefUses()
389 if (PhysRefs.count(MOReg.asMCReg())) in PhysRegDefsReach()
H A DMachineCycleAnalysis.cpp138 !(TRI->isCallerPreservedPhysReg(Reg.asMCReg(), *I.getMF())) && in isCycleInvariant()
H A DMachineTraceMetrics.cpp754 MCRegister Reg = MO.getReg().asMCReg(); in updatePhysDepsDownwards()
784 TRI->regunits(UseMI->getOperand(DefOp).getReg().asMCReg())) { in updatePhysDepsDownwards()
952 for (MCRegUnit Unit : TRI->regunits(Reg.asMCReg())) { in updatePhysDepsUpwards()
971 MCRegister Reg = MI.getOperand(Op).getReg().asMCReg(); in updatePhysDepsUpwards()
H A DMachineLoopInfo.cpp262 !(TRI->isCallerPreservedPhysReg(Reg.asMCReg(), *I.getMF())) && in isLoopInvariant()
H A DEarlyIfConversion.cpp273 for (MCRegUnit Unit : TRI->regunits(Reg.asMCReg())) in InstrDependenciesAllowIfConv()
403 for (MCRegUnit Unit : TRI->regunits(Reg.asMCReg())) in findInsertionPoint()
407 Reads.push_back(Reg.asMCReg()); in findInsertionPoint()
H A DLivePhysRegs.cpp304 if (Info.getReg() == Reg.asMCReg()) { in recomputeLivenessFlags()
H A DCalcSpillWeights.cpp69 MCRegister CopiedPReg = HSub ? TRI.getSubReg(HReg, HSub) : HReg.asMCReg(); in copyHint()
H A DMIRCanonicalizerPass.cpp190 II->getOperand(i).getReg().asMCReg())) { in rescheduleCanonically()
H A DLiveRangeEdit.cpp342 LIS.removePhysRegDefAt(Reg.asMCReg(), Idx); in eliminateDeadDef()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaFrameLowering.cpp168 IsStoreInst = Info.getDstReg() == DstReg.asMCReg() && in emitPrologue()
169 Info.getReg() == Reg.asMCReg(); in emitPrologue()
172 IsStoreInst = Reg.asMCReg() == Info.getReg() && StoreFI == FI; in emitPrologue()
256 IsRestoreInst = Info.getDstReg() == DstReg.asMCReg() && in emitEpilogue()
257 Info.getReg() == Reg.asMCReg(); in emitEpilogue()
260 IsRestoreInst = Info.getReg() == Reg.asMCReg() && LoadFI == FI; in emitEpilogue()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h100 return MC->contains(Reg.asMCReg()); in contains()
109 return MC->contains(Reg1.asMCReg(), Reg2.asMCReg()); in contains()
466 return MCRegisterInfo::regsOverlap(RegA.asMCReg(), RegB.asMCReg()); in regsOverlap()
H A DRegister.h102 MCRegister asMCReg() const { in asMCReg() function
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVMCInstLower.cpp53 : MO.getReg().asMCReg()); in lower()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLowOverheadLoops.cpp635 MCRegister NumElements = TPNumElements.getReg().asMCReg(); in ValidateTailPredicate()
669 RDA.getUniqueReachingMIDef(ElemDef, Operand.getReg().asMCReg()) == in ValidateTailPredicate()
671 Operand.getReg().asMCReg())) { in ValidateTailPredicate()
755 &MBB->back(), VCTP->getOperand(1).getReg().asMCReg())) { in ValidateTailPredicate()
794 &Preheader->back(), VCTP->getOperand(1).getReg().asMCReg())) { in ValidateTailPredicate()
978 RDA.getGlobalUses(MI, MO.getReg().asMCReg(), Uses); in ValidateLiveOuts()
1112 !RDA.hasSameReachingDef(Prev, MI, MI->getOperand(1).getReg().asMCReg())) { in AddVCTP()
H A DThumb1FrameLowering.cpp204 if (Reg == FramePtr.asMCReg()) in emitPrologue()
400 if (isARMLowRegister(Reg) && !(HasFP && Reg == FramePtr.asMCReg())) { in emitPrologue()
516 if (isARMLowRegister(Reg) && !(HasFP && Reg == FramePtr.asMCReg())) { in emitEpilogue()
1082 if (NeedsFrameRecordPush && (Reg == FPReg.asMCReg() || Reg == ARM::LR)) in spillCalleeSavedRegisters()
1170 if (NeedsFrameRecordPop && (Reg == FPReg.asMCReg() || Reg == ARM::LR)) in restoreCalleeSavedRegisters()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUPreloadKernArgProlog.cpp199 KernArgPreloadSGPR = KernArgPreloadSGPR.asMCReg() + Config.Size; in addBackCompatLoads()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86VZeroUpper.cpp165 if (isYmmOrZmmReg(MO.getReg().asMCReg())) in hasYmmOrZmmReg()
H A DX86CompressEVEX.cpp106 MCRegister Reg = MO.getReg().asMCReg(); in usesExtendedRegister()
H A DX86CallFrameOptimization.cpp456 UsedRegs.insert(Reg.asMCReg()); in collectCallInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCVSXFMAMutate.cpp300 for (MCRegUnit Unit : TRI->regunits(AddendSrcReg.asMCReg())) { in processBlock()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DDebugHandlerBase.cpp42 Location.Register = Instruction.getDebugOperand(0).getReg().asMCReg(); in extractFromMachineInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86CallLowering.cpp221 markPhysRegUsed(PhysReg.asMCReg()); in assignValueToReg()

123