| /linux/Documentation/features/ |
| H A D | arch-support.txt | 2 For generic kernel features that need architecture support, the
8 | ok | # feature supported by the architecture
9 |TODO| # feature not yet supported by the architecture
11 | N/A| # feature doesn't apply to the architecture
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| /linux/drivers/perf/arm_cspmu/ |
| H A D | Kconfig | 10 based on ARM CoreSight PMU architecture. Note that this PMU
11 architecture does not have relationship with the ARM CoreSight
19 (PMU) devices based on ARM CoreSight PMU architecture.
26 (PMU) devices based on ARM CoreSight PMU architecture.
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| /linux/arch/mips/jazz/ |
| H A D | Kconfig | 9 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
20 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
30 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
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| /linux/Documentation/arch/x86/x86_64/ |
| H A D | machinecheck.rst | 29 For more details about the x86 machine check architecture
30 see the Intel and AMD architecture manuals from their developer websites.
32 For more details about the architecture
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| H A D | fred.rst | 10 The FRED architecture defines simple new transitions that change
11 privilege level (ring transitions). The FRED architecture was
23 The new transitions defined by the FRED architecture are FRED event
31 In addition to these transitions, the FRED architecture defines a new
36 Furthermore, the FRED architecture is easy to extend for future CPU
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| /linux/Documentation/core-api/irq/ |
| H A D | irqflags-tracing.rst | 15 CONFIG_PROVE_RWSEM_LOCKING will be offered on an architecture - these
21 state changes. But an architecture can be irq-flags-tracing enabled in a
42 - if the architecture has non-maskable interrupts then those need to be
47 implementation in an architecture: lockdep will detect that and will
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| /linux/drivers/clk/bcm/ |
| H A D | Kconfig | 30 based on the ARM architecture
38 based on the MIPS architecture
47 based on the MIPS architecture.
62 based on the iProc architecture
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| /linux/tools/perf/pmu-events/ |
| H A D | README | 19 - To reduce JSON event duplication per architecture, platform JSONs may
21 events", defined in architecture standard JSONs.
22 Architecture standard JSONs must be located in the architecture root
44 - Set of 'PMU events tables' for all known CPUs in the architecture,
61 - A 'mapping table' that maps each CPU of the architecture, to its
86 3. _All_ known CPU tables for architecture are included in the perf
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| /linux/Documentation/ABI/stable/ |
| H A D | syscalls | 7 Note that this interface is different for every architecture
8 that Linux supports. Please see the architecture-specific
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| /linux/Documentation/usb/ |
| H A D | linux.inf | 19 ; Decoration for x86 architecture
23 ; Decoration for x64 architecture
27 ; Decoration for ia64 architecture
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| /linux/Documentation/arch/arm64/ |
| H A D | legacy_instructions.rst | 7 the architecture. The infrastructure code uses undefined instruction
19 have been obsoleted in the architecture, e.g., SWP
39 architecture. Deprecated instructions should default to emulation
|
| /linux/Documentation/arch/powerpc/ |
| H A D | elf_hwcaps.rst | 131 The processor implements the embedded category ("BookE") architecture.
147 The processor supports the v2.05 userlevel architecture. Processors
160 The processor supports the v2.06 userlevel architecture. Processors
182 The processor supports the v2.07 userlevel architecture. Processors
209 The processor supports the v3.0B / v3.0C userlevel architecture. Processors
228 The processor supports the v3.1 userlevel architecture. Processors
|
| H A D | associativity.rst | 17 Hypervisor indicates the type/form of associativity used via "ibm,architecture-vec-5 property".
18 Bit 0 of byte 5 in the "ibm,architecture-vec-5" property indicates usage of Form 0 or Form 1.
20 bit 2 of byte 5 in the "ibm,architecture-vec-5" property is used.
57 "ibm,architecture-vec-5" property.
|
| /linux/Documentation/arch/arm/samsung/ |
| H A D | gpio.rst | 8 This outlines the Samsung GPIO implementation and the architecture
25 Pin configuration is specific to the Samsung architecture, with each SoC
|
| /linux/Documentation/arch/nios2/ |
| H A D | nios2.rst | 2 Linux on the Nios II architecture
17 Nios II is a 32-bit embedded-processor architecture designed specifically for the
|
| /linux/Documentation/core-api/ |
| H A D | genericirq.rst | 22 interrupt subsystem based for their architecture, with the help of the
67 Analysing a couple of architecture's IRQ subsystem implementations
81 and extensible. For example, an (sub)architecture can use a generic
83 (sub)architecture specific 'edge type' implementation.
118 Whenever an interrupt triggers, the low-level architecture code calls
173 The interrupt flow handlers (either pre-defined or architecture
174 specific) are assigned to specific interrupts by the architecture either
321 which have no platform-specific IRQ handling quirks. If an architecture
385 The locking of chip registers is up to the architecture that defines the
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| /linux/Documentation/timers/ |
| H A D | highres.rst | 48 code out of the architecture-specific areas into a generic management
49 framework, as illustrated in figure #3 (OLS slides p. 18). The architecture
76 for various event driven functionalities is hardwired into the architecture
80 architecture. Another implication of the current design is that it is necessary
81 to touch all the architecture-specific implementations in order to provide new
87 to minimize the clock event related architecture dependent code to the pure
93 Clock event devices are registered either by the architecture dependent boot
116 architecture specific timer interrupt handlers and hands the control over the
131 The conversion of an architecture has no functional impact, but allows to
135 adding the kernel/time/Kconfig file to the architecture specific Kconfig and
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| /linux/Documentation/devicetree/bindings/powerpc/fsl/ |
| H A D | cpus.txt | 17 Freescale Power Architecture) defines the architecture for Freescale
18 Power CPUs. The EREF defines some architecture categories not defined
|
| /linux/Documentation/scheduler/ |
| H A D | membarrier.rst | 14 require each architecture to have a full memory barrier after coming from
24 require each architecture to have a full memory barrier after updating rq->curr,
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-mce | 12 For more details about the x86 machine check architecture
13 see the Intel and AMD architecture manuals from their
16 For more details about the architecture
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| /linux/fs/resctrl/ |
| H A D | Kconfig | 31 micro-architecture specific knowledge.
37 Enabled by the architecture when the RMID values depend on the CLOSID.
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| /linux/Documentation/admin-guide/device-mapper/ |
| H A D | switch.rst | 19 frameless architecture. In this architecture, the storage group
33 This architecture simplifies the management and configuration of both
43 device onto different targets. However in this architecture the LUN is
|
| /linux/lib/ |
| H A D | Kconfig.kgdb | 6 # set if architecture has the its kgdb_arch_handle_qxfer_pkt
152 If an architecture can definitely handle entering the debugger
158 NOTE: Even if this isn't selected by an architecture we will
164 depending on exactly how far along the architecture has initted.
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| /linux/Documentation/kbuild/ |
| H A D | headers_install.rst | 30 ARCH indicates which architecture to produce headers for, and defaults to the
31 current architecture. The linux/asm directory of the exported kernel headers
|
| /linux/Documentation/virt/kvm/arm/ |
| H A D | vcpu-features.rst | 24 The Arm architecture specifies a range of *ID Registers* that describe the set
39 outlined by the architecture in DDI0487J.a D19.1.3 'Principles of the ID
|