1 /*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28 #ifndef __AMDGPU_OBJECT_H__
29 #define __AMDGPU_OBJECT_H__
30
31 #include <drm/amdgpu_drm.h>
32 #include "amdgpu.h"
33 #include "amdgpu_res_cursor.h"
34
35 #ifdef CONFIG_MMU_NOTIFIER
36 #include <linux/mmu_notifier.h>
37 #endif
38
39 #define AMDGPU_BO_INVALID_OFFSET LONG_MAX
40 #define AMDGPU_BO_MAX_PLACEMENTS 3
41
42 /* BO flag to indicate a KFD userptr BO */
43 #define AMDGPU_AMDKFD_CREATE_USERPTR_BO (1ULL << 63)
44
45 #define to_amdgpu_bo_user(abo) container_of((abo), struct amdgpu_bo_user, bo)
46 #define to_amdgpu_bo_vm(abo) container_of((abo), struct amdgpu_bo_vm, bo)
47
48 struct amdgpu_bo_param {
49 unsigned long size;
50 int byte_align;
51 u32 bo_ptr_size;
52 u32 domain;
53 u32 preferred_domain;
54 u64 flags;
55 enum ttm_bo_type type;
56 bool no_wait_gpu;
57 struct dma_resv *resv;
58 void (*destroy)(struct ttm_buffer_object *bo);
59 /* xcp partition number plus 1, 0 means any partition */
60 int8_t xcp_id_plus1;
61 };
62
63 /* bo virtual addresses in a vm */
64 struct amdgpu_bo_va_mapping {
65 struct amdgpu_bo_va *bo_va;
66 struct list_head list;
67 struct rb_node rb;
68 uint64_t start;
69 uint64_t last;
70 uint64_t __subtree_last;
71 uint64_t offset;
72 uint32_t flags;
73 };
74
75 /* User space allocated BO in a VM */
76 struct amdgpu_bo_va {
77 struct amdgpu_vm_bo_base base;
78
79 /* protected by bo being reserved */
80 unsigned ref_count;
81
82 /* all other members protected by the VM PD being reserved */
83 struct dma_fence *last_pt_update;
84
85 /* mappings for this bo_va */
86 struct list_head invalids;
87 struct list_head valids;
88
89 /* If the mappings are cleared or filled */
90 bool cleared;
91
92 bool is_xgmi;
93
94 /*
95 * protected by vm reservation lock
96 * if non-zero, cannot unmap from GPU because user queues may still access it
97 */
98 unsigned int queue_refcount;
99 /* Indicates if this buffer is mapped for any user queue. Once set, never reset. */
100 bool userq_va_mapped;
101 };
102
103 struct amdgpu_bo {
104 /* Protected by tbo.reserved */
105 u32 preferred_domains;
106 u32 allowed_domains;
107 struct ttm_place placements[AMDGPU_BO_MAX_PLACEMENTS];
108 struct ttm_placement placement;
109 struct ttm_buffer_object tbo;
110 struct ttm_bo_kmap_obj kmap;
111 u64 flags;
112 /* per VM structure for page tables and with virtual addresses */
113 struct amdgpu_vm_bo_base *vm_bo;
114 /* Constant after initialization */
115 struct amdgpu_bo *parent;
116
117 #ifdef CONFIG_MMU_NOTIFIER
118 struct mmu_interval_notifier notifier;
119 #endif
120 struct kgd_mem *kfd_bo;
121
122 /*
123 * For GPUs with spatial partitioning, xcp partition number, -1 means
124 * any partition. For other ASICs without spatial partition, always 0
125 * for memory accounting.
126 */
127 int8_t xcp_id;
128 };
129
130 struct amdgpu_bo_user {
131 struct amdgpu_bo bo;
132 u64 tiling_flags;
133 u64 metadata_flags;
134 void *metadata;
135 u32 metadata_size;
136
137 };
138
139 struct amdgpu_bo_vm {
140 struct amdgpu_bo bo;
141 struct amdgpu_vm_bo_base entries[];
142 };
143
ttm_to_amdgpu_bo(struct ttm_buffer_object * tbo)144 static inline struct amdgpu_bo *ttm_to_amdgpu_bo(struct ttm_buffer_object *tbo)
145 {
146 return container_of(tbo, struct amdgpu_bo, tbo);
147 }
148
149 /**
150 * amdgpu_mem_type_to_domain - return domain corresponding to mem_type
151 * @mem_type: ttm memory type
152 *
153 * Returns corresponding domain of the ttm mem_type
154 */
amdgpu_mem_type_to_domain(u32 mem_type)155 static inline unsigned amdgpu_mem_type_to_domain(u32 mem_type)
156 {
157 switch (mem_type) {
158 case TTM_PL_VRAM:
159 return AMDGPU_GEM_DOMAIN_VRAM;
160 case TTM_PL_TT:
161 return AMDGPU_GEM_DOMAIN_GTT;
162 case TTM_PL_SYSTEM:
163 return AMDGPU_GEM_DOMAIN_CPU;
164 case AMDGPU_PL_GDS:
165 return AMDGPU_GEM_DOMAIN_GDS;
166 case AMDGPU_PL_GWS:
167 return AMDGPU_GEM_DOMAIN_GWS;
168 case AMDGPU_PL_OA:
169 return AMDGPU_GEM_DOMAIN_OA;
170 case AMDGPU_PL_DOORBELL:
171 return AMDGPU_GEM_DOMAIN_DOORBELL;
172 default:
173 break;
174 }
175 return 0;
176 }
177
178 /**
179 * amdgpu_bo_reserve - reserve bo
180 * @bo: bo structure
181 * @no_intr: don't return -ERESTARTSYS on pending signal
182 *
183 * Returns:
184 * -ERESTARTSYS: A wait for the buffer to become unreserved was interrupted by
185 * a signal. Release all buffer reservations and return to user-space.
186 */
amdgpu_bo_reserve(struct amdgpu_bo * bo,bool no_intr)187 static inline int amdgpu_bo_reserve(struct amdgpu_bo *bo, bool no_intr)
188 {
189 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
190 int r;
191
192 r = ttm_bo_reserve(&bo->tbo, !no_intr, false, NULL);
193 if (unlikely(r != 0)) {
194 if (r != -ERESTARTSYS)
195 dev_err(adev->dev, "%p reserve failed\n", bo);
196 return r;
197 }
198 return 0;
199 }
200
amdgpu_bo_unreserve(struct amdgpu_bo * bo)201 static inline void amdgpu_bo_unreserve(struct amdgpu_bo *bo)
202 {
203 ttm_bo_unreserve(&bo->tbo);
204 }
205
amdgpu_bo_size(struct amdgpu_bo * bo)206 static inline unsigned long amdgpu_bo_size(struct amdgpu_bo *bo)
207 {
208 return bo->tbo.base.size;
209 }
210
amdgpu_bo_ngpu_pages(struct amdgpu_bo * bo)211 static inline unsigned amdgpu_bo_ngpu_pages(struct amdgpu_bo *bo)
212 {
213 return bo->tbo.base.size / AMDGPU_GPU_PAGE_SIZE;
214 }
215
amdgpu_bo_gpu_page_alignment(struct amdgpu_bo * bo)216 static inline unsigned amdgpu_bo_gpu_page_alignment(struct amdgpu_bo *bo)
217 {
218 return (bo->tbo.page_alignment << PAGE_SHIFT) / AMDGPU_GPU_PAGE_SIZE;
219 }
220
221 /**
222 * amdgpu_bo_mmap_offset - return mmap offset of bo
223 * @bo: amdgpu object for which we query the offset
224 *
225 * Returns mmap offset of the object.
226 */
amdgpu_bo_mmap_offset(struct amdgpu_bo * bo)227 static inline u64 amdgpu_bo_mmap_offset(struct amdgpu_bo *bo)
228 {
229 return drm_vma_node_offset_addr(&bo->tbo.base.vma_node);
230 }
231
232 /**
233 * amdgpu_bo_explicit_sync - return whether the bo is explicitly synced
234 */
amdgpu_bo_explicit_sync(struct amdgpu_bo * bo)235 static inline bool amdgpu_bo_explicit_sync(struct amdgpu_bo *bo)
236 {
237 return bo->flags & AMDGPU_GEM_CREATE_EXPLICIT_SYNC;
238 }
239
240 /**
241 * amdgpu_bo_encrypted - test if the BO is encrypted
242 * @bo: pointer to a buffer object
243 *
244 * Return true if the buffer object is encrypted, false otherwise.
245 */
amdgpu_bo_encrypted(struct amdgpu_bo * bo)246 static inline bool amdgpu_bo_encrypted(struct amdgpu_bo *bo)
247 {
248 return bo->flags & AMDGPU_GEM_CREATE_ENCRYPTED;
249 }
250
251 bool amdgpu_bo_is_amdgpu_bo(struct ttm_buffer_object *bo);
252 void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain);
253
254 int amdgpu_bo_create(struct amdgpu_device *adev,
255 struct amdgpu_bo_param *bp,
256 struct amdgpu_bo **bo_ptr);
257 int amdgpu_bo_create_reserved(struct amdgpu_device *adev,
258 unsigned long size, int align,
259 u32 domain, struct amdgpu_bo **bo_ptr,
260 u64 *gpu_addr, void **cpu_addr);
261 int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
262 unsigned long size, int align,
263 u32 domain, struct amdgpu_bo **bo_ptr,
264 u64 *gpu_addr, void **cpu_addr);
265 int amdgpu_bo_create_isp_user(struct amdgpu_device *adev,
266 struct dma_buf *dbuf, u32 domain,
267 struct amdgpu_bo **bo,
268 u64 *gpu_addr);
269 int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
270 uint64_t offset, uint64_t size,
271 struct amdgpu_bo **bo_ptr, void **cpu_addr);
272 int amdgpu_bo_create_user(struct amdgpu_device *adev,
273 struct amdgpu_bo_param *bp,
274 struct amdgpu_bo_user **ubo_ptr);
275 int amdgpu_bo_create_vm(struct amdgpu_device *adev,
276 struct amdgpu_bo_param *bp,
277 struct amdgpu_bo_vm **ubo_ptr);
278 void amdgpu_bo_free_kernel(struct amdgpu_bo **bo, u64 *gpu_addr,
279 void **cpu_addr);
280 void amdgpu_bo_free_isp_user(struct amdgpu_bo *bo);
281 int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr);
282 void *amdgpu_bo_kptr(struct amdgpu_bo *bo);
283 void amdgpu_bo_kunmap(struct amdgpu_bo *bo);
284 struct amdgpu_bo *amdgpu_bo_ref(struct amdgpu_bo *bo);
285 void amdgpu_bo_unref(struct amdgpu_bo **bo);
286 int amdgpu_bo_pin(struct amdgpu_bo *bo, u32 domain);
287 void amdgpu_bo_unpin(struct amdgpu_bo *bo);
288 int amdgpu_bo_init(struct amdgpu_device *adev);
289 void amdgpu_bo_fini(struct amdgpu_device *adev);
290 int amdgpu_bo_set_tiling_flags(struct amdgpu_bo *bo, u64 tiling_flags);
291 void amdgpu_bo_get_tiling_flags(struct amdgpu_bo *bo, u64 *tiling_flags);
292 int amdgpu_bo_set_metadata (struct amdgpu_bo *bo, void *metadata,
293 uint32_t metadata_size, uint64_t flags);
294 int amdgpu_bo_get_metadata(struct amdgpu_bo *bo, void *buffer,
295 size_t buffer_size, uint32_t *metadata_size,
296 uint64_t *flags);
297 void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
298 bool evict,
299 struct ttm_resource *new_mem);
300 void amdgpu_bo_release_notify(struct ttm_buffer_object *bo);
301 vm_fault_t amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
302 void amdgpu_bo_fence(struct amdgpu_bo *bo, struct dma_fence *fence,
303 bool shared);
304 int amdgpu_bo_sync_wait_resv(struct amdgpu_device *adev, struct dma_resv *resv,
305 enum amdgpu_sync_mode sync_mode, void *owner,
306 bool intr);
307 int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr);
308 u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo);
309 u64 amdgpu_bo_fb_aper_addr(struct amdgpu_bo *bo);
310 u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo);
311 uint32_t amdgpu_bo_mem_stats_placement(struct amdgpu_bo *bo);
312 uint32_t amdgpu_bo_get_preferred_domain(struct amdgpu_device *adev,
313 uint32_t domain);
314
315 /*
316 * sub allocation
317 */
318 static inline struct amdgpu_sa_manager *
to_amdgpu_sa_manager(struct drm_suballoc_manager * manager)319 to_amdgpu_sa_manager(struct drm_suballoc_manager *manager)
320 {
321 return container_of(manager, struct amdgpu_sa_manager, base);
322 }
323
amdgpu_sa_bo_gpu_addr(struct drm_suballoc * sa_bo)324 static inline uint64_t amdgpu_sa_bo_gpu_addr(struct drm_suballoc *sa_bo)
325 {
326 return to_amdgpu_sa_manager(sa_bo->manager)->gpu_addr +
327 drm_suballoc_soffset(sa_bo);
328 }
329
amdgpu_sa_bo_cpu_addr(struct drm_suballoc * sa_bo)330 static inline void *amdgpu_sa_bo_cpu_addr(struct drm_suballoc *sa_bo)
331 {
332 return to_amdgpu_sa_manager(sa_bo->manager)->cpu_ptr +
333 drm_suballoc_soffset(sa_bo);
334 }
335
336 int amdgpu_sa_bo_manager_init(struct amdgpu_device *adev,
337 struct amdgpu_sa_manager *sa_manager,
338 unsigned size, u32 align, u32 domain);
339 void amdgpu_sa_bo_manager_fini(struct amdgpu_device *adev,
340 struct amdgpu_sa_manager *sa_manager);
341 int amdgpu_sa_bo_manager_start(struct amdgpu_device *adev,
342 struct amdgpu_sa_manager *sa_manager);
343 int amdgpu_sa_bo_new(struct amdgpu_sa_manager *sa_manager,
344 struct drm_suballoc **sa_bo,
345 unsigned int size);
346 void amdgpu_sa_bo_free(struct drm_suballoc **sa_bo,
347 struct dma_fence *fence);
348 #if defined(CONFIG_DEBUG_FS)
349 void amdgpu_sa_bo_dump_debug_info(struct amdgpu_sa_manager *sa_manager,
350 struct seq_file *m);
351 u64 amdgpu_bo_print_info(int id, struct amdgpu_bo *bo, struct seq_file *m);
352 #endif
353 void amdgpu_debugfs_sa_init(struct amdgpu_device *adev);
354
355 bool amdgpu_bo_support_uswc(u64 bo_flags);
356
357
358 #endif
359