Home
last modified time | relevance | path

Searched refs:amdgpu_irq_get (Results 1 – 25 of 30) sorted by relevance

12

/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_nbio.c74 r = amdgpu_irq_get(adev, &adev->nbio.ras_controller_irq, 0); in amdgpu_nbio_ras_late_init()
77 r = amdgpu_irq_get(adev, &adev->nbio.ras_err_event_athub_irq, 0); in amdgpu_nbio_ras_late_init()
H A Dmxgpu_vi.c607 r = amdgpu_irq_get(adev, &adev->virt.rcv_irq, 0); in xgpu_vi_mailbox_get_irq()
610 r = amdgpu_irq_get(adev, &adev->virt.ack_irq, 0); in xgpu_vi_mailbox_get_irq()
H A Damdgpu_irq.c593 int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src, in amdgpu_irq_get() function
H A Damdgpu_sdma.c104 r = amdgpu_irq_get(adev, &adev->sdma.ecc_irq, in amdgpu_sdma_ras_late_init()
H A Damdgpu_jpeg.c302 r = amdgpu_irq_get(adev, &adev->jpeg.inst[i].ras_poison_irq, 0); in amdgpu_jpeg_ras_late_init()
H A Damdgpu_fence.c652 amdgpu_irq_get(adev, ring->fence_drv.irq_src, in amdgpu_fence_driver_hw_init()
H A Dgmc_v12_0.c676 return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); in gmc_v12_0_late_init()
H A Dgmc_v11_0.c664 return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); in gmc_v11_0_late_init()
H A Dgmc_v10_0.c664 return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); in gmc_v10_0_late_init()
H A Dgmc_v6_0.c790 return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); in gmc_v6_0_late_init()
H A Djpeg_v5_0_1.c1078 r = amdgpu_irq_get(adev, &adev->jpeg.inst->ras_poison_irq, 0); in jpeg_v5_0_1_ras_late_init()
H A Dgfx_v12_0.c3708 r = amdgpu_irq_get(adev, &adev->gfx.eop_irq, in gfx_v12_0_set_userq_eop_interrupts()
3726 r = amdgpu_irq_get(adev, &adev->gfx.eop_irq, in gfx_v12_0_set_userq_eop_interrupts()
3884 r = amdgpu_irq_get(adev, &adev->gfx.priv_reg_irq, 0); in gfx_v12_0_late_init()
3888 r = amdgpu_irq_get(adev, &adev->gfx.priv_inst_irq, 0); in gfx_v12_0_late_init()
3892 r = amdgpu_irq_get(adev, &adev->gfx.bad_op_irq, 0); in gfx_v12_0_late_init()
H A Dgmc_v7_0.c961 return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); in gmc_v7_0_late_init()
H A Dgfx_v11_0.c4851 r = amdgpu_irq_get(adev, &adev->gfx.eop_irq, in gfx_v11_0_set_userq_eop_interrupts()
4869 r = amdgpu_irq_get(adev, &adev->gfx.eop_irq, in gfx_v11_0_set_userq_eop_interrupts()
5271 r = amdgpu_irq_get(adev, &adev->gfx.priv_reg_irq, 0); in gfx_v11_0_late_init()
5275 r = amdgpu_irq_get(adev, &adev->gfx.priv_inst_irq, 0); in gfx_v11_0_late_init()
5279 r = amdgpu_irq_get(adev, &adev->gfx.bad_op_irq, 0); in gfx_v11_0_late_init()
H A Dgmc_v8_0.c1069 return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); in gmc_v8_0_late_init()
H A Ddce_v8_0.c162 amdgpu_irq_get(adev, &adev->pageflip_irq, i); in dce_v8_0_pageflip_interrupt_init()
324 amdgpu_irq_get(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd); in dce_v8_0_hpd_init()
H A Dvcn_v5_0_1.c1706 r = amdgpu_irq_get(adev, &adev->vcn.inst->ras_poison_irq, 0); in vcn_v5_0_1_ras_late_init()
H A Dgmc_v9_0.c1662 return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); in gmc_v9_0_late_init()
H A Ddce_v10_0.c211 amdgpu_irq_get(adev, &adev->pageflip_irq, i); in dce_v10_0_pageflip_interrupt_init()
370 amdgpu_irq_get(adev, &adev->hpd_irq, in dce_v10_0_hpd_init()
H A Ddce_v6_0.c175 amdgpu_irq_get(adev, &adev->pageflip_irq, i); in dce_v6_0_pageflip_interrupt_init()
340 amdgpu_irq_get(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd); in dce_v6_0_hpd_init()
H A Dsdma_v6_0.c1449 r = amdgpu_irq_get(adev, &adev->sdma.trap_irq, in sdma_v6_0_set_userq_trap_interrupts()
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_crtc.c346 rc = amdgpu_irq_get(adev, &adev->crtc_irq, irq_type); in amdgpu_dm_crtc_set_vblank()
365 rc = amdgpu_irq_get(adev, &adev->pageflip_irq, irq_type); in amdgpu_dm_crtc_set_vblank()
379 rc = amdgpu_irq_get(adev, &adev->vline0_irq, irq_type); in amdgpu_dm_crtc_set_vblank()
H A Damdgpu_dm_irq.c950 if (amdgpu_irq_get(adev, &adev->hpd_irq, irq_type)) in amdgpu_dm_hpd_init()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0.c1969 ret = amdgpu_irq_get(smu->adev, &smu->irq_source, 0); in smu_v14_0_enable_thermal_alert()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dsmu_v11_0.c1011 ret = amdgpu_irq_get(smu->adev, &smu->irq_source, 0); in smu_v11_0_enable_thermal_alert()

12