| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_device.c | 186 static int amdgpu_device_ip_resume_phase1(struct amdgpu_device *adev);
187 static int amdgpu_device_ip_resume_phase2(struct amdgpu_device *adev);
188 static int amdgpu_device_ip_resume_phase3(struct amdgpu_device *adev);
190 static void amdgpu_device_load_switch_state(struct amdgpu_device *adev);
192 static inline bool amdgpu_ip_member_of_hwini(struct amdgpu_device *adev, in amdgpu_ip_member_of_hwini() argument
195 return (adev->init_lvl->hwini_ip_block_mask & (1U << block)) != 0; in amdgpu_ip_member_of_hwini()
198 void amdgpu_set_init_level(struct amdgpu_device *adev, in amdgpu_set_init_level() argument
203 adev->init_lvl = &amdgpu_init_minimal_xgmi; in amdgpu_set_init_level()
206 adev->init_lvl = &amdgpu_init_recovery; in amdgpu_set_init_level()
211 adev->init_lvl = &amdgpu_init_default; in amdgpu_set_init_level()
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| H A D | amdgpu_acp.c | 103 struct amdgpu_device *adev = ip_block->adev; in acp_sw_init() local
105 adev->acp.parent = adev->dev; in acp_sw_init()
107 adev->acp.cgs_device = in acp_sw_init()
108 amdgpu_cgs_create_device(adev); in acp_sw_init()
109 if (!adev->acp.cgs_device) in acp_sw_init()
117 struct amdgpu_device *adev = ip_block->adev; in acp_sw_fini() local
119 if (adev in acp_sw_fini()
126 void *adev; global() member
133 struct amdgpu_device *adev; acp_poweroff() local
150 struct amdgpu_device *adev; acp_poweron() local
232 struct amdgpu_device *adev = ip_block->adev; acp_hw_init() local
510 struct amdgpu_device *adev = ip_block->adev; acp_hw_fini() local
573 struct amdgpu_device *adev = ip_block->adev; acp_suspend() local
583 struct amdgpu_device *adev = ip_block->adev; acp_resume() local
605 struct amdgpu_device *adev = ip_block->adev; acp_set_powergating_state() local
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| H A D | gmc_v11_0.c | 53 static int gmc_v11_0_ecc_interrupt_state(struct amdgpu_device *adev, in gmc_v11_0_ecc_interrupt_state() argument
62 gmc_v11_0_vm_fault_interrupt_state(struct amdgpu_device *adev, in gmc_v11_0_vm_fault_interrupt_state() argument
69 amdgpu_gmc_set_vm_fault_masks(adev, AMDGPU_MMHUB0(0), false); in gmc_v11_0_vm_fault_interrupt_state()
76 if (!adev->in_s0ix && (adev->in_runpm || adev->in_suspend || in gmc_v11_0_vm_fault_interrupt_state()
77 amdgpu_in_reset(adev))) in gmc_v11_0_vm_fault_interrupt_state()
78 amdgpu_gmc_set_vm_fault_masks(adev, AMDGPU_GFXHUB(0), false); in gmc_v11_0_vm_fault_interrupt_state()
82 amdgpu_gmc_set_vm_fault_masks(adev, AMDGPU_MMHUB0(0), true); in gmc_v11_0_vm_fault_interrupt_state()
89 if (!adev->in_s0ix) in gmc_v11_0_vm_fault_interrupt_state()
90 amdgpu_gmc_set_vm_fault_masks(adev, AMDGPU_GFXHUB(0), true); in gmc_v11_0_vm_fault_interrupt_state()
99 static int gmc_v11_0_process_interrupt(struct amdgpu_device *adev, in gmc_v11_0_process_interrupt() argument
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| H A D | soc24.c | 74 static int soc24_query_video_codecs(struct amdgpu_device *adev, bool encode, in soc24_query_video_codecs() argument
77 if (adev->vcn.num_vcn_inst == hweight8(adev->vcn.harvest_config)) in soc24_query_video_codecs()
80 switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) { in soc24_query_video_codecs()
92 static u32 soc24_get_config_memsize(struct amdgpu_device *adev) in soc24_get_config_memsize() argument
94 return adev->nbio.funcs->get_memsize(adev); in soc24_get_config_memsize()
97 static u32 soc24_get_xclk(struct amdgpu_device *adev) in soc24_get_xclk() argument
99 return adev->clock.spll.reference_freq; in soc24_get_xclk()
102 void soc24_grbm_select(struct amdgpu_device *adev, in soc24_grbm_select() argument
136 static uint32_t soc24_get_register_value(struct amdgpu_device *adev, in soc24_get_register_value() argument
141 return amdgpu_read_indexed_register(adev, se_num, sh_num, reg_offset); in soc24_get_register_value()
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| H A D | amdgpu_gfx.c | 50 int amdgpu_gfx_mec_queue_to_bit(struct amdgpu_device *adev, int mec, in amdgpu_gfx_mec_queue_to_bit() argument
55 bit += mec * adev->gfx.mec.num_pipe_per_mec in amdgpu_gfx_mec_queue_to_bit()
56 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_mec_queue_to_bit()
57 bit += pipe * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_mec_queue_to_bit()
63 void amdgpu_queue_mask_bit_to_mec_queue(struct amdgpu_device *adev, int bit, in amdgpu_queue_mask_bit_to_mec_queue() argument
66 *queue = bit % adev->gfx.mec.num_queue_per_pipe; in amdgpu_queue_mask_bit_to_mec_queue()
67 *pipe = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_queue_mask_bit_to_mec_queue()
68 % adev->gfx.mec.num_pipe_per_mec; in amdgpu_queue_mask_bit_to_mec_queue()
69 *mec = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_queue_mask_bit_to_mec_queue()
70 / adev->gfx.mec.num_pipe_per_mec; in amdgpu_queue_mask_bit_to_mec_queue()
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| H A D | amdgpu_mes.c | 35 int amdgpu_mes_doorbell_process_slice(struct amdgpu_device *adev) in amdgpu_mes_doorbell_process_slice() argument
42 static int amdgpu_mes_doorbell_init(struct amdgpu_device *adev) in amdgpu_mes_doorbell_init() argument
45 struct amdgpu_mes *mes = &adev->mes; in amdgpu_mes_doorbell_init()
50 dev_err(adev->dev, "Failed to allocate MES doorbell bitmap\n"); in amdgpu_mes_doorbell_init()
56 adev->mes.aggregated_doorbells[i] = mes->db_start_dw_offset + i * 2; in amdgpu_mes_doorbell_init()
63 static int amdgpu_mes_event_log_init(struct amdgpu_device *adev) in amdgpu_mes_event_log_init() argument
70 r = amdgpu_bo_create_kernel(adev, adev->mes.event_log_size, PAGE_SIZE, in amdgpu_mes_event_log_init()
72 &adev->mes.event_log_gpu_obj, in amdgpu_mes_event_log_init()
73 &adev->mes.event_log_gpu_addr, in amdgpu_mes_event_log_init()
74 &adev->mes.event_log_cpu_addr); in amdgpu_mes_event_log_init()
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| H A D | amdgpu_virt.c | 61 bool amdgpu_virt_mmio_blocked(struct amdgpu_device *adev) in amdgpu_virt_mmio_blocked() argument
69 void amdgpu_virt_init_setting(struct amdgpu_device *adev) in amdgpu_virt_init_setting() argument
71 struct drm_device *ddev = adev_to_drm(adev); in amdgpu_virt_init_setting()
74 if (adev->asic_type != CHIP_ALDEBARAN && in amdgpu_virt_init_setting()
75 adev->asic_type != CHIP_ARCTURUS && in amdgpu_virt_init_setting()
76 ((adev->pdev->class >> 8) != PCI_CLASS_ACCELERATOR_PROCESSING)) { in amdgpu_virt_init_setting()
77 if (adev->mode_info.num_crtc == 0) in amdgpu_virt_init_setting()
78 adev->mode_info.num_crtc = 1; in amdgpu_virt_init_setting()
79 adev->enable_virtual_display = true; in amdgpu_virt_init_setting()
82 adev->cg_flags = 0; in amdgpu_virt_init_setting()
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| H A D | soc21.c | 170 static int soc21_query_video_codecs(struct amdgpu_device *adev, bool encode, in soc21_query_video_codecs() argument
173 if (adev->vcn.num_vcn_inst == hweight8(adev->vcn.harvest_config)) in soc21_query_video_codecs()
176 switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) { in soc21_query_video_codecs()
181 if (amdgpu_sriov_vf(adev)) { in soc21_query_video_codecs()
182 if ((adev->vcn.harvest_config & AMDGPU_VCN_HARVEST_VCN0) || in soc21_query_video_codecs()
183 !amdgpu_sriov_is_av1_support(adev)) { in soc21_query_video_codecs()
195 if ((adev->vcn.harvest_config & AMDGPU_VCN_HARVEST_VCN0)) { in soc21_query_video_codecs()
225 static u32 soc21_didt_rreg(struct amdgpu_device *adev, u32 reg) in soc21_didt_rreg() argument
233 spin_lock_irqsave(&adev->reg.didt.lock, flags); in soc21_didt_rreg()
236 spin_unlock_irqrestore(&adev->reg.didt.lock, flags); in soc21_didt_rreg()
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| H A D | amdgpu_discovery.c | 156 struct amdgpu_device *adev; member
288 static int amdgpu_discovery_get_tmr_info(struct amdgpu_device *adev, in amdgpu_discovery_get_tmr_info() argument
295 if (!amdgpu_sriov_vf(adev)) { in amdgpu_discovery_get_tmr_info()
321 adev->discovery.size = DISCOVERY_TMR_SIZE; in amdgpu_discovery_get_tmr_info()
323 adev->discovery.offset = (vram_size << 20) - DISCOVERY_TMR_OFFSET; in amdgpu_discovery_get_tmr_info()
325 if (amdgpu_sriov_vf(adev)) { in amdgpu_discovery_get_tmr_info()
326 if (adev->virt.is_dynamic_crit_regn_enabled) { in amdgpu_discovery_get_tmr_info()
327 adev->discovery.offset = in amdgpu_discovery_get_tmr_info()
328 adev->virt.crit_regn_tbl[AMD_SRIOV_MSG_IPD_TABLE_ID].offset; in amdgpu_discovery_get_tmr_info()
329 adev in amdgpu_discovery_get_tmr_info()
378 amdgpu_discovery_read_binary_from_sysmem(struct amdgpu_device * adev,uint8_t * binary) amdgpu_discovery_read_binary_from_sysmem() argument
396 amdgpu_discovery_read_binary_from_mem(struct amdgpu_device * adev,uint8_t * binary,bool is_tmr_in_sysmem) amdgpu_discovery_read_binary_from_mem() argument
419 amdgpu_discovery_read_binary_from_file(struct amdgpu_device * adev,uint8_t * binary,const char * fw_name) amdgpu_discovery_read_binary_from_file() argument
472 amdgpu_discovery_verify_checksum(struct amdgpu_device * adev,uint8_t * data,uint32_t size,uint16_t expected) amdgpu_discovery_verify_checksum() argument
497 amdgpu_discovery_harvest_config_quirk(struct amdgpu_device * adev) amdgpu_discovery_harvest_config_quirk() argument
522 amdgpu_discovery_verify_npsinfo(struct amdgpu_device * adev,struct table_info * info) amdgpu_discovery_verify_npsinfo() argument
550 amdgpu_discovery_get_fw_name(struct amdgpu_device * adev) amdgpu_discovery_get_fw_name() argument
600 amdgpu_discovery_get_table_info(struct amdgpu_device * adev,struct table_info ** info,uint16_t table_id) amdgpu_discovery_get_table_info() argument
618 amdgpu_discovery_table_check(struct amdgpu_device * adev,uint8_t * discovery_bin,uint16_t table_id) amdgpu_discovery_table_check() argument
703 amdgpu_discovery_init(struct amdgpu_device * adev) amdgpu_discovery_init() argument
775 amdgpu_discovery_fini(struct amdgpu_device * adev) amdgpu_discovery_fini() argument
784 amdgpu_discovery_validate_ip(struct amdgpu_device * adev,uint8_t instance,uint16_t hw_id) amdgpu_discovery_validate_ip() argument
805 amdgpu_discovery_read_harvest_bit_per_ip(struct amdgpu_device * adev,uint32_t * vcn_harvest_count) amdgpu_discovery_read_harvest_bit_per_ip() argument
870 amdgpu_discovery_read_from_harvest_table(struct amdgpu_device * adev,uint32_t * vcn_harvest_count,uint32_t * umc_harvest_count) amdgpu_discovery_read_from_harvest_table() argument
1177 struct amdgpu_device *adev = ip_top->adev; ip_disc_release() local
1189 amdgpu_discovery_get_harvest_info(struct amdgpu_device * adev,uint16_t hw_id,uint8_t inst) amdgpu_discovery_get_harvest_info() argument
1225 amdgpu_discovery_sysfs_ips(struct amdgpu_device * adev,struct ip_discovery_top * ip_top,struct ip_die_entry * ip_die_entry,const size_t _ip_offset,const int num_ips,bool reg_base_64) amdgpu_discovery_sysfs_ips() argument
1341 amdgpu_discovery_sysfs_recurse(struct amdgpu_device * adev,struct ip_discovery_top * ip_top) amdgpu_discovery_sysfs_recurse() argument
1403 amdgpu_discovery_sysfs_init(struct amdgpu_device * adev) amdgpu_discovery_sysfs_init() argument
1507 amdgpu_discovery_sysfs_fini(struct amdgpu_device * adev) amdgpu_discovery_sysfs_fini() argument
1540 amdgpu_discovery_dump(struct amdgpu_device * adev,struct drm_printer * p) amdgpu_discovery_dump() argument
1584 amdgpu_discovery_sysfs_early_init(struct amdgpu_device * adev,struct pci_dev * pdev) amdgpu_discovery_sysfs_early_init() argument
1731 amdgpu_discovery_reg_base_init(struct amdgpu_device * adev) amdgpu_discovery_reg_base_init() argument
1936 amdgpu_discovery_harvest_ip(struct amdgpu_device * adev) amdgpu_discovery_harvest_ip() argument
1993 amdgpu_discovery_get_gfx_info(struct amdgpu_device * adev) amdgpu_discovery_get_gfx_info() argument
2103 amdgpu_discovery_get_mall_info(struct amdgpu_device * adev) amdgpu_discovery_get_mall_info() argument
2161 amdgpu_discovery_get_vcn_info(struct amdgpu_device * adev) amdgpu_discovery_get_vcn_info() argument
2217 amdgpu_discovery_refresh_nps_info(struct amdgpu_device * adev,union nps_info * nps_data) amdgpu_discovery_refresh_nps_info() argument
2258 amdgpu_discovery_get_nps_info(struct amdgpu_device * adev,uint32_t * nps_type,struct amdgpu_gmc_memrange * ranges,int * range_cnt,bool refresh) amdgpu_discovery_get_nps_info() argument
2328 amdgpu_discovery_set_common_ip_blocks(struct amdgpu_device * adev) amdgpu_discovery_set_common_ip_blocks() argument
2391 amdgpu_discovery_set_gmc_ip_blocks(struct amdgpu_device * adev) amdgpu_discovery_set_gmc_ip_blocks() argument
2451 amdgpu_discovery_set_ih_ip_blocks(struct amdgpu_device * adev) amdgpu_discovery_set_ih_ip_blocks() argument
2499 amdgpu_discovery_set_psp_ip_blocks(struct amdgpu_device * adev) amdgpu_discovery_set_psp_ip_blocks() argument
2572 amdgpu_discovery_set_smu_ip_blocks(struct amdgpu_device * adev) amdgpu_discovery_set_smu_ip_blocks() argument
2642 amdgpu_discovery_set_sriov_display(struct amdgpu_device * adev) amdgpu_discovery_set_sriov_display() argument
2649 amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device * adev) amdgpu_discovery_set_display_ip_blocks() argument
2722 amdgpu_discovery_set_gc_ip_blocks(struct amdgpu_device * adev) amdgpu_discovery_set_gc_ip_blocks() argument
2785 amdgpu_discovery_set_sdma_ip_blocks(struct amdgpu_device * adev) amdgpu_discovery_set_sdma_ip_blocks() argument
2848 amdgpu_discovery_set_ras_ip_blocks(struct amdgpu_device * adev) amdgpu_discovery_set_ras_ip_blocks() argument
2862 amdgpu_discovery_set_mm_ip_blocks(struct amdgpu_device * adev) amdgpu_discovery_set_mm_ip_blocks() argument
2972 amdgpu_discovery_set_mes_ip_blocks(struct amdgpu_device * adev) amdgpu_discovery_set_mes_ip_blocks() argument
3013 amdgpu_discovery_init_soc_config(struct amdgpu_device * adev) amdgpu_discovery_init_soc_config() argument
3029 amdgpu_discovery_set_vpe_ip_blocks(struct amdgpu_device * adev) amdgpu_discovery_set_vpe_ip_blocks() argument
3048 amdgpu_discovery_set_umsch_mm_ip_blocks(struct amdgpu_device * adev) amdgpu_discovery_set_umsch_mm_ip_blocks() argument
3065 amdgpu_discovery_set_isp_ip_blocks(struct amdgpu_device * adev) amdgpu_discovery_set_isp_ip_blocks() argument
3083 amdgpu_discovery_set_ip_blocks(struct amdgpu_device * adev) amdgpu_discovery_set_ip_blocks() argument
3734 amdgpu_discovery_get_gc_major_minor_version(struct amdgpu_device * adev,uint16_t * major,uint16_t * minor) amdgpu_discovery_get_gc_major_minor_version() argument
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| H A D | amdgpu_amdkfd.c | 74 void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev) in amdgpu_amdkfd_device_probe() argument
76 bool vf = amdgpu_sriov_vf(adev); in amdgpu_amdkfd_device_probe()
81 adev->kfd.dev = kgd2kfd_probe(adev, vf); in amdgpu_amdkfd_device_probe()
97 static void amdgpu_doorbell_get_kfd_info(struct amdgpu_device *adev, in amdgpu_doorbell_get_kfd_info() argument
106 if (adev->enable_mes) { in amdgpu_doorbell_get_kfd_info()
113 *aperture_base = adev->doorbell.base; in amdgpu_doorbell_get_kfd_info()
116 } else if (adev->doorbell.size > adev->doorbell.num_kernel_doorbells * in amdgpu_doorbell_get_kfd_info()
118 *aperture_base = adev->doorbell.base; in amdgpu_doorbell_get_kfd_info()
119 *aperture_size = adev->doorbell.size; in amdgpu_doorbell_get_kfd_info()
120 *start_offset = adev->doorbell.num_kernel_doorbells * sizeof(u32); in amdgpu_doorbell_get_kfd_info()
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| H A D | amdgpu_irq.c | 159 void amdgpu_irq_disable_all(struct amdgpu_device *adev) in amdgpu_irq_disable_all() argument
165 spin_lock_irqsave(&adev->irq.lock, irqflags); in amdgpu_irq_disable_all()
167 if (!adev->irq.client[i].sources) in amdgpu_irq_disable_all()
171 struct amdgpu_irq_src *src = adev->irq.client[i].sources[j]; in amdgpu_irq_disable_all()
177 r = src->funcs->set(adev, src, k, in amdgpu_irq_disable_all()
180 dev_err(adev->dev, in amdgpu_irq_disable_all()
186 spin_unlock_irqrestore(&adev->irq.lock, irqflags); in amdgpu_irq_disable_all()
203 struct amdgpu_device *adev = drm_to_adev(dev); in amdgpu_irq_handler() local
206 ret = amdgpu_ih_process(adev, &adev->irq.ih); in amdgpu_irq_handler()
210 amdgpu_ras_interrupt_fatal_error_handler(adev); in amdgpu_irq_handler()
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| H A D | amdgpu_umc.c | 32 static int amdgpu_umc_convert_error_address(struct amdgpu_device *adev, in amdgpu_umc_convert_error_address() argument
36 switch (amdgpu_ip_version(adev, UMC_HWIP, 0)) { in amdgpu_umc_convert_error_address()
38 umc_v6_7_convert_error_address(adev, in amdgpu_umc_convert_error_address()
42 dev_warn(adev->dev, in amdgpu_umc_convert_error_address()
50 int amdgpu_umc_page_retirement_mca(struct amdgpu_device *adev, in amdgpu_umc_page_retirement_mca() argument
62 adev->umc.max_ras_err_cnt_per_query); in amdgpu_umc_page_retirement_mca()
64 dev_warn(adev->dev, in amdgpu_umc_page_retirement_mca()
70 err_data.err_addr_len = adev->umc.max_ras_err_cnt_per_query; in amdgpu_umc_page_retirement_mca()
75 ret = amdgpu_umc_convert_error_address(adev, &err_data, err_addr, in amdgpu_umc_page_retirement_mca()
81 amdgpu_ras_add_bad_pages(adev, err_data.err_addr, in amdgpu_umc_page_retirement_mca()
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| H A D | amdgpu_gmc.c | 44 bool amdgpu_gmc_is_pdb0_enabled(struct amdgpu_device *adev) in amdgpu_gmc_is_pdb0_enabled() argument
46 return adev->gmc.xgmi.connected_to_cpu || amdgpu_virt_xgmi_migrate_enabled(adev); in amdgpu_gmc_is_pdb0_enabled()
57 int amdgpu_gmc_pdb0_alloc(struct amdgpu_device *adev) in amdgpu_gmc_pdb0_alloc() argument
61 u64 vram_size = adev->gmc.xgmi.node_segment_size * adev->gmc.xgmi.num_physical_nodes; in amdgpu_gmc_pdb0_alloc()
62 uint32_t pde0_page_shift = adev->gmc.vmid0_page_table_block_size + 21; in amdgpu_gmc_pdb0_alloc()
75 r = amdgpu_bo_create(adev, &bp, &adev->gmc.pdb0_bo); in amdgpu_gmc_pdb0_alloc()
79 r = amdgpu_bo_reserve(adev->gmc.pdb0_bo, false); in amdgpu_gmc_pdb0_alloc()
83 r = amdgpu_bo_pin(adev->gmc.pdb0_bo, AMDGPU_GEM_DOMAIN_VRAM); in amdgpu_gmc_pdb0_alloc()
86 r = amdgpu_bo_kmap(adev->gmc.pdb0_bo, &adev->gmc.ptr_pdb0); in amdgpu_gmc_pdb0_alloc()
90 amdgpu_bo_unreserve(adev->gmc.pdb0_bo); in amdgpu_gmc_pdb0_alloc()
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| H A D | gfx_v12_0.c | 268 static void gfx_v12_0_disable_gpa_mode(struct amdgpu_device *adev);
269 static void gfx_v12_0_set_ring_funcs(struct amdgpu_device *adev);
270 static void gfx_v12_0_set_irq_funcs(struct amdgpu_device *adev);
271 static void gfx_v12_0_set_rlc_funcs(struct amdgpu_device *adev);
272 static void gfx_v12_0_set_mqd_funcs(struct amdgpu_device *adev);
273 static void gfx_v12_0_set_imu_funcs(struct amdgpu_device *adev);
274 static int gfx_v12_0_get_cu_info(struct amdgpu_device *adev,
276 static uint64_t gfx_v12_0_get_gpu_clock_counter(struct amdgpu_device *adev);
277 static void gfx_v12_0_select_se_sh(struct amdgpu_device *adev, u32 se_num,
279 static u32 gfx_v12_0_get_wgp_active_bitmap_per_sh(struct amdgpu_device *adev);
355 struct amdgpu_device *adev = kiq_ring->adev; gfx_v12_0_kiq_unmap_queues() local
425 gfx_v12_0_set_kiq_pm4_funcs(struct amdgpu_device * adev) gfx_v12_0_set_kiq_pm4_funcs() argument
454 struct amdgpu_device *adev = ring->adev; gfx_v12_0_ring_test_ring() local
496 struct amdgpu_device *adev = ring->adev; gfx_v12_0_ring_test_ib() local
556 gfx_v12_0_free_microcode(struct amdgpu_device * adev) gfx_v12_0_free_microcode() argument
566 gfx_v12_0_init_toc_microcode(struct amdgpu_device * adev,const char * ucode_prefix) gfx_v12_0_init_toc_microcode() argument
589 gfx_v12_0_init_microcode(struct amdgpu_device * adev) gfx_v12_0_init_microcode() argument
677 gfx_v12_0_get_csb_size(struct amdgpu_device * adev) gfx_v12_0_get_csb_size() argument
696 gfx_v12_0_get_csb_buffer(struct amdgpu_device * adev,u32 * buffer) gfx_v12_0_get_csb_buffer() argument
726 gfx_v12_0_rlc_fini(struct amdgpu_device * adev) gfx_v12_0_rlc_fini() argument
739 gfx_v12_0_init_rlcg_reg_access_ctrl(struct amdgpu_device * adev) gfx_v12_0_init_rlcg_reg_access_ctrl() argument
754 gfx_v12_0_rlc_init(struct amdgpu_device * adev) gfx_v12_0_rlc_init() argument
777 gfx_v12_0_mec_fini(struct amdgpu_device * adev) gfx_v12_0_mec_fini() argument
784 gfx_v12_0_me_init(struct amdgpu_device * adev) gfx_v12_0_me_init() argument
791 gfx_v12_0_mec_init(struct amdgpu_device * adev) gfx_v12_0_mec_init() argument
824 wave_read_ind(struct amdgpu_device * adev,uint32_t wave,uint32_t address) wave_read_ind() argument
832 wave_read_regs(struct amdgpu_device * adev,uint32_t wave,uint32_t thread,uint32_t regno,uint32_t num,uint32_t * out) wave_read_regs() argument
845 gfx_v12_0_read_wave_data(struct amdgpu_device * adev,uint32_t xcc_id,uint32_t simd,uint32_t wave,uint32_t * dst,int * no_fields) gfx_v12_0_read_wave_data() argument
882 gfx_v12_0_read_wave_sgprs(struct amdgpu_device * adev,uint32_t xcc_id,uint32_t simd,uint32_t wave,uint32_t start,uint32_t size,uint32_t * dst) gfx_v12_0_read_wave_sgprs() argument
894 gfx_v12_0_read_wave_vgprs(struct amdgpu_device * adev,uint32_t xcc_id,uint32_t simd,uint32_t wave,uint32_t thread,uint32_t start,uint32_t size,uint32_t * dst) gfx_v12_0_read_wave_vgprs() argument
905 gfx_v12_0_select_me_pipe_q(struct amdgpu_device * adev,u32 me,u32 pipe,u32 q,u32 vm,u32 xcc_id) gfx_v12_0_select_me_pipe_q() argument
917 gfx_v12_0_get_gfx_shadow_info_nocheck(struct amdgpu_device * adev,struct amdgpu_gfx_shadow_info * shadow_info) gfx_v12_0_get_gfx_shadow_info_nocheck() argument
930 gfx_v12_0_get_gfx_shadow_info(struct amdgpu_device * adev,struct amdgpu_gfx_shadow_info * shadow_info,bool skip_check) gfx_v12_0_get_gfx_shadow_info() argument
955 gfx_v12_0_gpu_early_init(struct amdgpu_device * adev) gfx_v12_0_gpu_early_init() argument
976 gfx_v12_0_gfx_ring_init(struct amdgpu_device * adev,int ring_id,int me,int pipe,int queue) gfx_v12_0_gfx_ring_init() argument
1007 gfx_v12_0_compute_ring_init(struct amdgpu_device * adev,int ring_id,int mec,int pipe,int queue) gfx_v12_0_compute_ring_init() argument
1056 gfx_v12_0_parse_rlc_toc(struct amdgpu_device * adev,void * rlc_toc) gfx_v12_0_parse_rlc_toc() argument
1071 gfx_v12_0_calc_toc_total_size(struct amdgpu_device * adev) gfx_v12_0_calc_toc_total_size() argument
1091 gfx_v12_0_rlc_autoload_buffer_init(struct amdgpu_device * adev) gfx_v12_0_rlc_autoload_buffer_init() argument
1112 gfx_v12_0_rlc_backdoor_autoload_copy_ucode(struct amdgpu_device * adev,SOC24_FIRMWARE_ID id,const void * fw_data,uint32_t fw_size) gfx_v12_0_rlc_backdoor_autoload_copy_ucode() argument
1140 gfx_v12_0_rlc_backdoor_autoload_copy_toc_ucode(struct amdgpu_device * adev) gfx_v12_0_rlc_backdoor_autoload_copy_toc_ucode() argument
1157 gfx_v12_0_rlc_backdoor_autoload_copy_gfx_ucode(struct amdgpu_device * adev) gfx_v12_0_rlc_backdoor_autoload_copy_gfx_ucode() argument
1269 gfx_v12_0_rlc_backdoor_autoload_copy_sdma_ucode(struct amdgpu_device * adev) gfx_v12_0_rlc_backdoor_autoload_copy_sdma_ucode() argument
1286 gfx_v12_0_rlc_backdoor_autoload_copy_mes_ucode(struct amdgpu_device * adev) gfx_v12_0_rlc_backdoor_autoload_copy_mes_ucode() argument
1319 gfx_v12_0_rlc_backdoor_autoload_enable(struct amdgpu_device * adev) gfx_v12_0_rlc_backdoor_autoload_enable() argument
1364 gfx_v12_0_alloc_ip_dump(struct amdgpu_device * adev) gfx_v12_0_alloc_ip_dump() argument
1410 struct amdgpu_device *adev = ip_block->adev; gfx_v12_0_sw_init() local
1618 gfx_v12_0_pfp_fini(struct amdgpu_device * adev) gfx_v12_0_pfp_fini() argument
1629 gfx_v12_0_me_fini(struct amdgpu_device * adev) gfx_v12_0_me_fini() argument
1640 gfx_v12_0_rlc_autoload_buffer_fini(struct amdgpu_device * adev) gfx_v12_0_rlc_autoload_buffer_fini() argument
1650 struct amdgpu_device *adev = ip_block->adev; gfx_v12_0_sw_fini() local
1685 gfx_v12_0_select_se_sh(struct amdgpu_device * adev,u32 se_num,u32 sh_num,u32 instance,int xcc_id) gfx_v12_0_select_se_sh() argument
1712 gfx_v12_0_get_sa_active_bitmap(struct amdgpu_device * adev) gfx_v12_0_get_sa_active_bitmap() argument
1730 gfx_v12_0_get_rb_active_bitmap(struct amdgpu_device * adev) gfx_v12_0_get_rb_active_bitmap() argument
1749 gfx_v12_0_setup_rb(struct amdgpu_device * adev) gfx_v12_0_setup_rb() argument
1784 gfx_v12_0_init_compute_vmid(struct amdgpu_device * adev) gfx_v12_0_init_compute_vmid() argument
1815 gfx_v12_0_tcp_harvest(struct amdgpu_device * adev) gfx_v12_0_tcp_harvest() argument
1820 gfx_v12_0_get_tcc_info(struct amdgpu_device * adev) gfx_v12_0_get_tcc_info() argument
1824 gfx_v12_0_constants_init(struct amdgpu_device * adev) gfx_v12_0_constants_init() argument
1874 gfx_v12_0_get_cpg_int_cntl(struct amdgpu_device * adev,int me,int pipe) gfx_v12_0_get_cpg_int_cntl() argument
1888 gfx_v12_0_get_cpc_int_cntl(struct amdgpu_device * adev,int me,int pipe) gfx_v12_0_get_cpc_int_cntl() argument
1909 gfx_v12_0_enable_gui_idle_interrupt(struct amdgpu_device * adev,bool enable) gfx_v12_0_enable_gui_idle_interrupt() argument
1938 gfx_v12_0_init_csb(struct amdgpu_device * adev) gfx_v12_0_init_csb() argument
1951 gfx_v12_0_rlc_stop(struct amdgpu_device * adev) gfx_v12_0_rlc_stop() argument
1959 gfx_v12_0_rlc_reset(struct amdgpu_device * adev) gfx_v12_0_rlc_reset() argument
1967 gfx_v12_0_rlc_smu_handshake_cntl(struct amdgpu_device * adev,bool enable) gfx_v12_0_rlc_smu_handshake_cntl() argument
1989 gfx_v12_0_rlc_start(struct amdgpu_device * adev) gfx_v12_0_rlc_start() argument
2000 gfx_v12_0_rlc_enable_srm(struct amdgpu_device * adev) gfx_v12_0_rlc_enable_srm() argument
2011 gfx_v12_0_load_rlcg_microcode(struct amdgpu_device * adev) gfx_v12_0_load_rlcg_microcode() argument
2032 gfx_v12_0_load_rlc_iram_dram_microcode(struct amdgpu_device * adev) gfx_v12_0_load_rlc_iram_dram_microcode() argument
2076 gfx_v12_0_rlc_load_microcode(struct amdgpu_device * adev) gfx_v12_0_rlc_load_microcode() argument
2104 gfx_v12_0_rlc_resume(struct amdgpu_device * adev) gfx_v12_0_rlc_resume() argument
2142 gfx_v12_0_config_gfx_rs64(struct amdgpu_device * adev) gfx_v12_0_config_gfx_rs64() argument
2227 gfx_v12_0_set_pfp_ucode_start_addr(struct amdgpu_device * adev) gfx_v12_0_set_pfp_ucode_start_addr() argument
2269 gfx_v12_0_set_me_ucode_start_addr(struct amdgpu_device * adev) gfx_v12_0_set_me_ucode_start_addr() argument
2311 gfx_v12_0_set_mec_ucode_start_addr(struct amdgpu_device * adev) gfx_v12_0_set_mec_ucode_start_addr() argument
2331 gfx_v12_0_wait_for_rlc_autoload_complete(struct amdgpu_device * adev) gfx_v12_0_wait_for_rlc_autoload_complete() argument
2365 gfx_v12_0_cp_gfx_enable(struct amdgpu_device * adev,bool enable) gfx_v12_0_cp_gfx_enable() argument
2386 gfx_v12_0_cp_gfx_load_pfp_microcode_rs64(struct amdgpu_device * adev) gfx_v12_0_cp_gfx_load_pfp_microcode_rs64() argument
2530 gfx_v12_0_cp_gfx_load_me_microcode_rs64(struct amdgpu_device * adev) gfx_v12_0_cp_gfx_load_me_microcode_rs64() argument
2675 gfx_v12_0_cp_gfx_load_microcode(struct amdgpu_device * adev) gfx_v12_0_cp_gfx_load_microcode() argument
2699 gfx_v12_0_cp_gfx_start(struct amdgpu_device * adev) gfx_v12_0_cp_gfx_start() argument
2712 gfx_v12_0_cp_gfx_switch_pipe(struct amdgpu_device * adev,CP_PIPE_ID pipe) gfx_v12_0_cp_gfx_switch_pipe() argument
2723 gfx_v12_0_cp_gfx_set_doorbell(struct amdgpu_device * adev,struct amdgpu_ring * ring) gfx_v12_0_cp_gfx_set_doorbell() argument
2748 gfx_v12_0_cp_gfx_resume(struct amdgpu_device * adev) gfx_v12_0_cp_gfx_resume() argument
2811 gfx_v12_0_cp_compute_enable(struct amdgpu_device * adev,bool enable) gfx_v12_0_cp_compute_enable() argument
2843 gfx_v12_0_cp_compute_load_microcode_rs64(struct amdgpu_device * adev) gfx_v12_0_cp_compute_load_microcode_rs64() argument
2978 struct amdgpu_device *adev = ring->adev; gfx_v12_0_kiq_setting() local
2987 gfx_v12_0_cp_set_doorbell_range(struct amdgpu_device * adev) gfx_v12_0_cp_set_doorbell_range() argument
3002 gfx_v12_0_gfx_mqd_init(struct amdgpu_device * adev,void * m,struct amdgpu_mqd_prop * prop) gfx_v12_0_gfx_mqd_init() argument
3102 struct amdgpu_device *adev = ring->adev; gfx_v12_0_kgq_init_queue() local
3128 gfx_v12_0_cp_async_gfx_ring_resume(struct amdgpu_device * adev) gfx_v12_0_cp_async_gfx_ring_resume() argument
3145 gfx_v12_0_compute_mqd_set_cu_mask(struct amdgpu_device * adev,struct v12_compute_mqd * mqd,struct amdgpu_mqd_prop * prop) gfx_v12_0_compute_mqd_set_cu_mask() argument
3176 gfx_v12_0_compute_mqd_init(struct amdgpu_device * adev,void * m,struct amdgpu_mqd_prop * prop) gfx_v12_0_compute_mqd_init() argument
3322 struct amdgpu_device *adev = ring->adev; gfx_v12_0_kiq_init_register() local
3432 struct amdgpu_device *adev = ring->adev; gfx_v12_0_kiq_init_queue() local
3472 struct amdgpu_device *adev = ring->adev; gfx_v12_0_kcq_init_queue() local
3499 gfx_v12_0_kiq_resume(struct amdgpu_device * adev) gfx_v12_0_kiq_resume() argument
3506 gfx_v12_0_kcq_resume(struct amdgpu_device * adev) gfx_v12_0_kcq_resume() argument
3522 gfx_v12_0_cp_resume(struct amdgpu_device * adev) gfx_v12_0_cp_resume() argument
3595 gfx_v12_0_cp_enable(struct amdgpu_device * adev,bool enable) gfx_v12_0_cp_enable() argument
3601 gfx_v12_0_gfxhub_enable(struct amdgpu_device * adev) gfx_v12_0_gfxhub_enable() argument
3622 get_gb_addr_config(struct amdgpu_device * adev) get_gb_addr_config() argument
3658 gfx_v12_0_disable_gpa_mode(struct amdgpu_device * adev) gfx_v12_0_disable_gpa_mode() argument
3671 gfx_v12_0_init_golden_registers(struct amdgpu_device * adev) gfx_v12_0_init_golden_registers() argument
3693 gfx_v12_0_set_userq_eop_interrupts(struct amdgpu_device * adev,bool enable) gfx_v12_0_set_userq_eop_interrupts() argument
3768 struct amdgpu_device *adev = ip_block->adev; gfx_v12_0_hw_init() local
3881 struct amdgpu_device *adev = ip_block->adev; gfx_v12_0_hw_fini() local
3934 struct amdgpu_device *adev = ip_block->adev; gfx_v12_0_is_idle() local
3947 struct amdgpu_device *adev = ip_block->adev; gfx_v12_0_wait_for_idle() local
3961 gfx_v12_0_get_gpu_clock_counter(struct amdgpu_device * adev) gfx_v12_0_get_gpu_clock_counter() argument
3976 struct amdgpu_device *adev = ip_block->adev; gfx_v12_0_early_init() local
4020 gfx_v12_0_is_rlc_enabled(struct amdgpu_device * adev) gfx_v12_0_is_rlc_enabled() argument
4029 gfx_v12_0_set_safe_mode(struct amdgpu_device * adev,int xcc_id) gfx_v12_0_set_safe_mode() argument
4049 gfx_v12_0_unset_safe_mode(struct amdgpu_device * adev,int xcc_id) gfx_v12_0_unset_safe_mode() argument
4055 gfx_v12_0_update_perf_clk(struct amdgpu_device * adev,bool enable) gfx_v12_0_update_perf_clk() argument
4074 gfx_v12_0_update_spm_vmid(struct amdgpu_device * adev,int xcc_id,struct amdgpu_ring * ring,unsigned vmid) gfx_v12_0_update_spm_vmid() argument
4133 struct amdgpu_device *adev = ip_block->adev; gfx_v12_0_set_powergating_state() local
4151 gfx_v12_0_update_coarse_grain_clock_gating(struct amdgpu_device * adev,bool enable) gfx_v12_0_update_coarse_grain_clock_gating() argument
4268 gfx_v12_0_update_medium_grain_clock_gating(struct amdgpu_device * adev,bool enable) gfx_v12_0_update_medium_grain_clock_gating() argument
4302 gfx_v12_0_update_repeater_fgcg(struct amdgpu_device * adev,bool enable) gfx_v12_0_update_repeater_fgcg() argument
4323 gfx_v12_0_update_sram_fgcg(struct amdgpu_device * adev,bool enable) gfx_v12_0_update_sram_fgcg() argument
4342 gfx_v12_0_update_gfx_clock_gating(struct amdgpu_device * adev,bool enable) gfx_v12_0_update_gfx_clock_gating() argument
4373 struct amdgpu_device *adev = ip_block->adev; gfx_v12_0_set_clockgating_state() local
4393 struct amdgpu_device *adev = ip_block->adev; gfx_v12_0_get_clockgating_state() local
4440 struct amdgpu_device *adev = ring->adev; gfx_v12_0_ring_get_wptr_gfx() local
4456 struct amdgpu_device *adev = ring->adev; gfx_v12_0_ring_set_wptr_gfx() local
4479 struct amdgpu_device *adev = ring->adev; gfx_v12_0_ring_get_wptr_compute() local
4494 struct amdgpu_device *adev = ring->adev; gfx_v12_0_ring_set_wptr_compute() local
4508 struct amdgpu_device *adev = ring->adev; gfx_v12_0_ring_emit_hdp_flush() local
4634 struct amdgpu_device *adev = ring->adev; gfx_v12_0_ring_emit_fence_kiq() local
4695 struct amdgpu_device *adev = ring->adev; gfx_v12_0_ring_emit_rreg() local
4750 gfx_v12_0_set_gfx_eop_interrupt_state(struct amdgpu_device * adev,uint32_t me,uint32_t pipe,enum amdgpu_interrupt_state state) gfx_v12_0_set_gfx_eop_interrupt_state() argument
4792 gfx_v12_0_set_compute_eop_interrupt_state(struct amdgpu_device * adev,int me,int pipe,enum amdgpu_interrupt_state state) gfx_v12_0_set_compute_eop_interrupt_state() argument
4843 gfx_v12_0_set_eop_interrupt_state(struct amdgpu_device * adev,struct amdgpu_irq_src * src,unsigned type,enum amdgpu_interrupt_state state) gfx_v12_0_set_eop_interrupt_state() argument
4873 gfx_v12_0_eop_irq(struct amdgpu_device * adev,struct amdgpu_irq_src * source,struct amdgpu_iv_entry * entry) gfx_v12_0_eop_irq() argument
4933 gfx_v12_0_set_priv_reg_fault_state(struct amdgpu_device * adev,struct amdgpu_irq_src * source,unsigned int type,enum amdgpu_interrupt_state state) gfx_v12_0_set_priv_reg_fault_state() argument
4979 gfx_v12_0_set_bad_op_fault_state(struct amdgpu_device * adev,struct amdgpu_irq_src * source,unsigned type,enum amdgpu_interrupt_state state) gfx_v12_0_set_bad_op_fault_state() argument
5024 gfx_v12_0_set_priv_inst_fault_state(struct amdgpu_device * adev,struct amdgpu_irq_src * source,unsigned int type,enum amdgpu_interrupt_state state) gfx_v12_0_set_priv_inst_fault_state() argument
5063 struct amdgpu_device *adev = gfx_v12_0_userq_priv_fault_work() local
5090 gfx_v12_0_handle_priv_fault(struct amdgpu_device * adev,struct amdgpu_iv_entry * entry) gfx_v12_0_handle_priv_fault() argument
5102 gfx_v12_0_priv_reg_irq(struct amdgpu_device * adev,struct amdgpu_irq_src * source,struct amdgpu_iv_entry * entry) gfx_v12_0_priv_reg_irq() argument
5111 gfx_v12_0_bad_op_irq(struct amdgpu_device * adev,struct amdgpu_irq_src * source,struct amdgpu_iv_entry * entry) gfx_v12_0_bad_op_irq() argument
5120 gfx_v12_0_priv_inst_irq(struct amdgpu_device * adev,struct amdgpu_irq_src * source,struct amdgpu_iv_entry * entry) gfx_v12_0_priv_inst_irq() argument
5176 struct amdgpu_device *adev = ip_block->adev; gfx_v12_ip_print() local
5240 struct amdgpu_device *adev = ip_block->adev; gfx_v12_ip_dump() local
5308 struct amdgpu_device *adev = ring->adev; gfx_v12_0_reset_kgq() local
5318 struct amdgpu_device *adev = ring->adev; gfx_v12_0_reset_kcq() local
5471 gfx_v12_0_set_ring_funcs(struct amdgpu_device * adev) gfx_v12_0_set_ring_funcs() argument
5504 gfx_v12_0_set_irq_funcs(struct amdgpu_device * adev) gfx_v12_0_set_irq_funcs() argument
5519 gfx_v12_0_set_imu_funcs(struct amdgpu_device * adev) gfx_v12_0_set_imu_funcs() argument
5529 gfx_v12_0_set_rlc_funcs(struct amdgpu_device * adev) gfx_v12_0_set_rlc_funcs() argument
5534 gfx_v12_0_set_mqd_funcs(struct amdgpu_device * adev) gfx_v12_0_set_mqd_funcs() argument
5548 gfx_v12_0_set_user_wgp_inactive_bitmap_per_sh(struct amdgpu_device * adev,u32 bitmap) gfx_v12_0_set_user_wgp_inactive_bitmap_per_sh() argument
5562 gfx_v12_0_get_wgp_active_bitmap_per_sh(struct amdgpu_device * adev) gfx_v12_0_get_wgp_active_bitmap_per_sh() argument
5577 gfx_v12_0_get_cu_active_bitmap_per_sh(struct amdgpu_device * adev) gfx_v12_0_get_cu_active_bitmap_per_sh() argument
5595 gfx_v12_0_get_cu_info(struct amdgpu_device * adev,struct amdgpu_cu_info * cu_info) gfx_v12_0_get_cu_info() argument
[all...] |
| H A D | amdgpu_gart.c | 75 static int amdgpu_gart_dummy_page_init(struct amdgpu_device *adev) in amdgpu_gart_dummy_page_init() argument
79 if (adev->dummy_page_addr) in amdgpu_gart_dummy_page_init()
81 adev->dummy_page_addr = dma_map_page_attrs(&adev->pdev->dev, dummy_page, 0, in amdgpu_gart_dummy_page_init()
84 if (dma_mapping_error(&adev->pdev->dev, adev->dummy_page_addr)) { in amdgpu_gart_dummy_page_init()
85 dev_err(&adev->pdev->dev, "Failed to DMA MAP the dummy page\n"); in amdgpu_gart_dummy_page_init()
86 adev->dummy_page_addr = 0; in amdgpu_gart_dummy_page_init()
99 void amdgpu_gart_dummy_page_fini(struct amdgpu_device *adev) in amdgpu_gart_dummy_page_fini() argument
101 if (!adev->dummy_page_addr) in amdgpu_gart_dummy_page_fini()
103 dma_unmap_page_attrs(&adev->pdev->dev, adev->dummy_page_addr, PAGE_SIZE, in amdgpu_gart_dummy_page_fini()
106 adev->dummy_page_addr = 0; in amdgpu_gart_dummy_page_fini()
[all …]
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| H A D | gfx_v11_0.c | 341 static void gfx_v11_0_disable_gpa_mode(struct amdgpu_device *adev);
342 static void gfx_v11_0_set_ring_funcs(struct amdgpu_device *adev);
343 static void gfx_v11_0_set_irq_funcs(struct amdgpu_device *adev);
344 static void gfx_v11_0_set_gds_init(struct amdgpu_device *adev);
345 static void gfx_v11_0_set_rlc_funcs(struct amdgpu_device *adev);
346 static void gfx_v11_0_set_mqd_funcs(struct amdgpu_device *adev);
347 static void gfx_v11_0_set_imu_funcs(struct amdgpu_device *adev);
348 static int gfx_v11_0_get_cu_info(struct amdgpu_device *adev,
350 static uint64_t gfx_v11_0_get_gpu_clock_counter(struct amdgpu_device *adev);
351 static void gfx_v11_0_select_se_sh(struct amdgpu_device *adev, u3
371 struct amdgpu_device *adev = kiq_ring->adev; gfx11_kiq_set_resources() local
437 struct amdgpu_device *adev = kiq_ring->adev; gfx11_kiq_unmap_queues() local
507 gfx_v11_0_set_kiq_pm4_funcs(struct amdgpu_device * adev) gfx_v11_0_set_kiq_pm4_funcs() argument
512 gfx_v11_0_init_golden_registers(struct amdgpu_device * adev) gfx_v11_0_init_golden_registers() argument
583 struct amdgpu_device *adev = ring->adev; gfx_v11_0_ring_test_ring() local
624 struct amdgpu_device *adev = ring->adev; gfx_v11_0_ring_test_ib() local
684 gfx_v11_0_free_microcode(struct amdgpu_device * adev) gfx_v11_0_free_microcode() argument
694 gfx_v11_0_init_toc_microcode(struct amdgpu_device * adev,const char * ucode_prefix) gfx_v11_0_init_toc_microcode() argument
717 gfx_v11_0_check_fw_cp_gfx_shadow(struct amdgpu_device * adev) gfx_v11_0_check_fw_cp_gfx_shadow() argument
738 gfx_v11_0_init_microcode(struct amdgpu_device * adev) gfx_v11_0_init_microcode() argument
846 gfx_v11_0_get_csb_size(struct amdgpu_device * adev) gfx_v11_0_get_csb_size() argument
876 gfx_v11_0_get_csb_buffer(struct amdgpu_device * adev,u32 * buffer) gfx_v11_0_get_csb_buffer() argument
897 gfx_v11_0_rlc_fini(struct amdgpu_device * adev) gfx_v11_0_rlc_fini() argument
910 gfx_v11_0_init_rlcg_reg_access_ctrl(struct amdgpu_device * adev) gfx_v11_0_init_rlcg_reg_access_ctrl() argument
925 gfx_v11_0_rlc_init(struct amdgpu_device * adev) gfx_v11_0_rlc_init() argument
948 gfx_v11_0_mec_fini(struct amdgpu_device * adev) gfx_v11_0_mec_fini() argument
955 gfx_v11_0_me_init(struct amdgpu_device * adev) gfx_v11_0_me_init() argument
962 gfx_v11_0_mec_init(struct amdgpu_device * adev) gfx_v11_0_mec_init() argument
995 wave_read_ind(struct amdgpu_device * adev,uint32_t wave,uint32_t address) wave_read_ind() argument
1003 wave_read_regs(struct amdgpu_device * adev,uint32_t wave,uint32_t thread,uint32_t regno,uint32_t num,uint32_t * out) wave_read_regs() argument
1016 gfx_v11_0_read_wave_data(struct amdgpu_device * adev,uint32_t xcc_id,uint32_t simd,uint32_t wave,uint32_t * dst,int * no_fields) gfx_v11_0_read_wave_data() argument
1042 gfx_v11_0_read_wave_sgprs(struct amdgpu_device * adev,uint32_t xcc_id,uint32_t simd,uint32_t wave,uint32_t start,uint32_t size,uint32_t * dst) gfx_v11_0_read_wave_sgprs() argument
1053 gfx_v11_0_read_wave_vgprs(struct amdgpu_device * adev,uint32_t xcc_id,uint32_t simd,uint32_t wave,uint32_t thread,uint32_t start,uint32_t size,uint32_t * dst) gfx_v11_0_read_wave_vgprs() argument
1063 gfx_v11_0_select_me_pipe_q(struct amdgpu_device * adev,u32 me,u32 pipe,u32 q,u32 vm,u32 xcc_id) gfx_v11_0_select_me_pipe_q() argument
1075 gfx_v11_0_get_gfx_shadow_info_nocheck(struct amdgpu_device * adev,struct amdgpu_gfx_shadow_info * shadow_info) gfx_v11_0_get_gfx_shadow_info_nocheck() argument
1088 gfx_v11_0_get_gfx_shadow_info(struct amdgpu_device * adev,struct amdgpu_gfx_shadow_info * shadow_info,bool skip_check) gfx_v11_0_get_gfx_shadow_info() argument
1113 gfx_v11_0_gpu_early_init(struct amdgpu_device * adev) gfx_v11_0_gpu_early_init() argument
1157 gfx_v11_0_gfx_ring_init(struct amdgpu_device * adev,int ring_id,int me,int pipe,int queue) gfx_v11_0_gfx_ring_init() argument
1191 gfx_v11_0_compute_ring_init(struct amdgpu_device * adev,int ring_id,int mec,int pipe,int queue) gfx_v11_0_compute_ring_init() argument
1234 gfx_v11_0_parse_rlc_toc(struct amdgpu_device * adev,void * rlc_toc) gfx_v11_0_parse_rlc_toc() argument
1248 gfx_v11_0_calc_toc_total_size(struct amdgpu_device * adev) gfx_v11_0_calc_toc_total_size() argument
1266 gfx_v11_0_rlc_autoload_buffer_init(struct amdgpu_device * adev) gfx_v11_0_rlc_autoload_buffer_init() argument
1288 gfx_v11_0_rlc_backdoor_autoload_copy_ucode(struct amdgpu_device * adev,SOC21_FIRMWARE_ID id,const void * fw_data,uint32_t fw_size,uint32_t * fw_autoload_mask) gfx_v11_0_rlc_backdoor_autoload_copy_ucode() argument
1319 gfx_v11_0_rlc_backdoor_autoload_copy_toc_ucode(struct amdgpu_device * adev,uint32_t * fw_autoload_mask) gfx_v11_0_rlc_backdoor_autoload_copy_toc_ucode() argument
1340 gfx_v11_0_rlc_backdoor_autoload_copy_gfx_ucode(struct amdgpu_device * adev,uint32_t * fw_autoload_mask) gfx_v11_0_rlc_backdoor_autoload_copy_gfx_ucode() argument
1467 gfx_v11_0_rlc_backdoor_autoload_copy_sdma_ucode(struct amdgpu_device * adev,uint32_t * fw_autoload_mask) gfx_v11_0_rlc_backdoor_autoload_copy_sdma_ucode() argument
1491 gfx_v11_0_rlc_backdoor_autoload_copy_mes_ucode(struct amdgpu_device * adev,uint32_t * fw_autoload_mask) gfx_v11_0_rlc_backdoor_autoload_copy_mes_ucode() argument
1527 gfx_v11_0_rlc_backdoor_autoload_enable(struct amdgpu_device * adev) gfx_v11_0_rlc_backdoor_autoload_enable() argument
1565 gfx_v11_0_alloc_ip_dump(struct amdgpu_device * adev) gfx_v11_0_alloc_ip_dump() argument
1610 struct amdgpu_device *adev = ip_block->adev; gfx_v11_0_sw_init() local
1941 gfx_v11_0_pfp_fini(struct amdgpu_device * adev) gfx_v11_0_pfp_fini() argument
1952 gfx_v11_0_me_fini(struct amdgpu_device * adev) gfx_v11_0_me_fini() argument
1963 gfx_v11_0_rlc_autoload_buffer_fini(struct amdgpu_device * adev) gfx_v11_0_rlc_autoload_buffer_fini() argument
1973 struct amdgpu_device *adev = ip_block->adev; gfx_v11_0_sw_fini() local
2010 gfx_v11_0_select_se_sh(struct amdgpu_device * adev,u32 se_num,u32 sh_num,u32 instance,int xcc_id) gfx_v11_0_select_se_sh() argument
2037 gfx_v11_0_get_sa_active_bitmap(struct amdgpu_device * adev) gfx_v11_0_get_sa_active_bitmap() argument
2055 gfx_v11_0_get_rb_active_bitmap(struct amdgpu_device * adev) gfx_v11_0_get_rb_active_bitmap() argument
2074 gfx_v11_0_setup_rb(struct amdgpu_device * adev) gfx_v11_0_setup_rb() argument
2110 gfx_v11_0_init_compute_vmid(struct amdgpu_device * adev) gfx_v11_0_init_compute_vmid() argument
2152 gfx_v11_0_init_gds_vmid(struct amdgpu_device * adev) gfx_v11_0_init_gds_vmid() argument
2170 gfx_v11_0_tcp_harvest(struct amdgpu_device * adev) gfx_v11_0_tcp_harvest() argument
2175 gfx_v11_0_get_tcc_info(struct amdgpu_device * adev) gfx_v11_0_get_tcc_info() argument
2186 gfx_v11_0_constants_init(struct amdgpu_device * adev) gfx_v11_0_constants_init() argument
2236 gfx_v11_0_get_cpg_int_cntl(struct amdgpu_device * adev,int me,int pipe) gfx_v11_0_get_cpg_int_cntl() argument
2252 gfx_v11_0_get_cpc_int_cntl(struct amdgpu_device * adev,int me,int pipe) gfx_v11_0_get_cpc_int_cntl() argument
2277 gfx_v11_0_enable_gui_idle_interrupt(struct amdgpu_device * adev,bool enable) gfx_v11_0_enable_gui_idle_interrupt() argument
2306 gfx_v11_0_init_csb(struct amdgpu_device * adev) gfx_v11_0_init_csb() argument
2319 gfx_v11_0_rlc_stop(struct amdgpu_device * adev) gfx_v11_0_rlc_stop() argument
2327 gfx_v11_0_rlc_reset(struct amdgpu_device * adev) gfx_v11_0_rlc_reset() argument
2335 gfx_v11_0_rlc_smu_handshake_cntl(struct amdgpu_device * adev,bool enable) gfx_v11_0_rlc_smu_handshake_cntl() argument
2357 gfx_v11_0_rlc_start(struct amdgpu_device * adev) gfx_v11_0_rlc_start() argument
2368 gfx_v11_0_rlc_enable_srm(struct amdgpu_device * adev) gfx_v11_0_rlc_enable_srm() argument
2379 gfx_v11_0_load_rlcg_microcode(struct amdgpu_device * adev) gfx_v11_0_load_rlcg_microcode() argument
2400 gfx_v11_0_load_rlc_iram_dram_microcode(struct amdgpu_device * adev) gfx_v11_0_load_rlc_iram_dram_microcode() argument
2444 gfx_v11_0_load_rlcp_rlcv_microcode(struct amdgpu_device * adev) gfx_v11_0_load_rlcp_rlcv_microcode() argument
2492 gfx_v11_0_rlc_load_microcode(struct amdgpu_device * adev) gfx_v11_0_rlc_load_microcode() argument
2522 gfx_v11_0_rlc_resume(struct amdgpu_device * adev) gfx_v11_0_rlc_resume() argument
2559 gfx_v11_0_config_me_cache(struct amdgpu_device * adev,uint64_t addr) gfx_v11_0_config_me_cache() argument
2603 gfx_v11_0_config_pfp_cache(struct amdgpu_device * adev,uint64_t addr) gfx_v11_0_config_pfp_cache() argument
2647 gfx_v11_0_config_mec_cache(struct amdgpu_device * adev,uint64_t addr) gfx_v11_0_config_mec_cache() argument
2691 gfx_v11_0_config_pfp_cache_rs64(struct amdgpu_device * adev,uint64_t addr,uint64_t addr2) gfx_v11_0_config_pfp_cache_rs64() argument
2813 gfx_v11_0_config_me_cache_rs64(struct amdgpu_device * adev,uint64_t addr,uint64_t addr2) gfx_v11_0_config_me_cache_rs64() argument
2936 gfx_v11_0_config_mec_cache_rs64(struct amdgpu_device * adev,uint64_t addr,uint64_t addr2) gfx_v11_0_config_mec_cache_rs64() argument
3019 gfx_v11_0_config_gfx_rs64(struct amdgpu_device * adev) gfx_v11_0_config_gfx_rs64() argument
3104 gfx_v11_0_wait_for_rlc_autoload_complete(struct amdgpu_device * adev) gfx_v11_0_wait_for_rlc_autoload_complete() argument
3189 gfx_v11_0_cp_gfx_enable(struct amdgpu_device * adev,bool enable) gfx_v11_0_cp_gfx_enable() argument
3210 gfx_v11_0_cp_gfx_load_pfp_microcode(struct amdgpu_device * adev) gfx_v11_0_cp_gfx_load_pfp_microcode() argument
3255 gfx_v11_0_cp_gfx_load_pfp_microcode_rs64(struct amdgpu_device * adev) gfx_v11_0_cp_gfx_load_pfp_microcode_rs64() argument
3428 gfx_v11_0_cp_gfx_load_me_microcode(struct amdgpu_device * adev) gfx_v11_0_cp_gfx_load_me_microcode() argument
3473 gfx_v11_0_cp_gfx_load_me_microcode_rs64(struct amdgpu_device * adev) gfx_v11_0_cp_gfx_load_me_microcode_rs64() argument
3647 gfx_v11_0_cp_gfx_load_microcode(struct amdgpu_device * adev) gfx_v11_0_cp_gfx_load_microcode() argument
3677 gfx_v11_0_cp_gfx_start(struct amdgpu_device * adev) gfx_v11_0_cp_gfx_start() argument
3753 gfx_v11_0_cp_gfx_switch_pipe(struct amdgpu_device * adev,CP_PIPE_ID pipe) gfx_v11_0_cp_gfx_switch_pipe() argument
3764 gfx_v11_0_cp_gfx_set_doorbell(struct amdgpu_device * adev,struct amdgpu_ring * ring) gfx_v11_0_cp_gfx_set_doorbell() argument
3789 gfx_v11_0_cp_gfx_resume(struct amdgpu_device * adev) gfx_v11_0_cp_gfx_resume() argument
3889 gfx_v11_0_cp_compute_enable(struct amdgpu_device * adev,bool enable) gfx_v11_0_cp_compute_enable() argument
3934 gfx_v11_0_cp_compute_load_microcode(struct amdgpu_device * adev) gfx_v11_0_cp_compute_load_microcode() argument
3985 gfx_v11_0_cp_compute_load_microcode_rs64(struct amdgpu_device * adev) gfx_v11_0_cp_compute_load_microcode_rs64() argument
4120 struct amdgpu_device *adev = ring->adev; gfx_v11_0_kiq_setting() local
4129 gfx_v11_0_cp_set_doorbell_range(struct amdgpu_device * adev) gfx_v11_0_cp_set_doorbell_range() argument
4144 gfx_v11_0_gfx_mqd_set_priority(struct amdgpu_device * adev,struct v11_gfx_mqd * mqd,struct amdgpu_mqd_prop * prop) gfx_v11_0_gfx_mqd_set_priority() argument
4162 gfx_v11_0_gfx_mqd_init(struct amdgpu_device * adev,void * m,struct amdgpu_mqd_prop * prop) gfx_v11_0_gfx_mqd_init() argument
4261 struct amdgpu_device *adev = ring->adev; gfx_v11_0_kgq_init_queue() local
4287 gfx_v11_0_cp_async_gfx_ring_resume(struct amdgpu_device * adev) gfx_v11_0_cp_async_gfx_ring_resume() argument
4304 gfx_v11_0_compute_mqd_set_cu_mask(struct amdgpu_device * adev,struct v11_compute_mqd * mqd,struct amdgpu_mqd_prop * prop) gfx_v11_0_compute_mqd_set_cu_mask() argument
4335 gfx_v11_0_compute_mqd_init(struct amdgpu_device * adev,void * m,struct amdgpu_mqd_prop * prop) gfx_v11_0_compute_mqd_init() argument
4482 struct amdgpu_device *adev = ring->adev; gfx_v11_0_kiq_init_register() local
4592 struct amdgpu_device *adev = ring->adev; gfx_v11_0_kiq_init_queue() local
4631 struct amdgpu_device *adev = ring->adev; gfx_v11_0_kcq_init_queue() local
4658 gfx_v11_0_kiq_resume(struct amdgpu_device * adev) gfx_v11_0_kiq_resume() argument
4664 gfx_v11_0_kcq_resume(struct amdgpu_device * adev) gfx_v11_0_kcq_resume() argument
4680 gfx_v11_0_cp_resume(struct amdgpu_device * adev) gfx_v11_0_cp_resume() argument
4759 gfx_v11_0_cp_enable(struct amdgpu_device * adev,bool enable) gfx_v11_0_cp_enable() argument
4765 gfx_v11_0_gfxhub_enable(struct amdgpu_device * adev) gfx_v11_0_gfxhub_enable() argument
4786 gfx_v11_0_select_cp_fw_arch(struct amdgpu_device * adev) gfx_v11_0_select_cp_fw_arch() argument
4805 get_gb_addr_config(struct amdgpu_device * adev) get_gb_addr_config() argument
4841 gfx_v11_0_disable_gpa_mode(struct amdgpu_device * adev) gfx_v11_0_disable_gpa_mode() argument
4854 gfx_v11_0_set_userq_eop_interrupts(struct amdgpu_device * adev,bool enable) gfx_v11_0_set_userq_eop_interrupts() argument
4929 struct amdgpu_device *adev = ip_block->adev; gfx_v11_0_hw_init() local
5052 struct amdgpu_device *adev = ip_block->adev; gfx_v11_0_hw_fini() local
5104 struct amdgpu_device *adev = ip_block->adev; gfx_v11_0_is_idle() local
5117 struct amdgpu_device *adev = ip_block->adev; gfx_v11_0_wait_for_idle() local
5131 gfx_v11_0_request_gfx_index_mutex(struct amdgpu_device * adev,bool req) gfx_v11_0_request_gfx_index_mutex() argument
5168 struct amdgpu_device *adev = ip_block->adev; gfx_v11_0_soft_reset() local
5301 gfx_v11_0_get_gpu_clock_counter(struct amdgpu_device * adev) gfx_v11_0_get_gpu_clock_counter() argument
5352 struct amdgpu_device *adev = ring->adev; gfx_v11_0_ring_emit_gds_switch() local
5377 struct amdgpu_device *adev = ip_block->adev; gfx_v11_0_early_init() local
5434 gfx_v11_0_is_rlc_enabled(struct amdgpu_device * adev) gfx_v11_0_is_rlc_enabled() argument
5443 gfx_v11_0_set_safe_mode(struct amdgpu_device * adev,int xcc_id) gfx_v11_0_set_safe_mode() argument
5462 gfx_v11_0_unset_safe_mode(struct amdgpu_device * adev,int xcc_id) gfx_v11_0_unset_safe_mode() argument
5467 gfx_v11_0_update_perf_clk(struct amdgpu_device * adev,bool enable) gfx_v11_0_update_perf_clk() argument
5486 gfx_v11_0_update_sram_fgcg(struct amdgpu_device * adev,bool enable) gfx_v11_0_update_sram_fgcg() argument
5505 gfx_v11_0_update_repeater_fgcg(struct amdgpu_device * adev,bool enable) gfx_v11_0_update_repeater_fgcg() argument
5524 gfx_v11_0_update_medium_grain_clock_gating(struct amdgpu_device * adev,bool enable) gfx_v11_0_update_medium_grain_clock_gating() argument
5559 gfx_v11_0_update_coarse_grain_clock_gating(struct amdgpu_device * adev,bool enable) gfx_v11_0_update_coarse_grain_clock_gating() argument
5687 gfx_v11_0_update_gfx_clock_gating(struct amdgpu_device * adev,bool enable) gfx_v11_0_update_gfx_clock_gating() argument
5715 gfx_v11_0_update_spm_vmid(struct amdgpu_device * adev,int xcc_id,struct amdgpu_ring * ring,unsigned vmid) gfx_v11_0_update_spm_vmid() argument
5761 gfx_v11_cntl_power_gating(struct amdgpu_device * adev,bool enable) gfx_v11_cntl_power_gating() argument
5793 gfx_v11_cntl_pg(struct amdgpu_device * adev,bool enable) gfx_v11_cntl_pg() argument
5805 struct amdgpu_device *adev = ip_block->adev; gfx_v11_0_set_powergating_state() local
5846 struct amdgpu_device *adev = ip_block->adev; gfx_v11_0_set_clockgating_state() local
5877 struct amdgpu_device *adev = ip_block->adev; gfx_v11_0_get_clockgating_state() local
5924 struct amdgpu_device *adev = ring->adev; gfx_v11_0_ring_get_wptr_gfx() local
5940 struct amdgpu_device *adev = ring->adev; gfx_v11_0_ring_set_wptr_gfx() local
5963 struct amdgpu_device *adev = ring->adev; gfx_v11_0_ring_get_wptr_compute() local
5978 struct amdgpu_device *adev = ring->adev; gfx_v11_0_ring_set_wptr_compute() local
5992 struct amdgpu_device *adev = ring->adev; gfx_v11_0_ring_emit_hdp_flush() local
6153 struct amdgpu_device *adev = ring->adev; gfx_v11_0_ring_emit_fence_kiq() local
6216 struct amdgpu_device *adev = ring->adev; gfx_v11_0_ring_emit_gfx_shadow() local
6304 struct amdgpu_device *adev = ring->adev; gfx_v11_0_ring_emit_de_meta() local
6350 struct amdgpu_device *adev = ring->adev; gfx_v11_0_ring_emit_rreg() local
6404 gfx_v11_0_set_gfx_eop_interrupt_state(struct amdgpu_device * adev,uint32_t me,uint32_t pipe,enum amdgpu_interrupt_state state) gfx_v11_0_set_gfx_eop_interrupt_state() argument
6449 gfx_v11_0_set_compute_eop_interrupt_state(struct amdgpu_device * adev,int me,int pipe,enum amdgpu_interrupt_state state) gfx_v11_0_set_compute_eop_interrupt_state() argument
6506 gfx_v11_0_set_eop_interrupt_state(struct amdgpu_device * adev,struct amdgpu_irq_src * src,unsigned type,enum amdgpu_interrupt_state state) gfx_v11_0_set_eop_interrupt_state() argument
6536 gfx_v11_0_eop_irq(struct amdgpu_device * adev,struct amdgpu_irq_src * source,struct amdgpu_iv_entry * entry) gfx_v11_0_eop_irq() argument
6596 gfx_v11_0_set_priv_reg_fault_state(struct amdgpu_device * adev,struct amdgpu_irq_src * source,unsigned int type,enum amdgpu_interrupt_state state) gfx_v11_0_set_priv_reg_fault_state() argument
6642 gfx_v11_0_set_bad_op_fault_state(struct amdgpu_device * adev,struct amdgpu_irq_src * source,unsigned type,enum amdgpu_interrupt_state state) gfx_v11_0_set_bad_op_fault_state() argument
6687 gfx_v11_0_set_priv_inst_fault_state(struct amdgpu_device * adev,struct amdgpu_irq_src * source,unsigned int type,enum amdgpu_interrupt_state state) gfx_v11_0_set_priv_inst_fault_state() argument
6726 struct amdgpu_device *adev = gfx_v11_0_userq_priv_fault_work() local
6753 gfx_v11_0_handle_priv_fault(struct amdgpu_device * adev,struct amdgpu_iv_entry * entry) gfx_v11_0_handle_priv_fault() argument
6765 gfx_v11_0_priv_reg_irq(struct amdgpu_device * adev,struct amdgpu_irq_src * source,struct amdgpu_iv_entry * entry) gfx_v11_0_priv_reg_irq() argument
6774 gfx_v11_0_bad_op_irq(struct amdgpu_device * adev,struct amdgpu_irq_src * source,struct amdgpu_iv_entry * entry) gfx_v11_0_bad_op_irq() argument
6783 gfx_v11_0_priv_inst_irq(struct amdgpu_device * adev,struct amdgpu_irq_src * source,struct amdgpu_iv_entry * entry) gfx_v11_0_priv_inst_irq() argument
6792 gfx_v11_0_rlc_gc_fed_irq(struct amdgpu_device * adev,struct amdgpu_irq_src * source,struct amdgpu_iv_entry * entry) gfx_v11_0_rlc_gc_fed_irq() argument
6873 struct amdgpu_device *adev = ring->adev; gfx_v11_0_reset_kgq() local
6883 struct amdgpu_device *adev = ring->adev; gfx_v11_0_reset_kcq() local
6890 struct amdgpu_device *adev = ip_block->adev; gfx_v11_ip_print() local
6959 struct amdgpu_device *adev = ip_block->adev; gfx_v11_ip_dump() local
7196 gfx_v11_0_set_ring_funcs(struct amdgpu_device * adev) gfx_v11_0_set_ring_funcs() argument
7233 gfx_v11_0_set_irq_funcs(struct amdgpu_device * adev) gfx_v11_0_set_irq_funcs() argument
7252 gfx_v11_0_set_imu_funcs(struct amdgpu_device * adev) gfx_v11_0_set_imu_funcs() argument
7262 gfx_v11_0_set_rlc_funcs(struct amdgpu_device * adev) gfx_v11_0_set_rlc_funcs() argument
7267 gfx_v11_0_set_gds_init(struct amdgpu_device * adev) gfx_v11_0_set_gds_init() argument
7279 gfx_v11_0_set_mqd_funcs(struct amdgpu_device * adev) gfx_v11_0_set_mqd_funcs() argument
7293 gfx_v11_0_set_user_wgp_inactive_bitmap_per_sh(struct amdgpu_device * adev,u32 bitmap) gfx_v11_0_set_user_wgp_inactive_bitmap_per_sh() argument
7307 gfx_v11_0_get_wgp_active_bitmap_per_sh(struct amdgpu_device * adev) gfx_v11_0_get_wgp_active_bitmap_per_sh() argument
7322 gfx_v11_0_get_cu_active_bitmap_per_sh(struct amdgpu_device * adev) gfx_v11_0_get_cu_active_bitmap_per_sh() argument
7340 gfx_v11_0_get_cu_info(struct amdgpu_device * adev,struct amdgpu_cu_info * cu_info) gfx_v11_0_get_cu_info() argument
[all...] |
| H A D | vce_v1_0.c | 51 static void vce_v1_0_set_ring_funcs(struct amdgpu_device *adev);
52 static void vce_v1_0_set_irq_funcs(struct amdgpu_device *adev);
75 struct amdgpu_device *adev = ring->adev; in vce_v1_0_ring_get_rptr() local
92 struct amdgpu_device *adev = ring->adev; in vce_v1_0_ring_get_wptr() local
109 struct amdgpu_device *adev = ring->adev; in vce_v1_0_ring_set_wptr() local
117 static int vce_v1_0_lmi_clean(struct amdgpu_device *adev) in vce_v1_0_lmi_clean() argument
133 static int vce_v1_0_firmware_loaded(struct amdgpu_device *adev) in vce_v1_0_firmware_loaded() argument
144 dev_err(adev->dev, "VCE not responding, trying to reset the ECPU\n"); in vce_v1_0_firmware_loaded()
158 static void vce_v1_0_init_cg(struct amdgpu_device *adev) in vce_v1_0_init_cg() argument
189 static int vce_v1_0_load_fw(struct amdgpu_device *adev) in vce_v1_0_load_fw() argument
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| H A D | gfx_v12_1.c | 193 static void gfx_v12_1_xcc_disable_gpa_mode(struct amdgpu_device *adev, int xcc_id);
194 static void gfx_v12_1_set_ring_funcs(struct amdgpu_device *adev);
195 static void gfx_v12_1_set_irq_funcs(struct amdgpu_device *adev);
196 static void gfx_v12_1_set_rlc_funcs(struct amdgpu_device *adev);
197 static void gfx_v12_1_set_mqd_funcs(struct amdgpu_device *adev);
198 static void gfx_v12_1_set_imu_funcs(struct amdgpu_device *adev);
199 static int gfx_v12_1_get_cu_info(struct amdgpu_device *adev,
201 static uint64_t gfx_v12_1_get_gpu_clock_counter(struct amdgpu_device *adev);
202 static void gfx_v12_1_xcc_select_se_sh(struct amdgpu_device *adev, u32 se_num,
206 static int gfx_v12_1_wait_for_rlc_autoload_complete(struct amdgpu_device *adev);
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| H A D | jpeg_v4_0_5.c | 65 static void jpeg_v4_0_5_set_dec_ring_funcs(struct amdgpu_device *adev);
66 static void jpeg_v4_0_5_set_irq_funcs(struct amdgpu_device *adev);
87 struct amdgpu_device *adev = ip_block->adev; in jpeg_v4_0_5_early_init() local
89 switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) { in jpeg_v4_0_5_early_init()
91 adev->jpeg.num_jpeg_inst = 1; in jpeg_v4_0_5_early_init()
94 adev->jpeg.num_jpeg_inst = 2; in jpeg_v4_0_5_early_init()
97 DRM_DEV_ERROR(adev->dev, in jpeg_v4_0_5_early_init()
99 amdgpu_ip_version(adev, UVD_HWIP, 0)); in jpeg_v4_0_5_early_init()
103 adev->jpeg.num_jpeg_rings = 1; in jpeg_v4_0_5_early_init()
105 jpeg_v4_0_5_set_dec_ring_funcs(adev); in jpeg_v4_0_5_early_init()
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| H A D | vega20_reg_init.c | 29 int vega20_reg_base_init(struct amdgpu_device *adev) in vega20_reg_base_init() argument
34 adev->reg_offset[GC_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); in vega20_reg_base_init()
35 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in vega20_reg_base_init()
36 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); in vega20_reg_base_init()
37 adev->reg_offset[ATHUB_HWIP][i] = (uint32_t *)(&(ATHUB_BASE.instance[i])); in vega20_reg_base_init()
38 adev->reg_offset[NBIO_HWIP][i] = (uint32_t *)(&(NBIO_BASE.instance[i])); in vega20_reg_base_init()
39 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in vega20_reg_base_init()
40 adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i])); in vega20_reg_base_init()
41 adev->reg_offset[UVD_HWIP][i] = (uint32_t *)(&(UVD_BASE.instance[i])); in vega20_reg_base_init()
42 adev->reg_offset[VCE_HWIP][i] = (uint32_t *)(&(VCE_BASE.instance[i])); in vega20_reg_base_init()
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| H A D | vega10_reg_init.c | 29 int vega10_reg_base_init(struct amdgpu_device *adev) in vega10_reg_base_init() argument
34 adev->reg_offset[GC_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); in vega10_reg_base_init()
35 adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); in vega10_reg_base_init()
36 adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); in vega10_reg_base_init()
37 adev->reg_offset[ATHUB_HWIP][i] = (uint32_t *)(&(ATHUB_BASE.instance[i])); in vega10_reg_base_init()
38 adev->reg_offset[NBIO_HWIP][i] = (uint32_t *)(&(NBIO_BASE.instance[i])); in vega10_reg_base_init()
39 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in vega10_reg_base_init()
40 adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i])); in vega10_reg_base_init()
41 adev->reg_offset[UVD_HWIP][i] = (uint32_t *)(&(UVD_BASE.instance[i])); in vega10_reg_base_init()
42 adev->reg_offset[VCE_HWIP][i] = (uint32_t *)(&(VCE_BASE.instance[i])); in vega10_reg_base_init()
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| /linux/drivers/gpu/drm/amd/pm/ |
| H A D | amdgpu_dpm.c | 36 #define amdgpu_dpm_notify_ac_dc(adev) \ argument
37 ((adev)->powerplay.pp_funcs->notify_ac_dc((adev)->powerplay.pp_handle))
39 #define amdgpu_dpm_is_legacy_dpm(adev) ((adev)->powerplay.pp_handle == (adev)) argument
41 int amdgpu_dpm_get_sclk(struct amdgpu_device *adev, bool low) in amdgpu_dpm_get_sclk() argument
43 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_sclk()
49 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_get_sclk()
50 ret = pp_funcs->get_sclk((adev)->powerplay.pp_handle, in amdgpu_dpm_get_sclk()
52 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_get_sclk()
57 int amdgpu_dpm_get_mclk(struct amdgpu_device *adev, bool low) in amdgpu_dpm_get_mclk() argument
59 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_mclk()
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| /linux/sound/soc/intel/avs/ |
| H A D | loader.c | 103 static int avs_fw_manifest_strip_verify(struct avs_dev *adev, struct firmware *fw, in avs_fw_manifest_strip_verify()
127 dev_warn(adev->dev, "bad FW version %d.%d.%d.%d, expected %d.%d.%d.%d or newer\n", in avs_fw_manifest_strip_verify()
139 int avs_cldma_load_basefw(struct avs_dev *adev, struct firmware *fw) in avs_cldma_load_basefw()
145 ret = avs_dsp_op(adev, power, AVS_MAIN_CORE_MASK, true); in avs_cldma_load_basefw()
149 ret = avs_dsp_op(adev, reset, AVS_MAIN_CORE_MASK, false); in avs_cldma_load_basefw()
155 dev_err(adev->dev, "cldma reset failed: %d\n", ret); in avs_cldma_load_basefw()
160 ret = avs_dsp_op(adev, stall, AVS_MAIN_CORE_MASK, false); in avs_cldma_load_basefw()
164 reinit_completion(&adev->fw_ready); in avs_cldma_load_basefw()
165 avs_dsp_op(adev, int_control, true); in avs_cldma_load_basefw()
168 ret = snd_hdac_adsp_readl_poll(adev, AVS_FW_REG_STATU in avs_cldma_load_basefw()
102 avs_fw_manifest_strip_verify(struct avs_dev * adev,struct firmware * fw,const struct avs_fw_version * min) avs_fw_manifest_strip_verify() argument
138 avs_cldma_load_basefw(struct avs_dev * adev,struct firmware * fw) avs_cldma_load_basefw() argument
194 avs_cldma_load_library(struct avs_dev * adev,struct firmware * lib,u32 id) avs_cldma_load_library() argument
215 avs_cldma_load_module(struct avs_dev * adev,struct avs_module_entry * mentry) avs_cldma_load_module() argument
254 avs_cldma_transfer_modules(struct avs_dev * adev,bool load,struct avs_module_entry * mods,u32 num_mods) avs_cldma_transfer_modules() argument
287 avs_hda_init_rom(struct avs_dev * adev,unsigned int dma_id,bool purge) avs_hda_init_rom() argument
338 avs_imr_load_basefw(struct avs_dev * adev) avs_imr_load_basefw() argument
360 avs_hda_load_basefw(struct avs_dev * adev,struct firmware * fw) avs_hda_load_basefw() argument
428 avs_hda_load_library(struct avs_dev * adev,struct firmware * lib,u32 id) avs_hda_load_library() argument
479 avs_hda_transfer_modules(struct avs_dev * adev,bool load,struct avs_module_entry * mods,u32 num_mods) avs_hda_transfer_modules() argument
489 avs_dsp_load_libraries(struct avs_dev * adev,struct avs_tplg_library * libs,u32 num_libs) avs_dsp_load_libraries() argument
554 avs_dsp_load_basefw(struct avs_dev * adev) avs_dsp_load_basefw() argument
607 avs_load_firmware(struct avs_dev * adev,bool purge) avs_load_firmware() argument
661 avs_config_basefw(struct avs_dev * adev) avs_config_basefw() argument
674 avs_dsp_boot_firmware(struct avs_dev * adev,bool purge) avs_dsp_boot_firmware() argument
685 avs_dsp_alloc_resources(struct avs_dev * adev) avs_dsp_alloc_resources() argument
726 avs_dsp_first_boot_firmware(struct avs_dev * adev) avs_dsp_first_boot_firmware() argument
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| H A D | utils.c | 16 /* Caller responsible for holding adev->modres_mutex. */ in avs_module_entry_index() argument
17 static int avs_module_entry_index(struct avs_dev *adev, const guid_t *uuid) in avs_module_entry_index()
21 for (i = 0; i < adev->mods_info->count; i++) { in avs_module_entry_index()
24 module = &adev->mods_info->entries[i]; in avs_module_entry_index()
32 /* Caller responsible for holding adev->modres_mutex. */ in avs_module_id_entry_index() argument
33 static int avs_module_id_entry_index(struct avs_dev *adev, u32 module_id) in avs_module_id_entry_index()
37 for (i = 0; i < adev->mods_info->count; i++) { in avs_module_id_entry_index()
40 module = &adev->mods_info->entries[i]; in avs_module_id_entry_index()
48 int avs_get_module_entry(struct avs_dev *adev, const guid_t *uuid, struct avs_module_entry *entry) in avs_get_module_entry()
52 guard(mutex)(&adev in avs_get_module_entry()
47 avs_get_module_entry(struct avs_dev * adev,const guid_t * uuid,struct avs_module_entry * entry) avs_get_module_entry() argument
61 avs_get_module_id_entry(struct avs_dev * adev,u32 module_id,struct avs_module_entry * entry) avs_get_module_id_entry() argument
75 avs_get_module_id(struct avs_dev * adev,const guid_t * uuid) avs_get_module_id() argument
84 avs_is_module_ida_empty(struct avs_dev * adev,u32 module_id) avs_is_module_ida_empty() argument
100 avs_module_ida_destroy(struct avs_dev * adev) avs_module_ida_destroy() argument
113 avs_module_ida_alloc(struct avs_dev * adev,struct avs_mods_info * newinfo,bool purge) avs_module_ida_alloc() argument
157 avs_module_info_init(struct avs_dev * adev,bool purge) avs_module_info_init() argument
183 avs_module_info_free(struct avs_dev * adev) avs_module_info_free() argument
194 avs_module_id_alloc(struct avs_dev * adev,u16 module_id) avs_module_id_alloc() argument
213 avs_module_id_free(struct avs_dev * adev,u16 module_id,u8 instance_id) avs_module_id_free() argument
235 avs_request_firmware(struct avs_dev * adev,const struct firmware ** fw_p,const char * name) avs_request_firmware() argument
277 avs_release_last_firmware(struct avs_dev * adev) avs_release_last_firmware() argument
292 avs_release_firmwares(struct avs_dev * adev) avs_release_firmwares() argument
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/tests/ |
| H A D | amdgpu_dm_irq_test.c | 199 static void dm_test_dmub_notify_callback(struct amdgpu_device *adev, in dm_test_dmub_notify_callback() argument
312 struct amdgpu_device *adev = data; in dm_test_free_irq_sources() local
316 kfree(adev->irq.client[i].sources); in dm_test_free_irq_sources()
317 adev->irq.client[i].sources = NULL; in dm_test_free_irq_sources()
320 kfree(adev->crtc_irq.enabled_types); in dm_test_free_irq_sources()
321 adev->crtc_irq.enabled_types = NULL; in dm_test_free_irq_sources()
322 kfree(adev->vline0_irq.enabled_types); in dm_test_free_irq_sources()
323 adev->vline0_irq.enabled_types = NULL; in dm_test_free_irq_sources()
324 kfree(adev->vupdate_irq.enabled_types); in dm_test_free_irq_sources()
325 adev->vupdate_irq.enabled_types = NULL; in dm_test_free_irq_sources()
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