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/linux/drivers/clk/sunxi-ng/
H A Dccu_mux.h32 #define _SUNXI_CCU_MUX_TABLE(_shift, _width, _table) \ argument
34 .shift = _shift, \
39 #define _SUNXI_CCU_MUX(_shift, _width) \ argument
40 _SUNXI_CCU_MUX_TABLE(_shift, _width, NULL)
50 _reg, _shift, _width, _gate, \ argument
54 .mux = _SUNXI_CCU_MUX_TABLE(_shift, _width, _table), \
66 _table, _reg, _shift, \ argument
69 _table, _reg, _shift, \
74 _reg, _shift, _width, _gate, \ argument
77 _table, _reg, _shift, \
[all …]
H A Dccu_div.h43 #define _SUNXI_CCU_DIV_TABLE_FLAGS(_shift, _width, _table, _flags) \ argument
45 .shift = _shift, \
51 #define _SUNXI_CCU_DIV_TABLE(_shift, _width, _table) \ argument
52 _SUNXI_CCU_DIV_TABLE_FLAGS(_shift, _width, _table, 0)
54 #define _SUNXI_CCU_DIV_OFFSET_MAX_FLAGS(_shift, _width, _off, _max, _flags) \ argument
56 .shift = _shift, \
63 #define _SUNXI_CCU_DIV_MAX_FLAGS(_shift, _width, _max, _flags) \ argument
64 _SUNXI_CCU_DIV_OFFSET_MAX_FLAGS(_shift, _width, 1, _max, _flags)
66 #define _SUNXI_CCU_DIV_FLAGS(_shift, _width, _flags) \ argument
67 _SUNXI_CCU_DIV_MAX_FLAGS(_shift, _width, 0, _flags)
[all …]
H A Dccu_mult.h17 #define _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, _min, _max) \ argument
22 .shift = _shift, \
26 #define _SUNXI_CCU_MULT_MIN(_shift, _width, _min) \ argument
27 _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, 1, _min, 0)
29 #define _SUNXI_CCU_MULT_OFFSET(_shift, _width, _offset) \ argument
30 _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, 1, 0)
32 #define _SUNXI_CCU_MULT(_shift, _width) \ argument
33 _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, 1, 1, 0)
/linux/drivers/iio/dac/
H A Dad5686.c191 #define AD5868_CHANNEL(chan, addr, bits, _shift) { \ argument
203 .shift = (_shift), \
208 #define DECLARE_AD5693_CHANNELS(name, bits, _shift) \ argument
210 AD5868_CHANNEL(0, 0, bits, _shift), \
213 #define DECLARE_AD5338_CHANNELS(name, bits, _shift) \ argument
215 AD5868_CHANNEL(0, 1, bits, _shift), \
216 AD5868_CHANNEL(1, 8, bits, _shift), \
219 #define DECLARE_AD5686_CHANNELS(name, bits, _shift) \ argument
221 AD5868_CHANNEL(0, 1, bits, _shift), \
222 AD5868_CHANNEL(1, 2, bits, _shift), \
[all …]
/linux/drivers/clk/mediatek/
H A Dclk-mt8188-infra_ao.c45 #define GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
46 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao0_cg_regs, _shift, \
49 #define GATE_INFRA_AO0(_id, _name, _parent, _shift) \ argument
50 GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, 0)
52 #define GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
53 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao1_cg_regs, _shift, \
56 #define GATE_INFRA_AO1(_id, _name, _parent, _shift) \ argument
57 GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, 0)
59 #define GATE_INFRA_AO2(_id, _name, _parent, _shift) \ argument
60 GATE_MTK(_id, _name, _parent, &infra_ao2_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
[all …]
H A Dclk-mt8195-infra_ao.c44 #define GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
45 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao0_cg_regs, _shift, \
48 #define GATE_INFRA_AO0(_id, _name, _parent, _shift) \ argument
49 GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, 0)
51 #define GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
52 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao1_cg_regs, _shift, \
55 #define GATE_INFRA_AO1(_id, _name, _parent, _shift) \ argument
56 GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, 0)
58 #define GATE_INFRA_AO2_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
59 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao2_cg_regs, _shift, \
[all …]
H A Dclk-mux.h43 _mux_clr_ofs, _shift, _width, _gate, _upd_ofs, \ argument
51 .mux_shift = _shift, \
63 _mux_set_ofs, _mux_clr_ofs, _shift, _width, \ argument
67 _mux_set_ofs, _mux_clr_ofs, _shift, _width, \
71 _mux_ofs, _mux_set_ofs, _mux_clr_ofs, _shift, \ argument
75 _mux_set_ofs, _mux_clr_ofs, _shift, _width, \
82 _mux_set_ofs, _mux_clr_ofs, _shift, _width, \ argument
85 _mux_set_ofs, _mux_clr_ofs, _shift, _width, \
91 _shift, _width, _gate, _upd_ofs, _upd, _flags) \ argument
94 _shift, _width, _gate, _upd_ofs, _upd, _flags, \
[all …]
H A Dclk-mt8186-infra_ao.c38 #define GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
39 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao0_cg_regs, _shift, \
42 #define GATE_INFRA_AO0(_id, _name, _parent, _shift) \ argument
43 GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, 0)
45 #define GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
46 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao1_cg_regs, _shift, \
49 #define GATE_INFRA_AO1(_id, _name, _parent, _shift) \ argument
50 GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, 0)
52 #define GATE_INFRA_AO2_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
53 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao2_cg_regs, _shift, \
[all …]
H A Dclk-mt8183-ipu_conn.c44 #define GATE_IPU_CONN(_id, _name, _parent, _shift) \ argument
45 GATE_MTK(_id, _name, _parent, &ipu_conn_cg_regs, _shift, \
48 #define GATE_IPU_CONN_APB(_id, _name, _parent, _shift) \ argument
49 GATE_MTK(_id, _name, _parent, &ipu_conn_apb_cg_regs, _shift, \
52 #define GATE_IPU_CONN_AXI_I(_id, _name, _parent, _shift) \ argument
53 GATE_MTK(_id, _name, _parent, &ipu_conn_axi_cg_regs, _shift, \
56 #define GATE_IPU_CONN_AXI1_I(_id, _name, _parent, _shift) \ argument
57 GATE_MTK(_id, _name, _parent, &ipu_conn_axi1_cg_regs, _shift, \
60 #define GATE_IPU_CONN_AXI2_I(_id, _name, _parent, _shift) \ argument
61 GATE_MTK(_id, _name, _parent, &ipu_conn_axi2_cg_regs, _shift, \
H A Dclk-mt8195-vdo1.c43 #define GATE_VDO1_0(_id, _name, _parent, _shift) \ argument
44 GATE_MTK(_id, _name, _parent, &vdo1_0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
46 #define GATE_VDO1_1(_id, _name, _parent, _shift) \ argument
47 GATE_MTK(_id, _name, _parent, &vdo1_1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
49 #define GATE_VDO1_2(_id, _name, _parent, _shift) \ argument
50 GATE_MTK(_id, _name, _parent, &vdo1_2_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
52 #define GATE_VDO1_2_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
53 GATE_MTK_FLAGS(_id, _name, _parent, &vdo1_2_cg_regs, _shift, \
56 #define GATE_VDO1_3(_id, _name, _parent, _shift) \ argument
57 GATE_MTK(_id, _name, _parent, &vdo1_3_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
[all …]
H A Dclk-mt7988-infracfg.c128 #define GATE_INFRA0_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
129 GATE_MTK_FLAGS(_id, _name, _parent, &infra0_cg_regs, _shift, &mtk_clk_gate_ops_setclr, \
132 #define GATE_INFRA1_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
133 GATE_MTK_FLAGS(_id, _name, _parent, &infra1_cg_regs, _shift, &mtk_clk_gate_ops_setclr, \
136 #define GATE_INFRA2_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
137 GATE_MTK_FLAGS(_id, _name, _parent, &infra2_cg_regs, _shift, &mtk_clk_gate_ops_setclr, \
140 #define GATE_INFRA3_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
141 GATE_MTK_FLAGS(_id, _name, _parent, &infra3_cg_regs, _shift, &mtk_clk_gate_ops_setclr, \
144 #define GATE_INFRA0(_id, _name, _parent, _shift) GATE_INFRA0_FLAGS(_id, _name, _parent, _shift, 0) argument
146 #define GATE_INFRA1(_id, _name, _parent, _shift) GATE_INFRA1_FLAGS(_id, _name, _parent, _shift, 0) argument
[all …]
H A Dclk-mt8188-vdo1.c46 #define GATE_VDO1_0(_id, _name, _parent, _shift) \ argument
47 GATE_MTK(_id, _name, _parent, &vdo1_0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
49 #define GATE_VDO1_1(_id, _name, _parent, _shift) \ argument
50 GATE_MTK(_id, _name, _parent, &vdo1_1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
52 #define GATE_VDO1_2(_id, _name, _parent, _shift) \ argument
53 GATE_MTK(_id, _name, _parent, &vdo1_2_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
55 #define GATE_VDO1_3(_id, _name, _parent, _shift) \ argument
56 GATE_MTK(_id, _name, _parent, &vdo1_3_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
58 #define GATE_VDO1_3_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
59 GATE_MTK_FLAGS(_id, _name, _parent, &vdo1_3_cg_regs, _shift, \
[all …]
H A Dclk-mt8186-vdec.c39 #define GATE_VDEC0(_id, _name, _parent, _shift) \ argument
40 GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
42 #define GATE_VDEC1(_id, _name, _parent, _shift) \ argument
43 GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
45 #define GATE_VDEC2(_id, _name, _parent, _shift) \ argument
46 GATE_MTK(_id, _name, _parent, &vdec2_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
48 #define GATE_VDEC3(_id, _name, _parent, _shift) \ argument
49 GATE_MTK(_id, _name, _parent, &vdec3_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
H A Dclk-mt8188-vdo0.c34 #define GATE_VDO0_0(_id, _name, _parent, _shift) \ argument
35 GATE_MTK(_id, _name, _parent, &vdo0_0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
37 #define GATE_VDO0_1(_id, _name, _parent, _shift) \ argument
38 GATE_MTK(_id, _name, _parent, &vdo0_1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
40 #define GATE_VDO0_2(_id, _name, _parent, _shift) \ argument
41 GATE_MTK(_id, _name, _parent, &vdo0_2_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
43 #define GATE_VDO0_2_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
44 GATE_MTK_FLAGS(_id, _name, _parent, &vdo0_2_cg_regs, _shift, \
H A Dclk-mtk.h112 #define MUX_GATE_FLAGS_2(_id, _name, _parents, _reg, _shift, \ argument
117 .mux_shift = _shift, \
132 #define MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \ argument
135 _shift, _width, _gate, _flags, 0)
141 #define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate) \ argument
142 MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
145 #define MUX(_id, _name, _parents, _reg, _shift, _width) \ argument
147 _shift, _width, CLK_SET_RATE_PARENT)
149 #define MUX_FLAGS(_id, _name, _parents, _reg, _shift, _width, _flags) { \ argument
153 .mux_shift = _shift, \
[all …]
H A Dclk-mt8167.c658 #define DIV_ADJ(_id, _name, _parent, _reg, _shift, _width) { \ argument
663 .div_shift = _shift, \
724 #define GATE_TOP0(_id, _name, _parent, _shift) \ argument
725 GATE_MTK(_id, _name, _parent, &top0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
727 #define GATE_TOP0_I(_id, _name, _parent, _shift) \ argument
728 GATE_MTK(_id, _name, _parent, &top0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
730 #define GATE_TOP1(_id, _name, _parent, _shift) \ argument
731 GATE_MTK(_id, _name, _parent, &top1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
733 #define GATE_TOP2(_id, _name, _parent, _shift) \ argument
734 GATE_MTK(_id, _name, _parent, &top2_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
[all …]
H A Dclk-mt8365.c542 #define DIV_ADJ_F(_id, _name, _parent, _reg, _shift, _width, _flags) { \ argument
547 .div_shift = _shift, \
591 #define GATE_TOP0(_id, _name, _parent, _shift) \ argument
593 _shift, &mtk_clk_gate_ops_no_setclr)
595 #define GATE_TOP1(_id, _name, _parent, _shift) \ argument
597 _shift, &mtk_clk_gate_ops_no_setclr_inv)
599 #define GATE_TOP2(_id, _name, _parent, _shift) \ argument
601 _shift, &mtk_clk_gate_ops_no_setclr_inv)
655 #define GATE_IFRX(_id, _name, _parent, _shift, _regs) \ argument
656 GATE_MTK(_id, _name, _parent, _regs, _shift, \
[all …]
H A Dclk-mt8195-vdo0.c31 #define GATE_VDO0_0(_id, _name, _parent, _shift) \ argument
32 GATE_MTK(_id, _name, _parent, &vdo0_0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
34 #define GATE_VDO0_1(_id, _name, _parent, _shift) \ argument
35 GATE_MTK(_id, _name, _parent, &vdo0_1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
37 #define GATE_VDO0_2(_id, _name, _parent, _shift) \ argument
38 GATE_MTK(_id, _name, _parent, &vdo0_2_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
40 #define GATE_VDO0_2_FLAGS(_id, _name, _parent, _shift, _flags) \ argument
41 GATE_MTK_FLAGS(_id, _name, _parent, &vdo0_2_cg_regs, _shift, \
H A Dclk-mt8192.c749 #define GATE_INFRA0(_id, _name, _parent, _shift) \ argument
750 GATE_MTK(_id, _name, _parent, &infra0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
752 #define GATE_INFRA1_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
753 GATE_MTK_FLAGS(_id, _name, _parent, &infra1_cg_regs, _shift, \
756 #define GATE_INFRA1(_id, _name, _parent, _shift) \ argument
757 GATE_INFRA1_FLAGS(_id, _name, _parent, _shift, 0)
759 #define GATE_INFRA2(_id, _name, _parent, _shift) \ argument
760 GATE_MTK(_id, _name, _parent, &infra2_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
762 #define GATE_INFRA3_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
763 GATE_MTK_FLAGS(_id, _name, _parent, &infra3_cg_regs, _shift, \
[all …]
H A Dclk-mt7622-aud.c19 #define GATE_AUDIO0(_id, _name, _parent, _shift) \ argument
20 GATE_MTK(_id, _name, _parent, &audio0_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
22 #define GATE_AUDIO1(_id, _name, _parent, _shift) \ argument
23 GATE_MTK(_id, _name, _parent, &audio1_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
25 #define GATE_AUDIO2(_id, _name, _parent, _shift) \ argument
26 GATE_MTK(_id, _name, _parent, &audio2_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
28 #define GATE_AUDIO3(_id, _name, _parent, _shift) \ argument
29 GATE_MTK(_id, _name, _parent, &audio3_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
H A Dclk-mt8516.c469 #define DIV_ADJ(_id, _name, _parent, _reg, _shift, _width) { \ argument
474 .div_shift = _shift, \
529 #define GATE_TOP1(_id, _name, _parent, _shift) \ argument
530 GATE_MTK(_id, _name, _parent, &top1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
532 #define GATE_TOP2(_id, _name, _parent, _shift) \ argument
533 GATE_MTK(_id, _name, _parent, &top2_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
535 #define GATE_TOP2_I(_id, _name, _parent, _shift) \ argument
536 GATE_MTK(_id, _name, _parent, &top2_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
538 #define GATE_TOP3(_id, _name, _parent, _shift) \ argument
539 GATE_MTK(_id, _name, _parent, &top3_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
[all …]
H A Dclk-mt2701-aud.c18 #define GATE_AUDIO0(_id, _name, _parent, _shift) \ argument
19 GATE_MTK(_id, _name, _parent, &audio0_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
21 #define GATE_AUDIO1(_id, _name, _parent, _shift) \ argument
22 GATE_MTK(_id, _name, _parent, &audio1_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
24 #define GATE_AUDIO2(_id, _name, _parent, _shift) \ argument
25 GATE_MTK(_id, _name, _parent, &audio2_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
27 #define GATE_AUDIO3(_id, _name, _parent, _shift) \ argument
28 GATE_MTK(_id, _name, _parent, &audio3_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
/linux/drivers/clk/sprd/
H A Dmux.h32 #define _SPRD_MUX_CLK(_shift, _width, _table) \ argument
34 .shift = _shift, \
40 _reg, _shift, _width, _flags, _fn) \ argument
42 .mux = _SPRD_MUX_CLK(_shift, _width, _table), \
52 _reg, _shift, _width, _flags) \ argument
54 _reg, _shift, _width, _flags, \
58 _shift, _width, _flags) \ argument
60 _reg, _shift, _width, _flags)
63 _reg, _shift, _width, _flags) \ argument
65 _reg, _shift, _width, _flags, \
[all …]
H A Ddiv.h28 #define _SPRD_DIV_CLK(_offset, _shift, _width) \ argument
31 .shift = _shift, \
41 _shift, _width, _flags, _fn) \ argument
43 .div = _SPRD_DIV_CLK(_offset, _shift, _width), \
53 _shift, _width, _flags) \ argument
55 _shift, _width, _flags, CLK_HW_INIT)
58 _shift, _width, _flags) \ argument
60 _shift, _width, _flags, CLK_HW_INIT_FW_NAME)
63 _shift, _width, _flags) \ argument
65 _shift, _width, _flags, CLK_HW_INIT_HW)
/linux/drivers/clk/actions/
H A Dowl-pll.h41 #define OWL_PLL_HW(_reg, _bfreq, _bit_idx, _shift, \ argument
47 .shift = _shift, \
56 _shift, _width, _min_mul, _max_mul, _table, _flags) \ argument
58 .pll_hw = OWL_PLL_HW(_reg, _bfreq, _bit_idx, _shift, \
71 _shift, _width, _min_mul, _max_mul, _table, _flags) \ argument
73 .pll_hw = OWL_PLL_HW(_reg, _bfreq, _bit_idx, _shift, \
85 _shift, _width, _min_mul, _max_mul, _delay, _table, \ argument
88 .pll_hw = OWL_PLL_HW(_reg, _bfreq, _bit_idx, _shift, \

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