Searched refs:_offs (Results 1 – 6 of 6) sorted by relevance
| /linux/drivers/media/platform/samsung/s3c-camif/ |
| H A D | camif-regs.h | 78 #define S3C_CAMIF_REG_CITRGFMT(id, _offs) (0x48 + (id) * (0x34 + (_offs))) argument
98 #define S3C_CAMIF_REG_CICTRL(id, _offs) (0x4c + (id) * (0x34 + (_offs))) argument
111 #define S3C_CAMIF_REG_CISCPRERATIO(id, _offs) (0x50 + (id) * (0x34 + (_offs))) argument
114 #define S3C_CAMIF_REG_CISCPREDST(id, _offs) (0x54 + (id) * (0x34 + (_offs))) argument
117 #define S3C_CAMIF_REG_CISCCTRL(id, _offs) (0x58 + (id) * (0x34 + (_offs))) argument
147 #define S3C_CAMIF_REG_CITAREA(id, _offs) (0x5c + (id) * (0x34 + (_offs))) argument
151 #define S3C_CAMIF_REG_CISTATUS(id, _offs) (0x64 + (id) * (0x34 + (_offs))) argument
167 #define S3C_CAMIF_REG_CIIMGCPT(_offs) (0xa0 + (_offs)) argument
179 #define S3C_CAMIF_REG_CIIMGEFF(_offs) (0xb0 + (_offs)) argument
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| /linux/drivers/gpu/drm/gma500/ |
| H A D | psb_drv.h | 725 #define PSB_WVDC32(_val, _offs) iowrite32(_val, dev_priv->vdc_reg + (_offs)) argument
726 #define PSB_RVDC32(_offs) ioread32(dev_priv->vdc_reg + (_offs)) argument
728 #define PSB_RSGX32(_offs) ioread32(dev_priv->sgx_reg + (_offs)) argument
729 #define PSB_WSGX32(_val, _offs) iowrite32(_val, dev_priv->sgx_reg + (_offs)) argument
731 #define PSB_WMSVDX32(_val, _offs) iowrite32(_val, dev_priv->msvdx_reg + (_offs)) argument
732 #define PSB_RMSVDX32(_offs) ioread32(dev_priv->msvdx_reg + (_offs)) argument
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| /linux/arch/s390/lib/ |
| H A D | test_kprobes_asm.S | 12 SYM_DATA(name##_offs, .quad 1b - name)
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| /linux/drivers/clk/rockchip/ |
| H A D | clk-rk3368.c | 185 #define RK3368_CLKSEL0(_offs, _aclkm) \ argument
187 .reg = RK3368_CLKSEL_CON(0 + _offs), \
191 #define RK3368_CLKSEL1(_offs, _atclk, _pdbg) \ argument
193 .reg = RK3368_CLKSEL_CON(1 + _offs), \
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| H A D | clk-rk3399.c | 322 #define RK3399_CLKSEL0(_offs, _aclkm) \ argument
324 .reg = RK3399_CLKSEL_CON(0 + _offs), \
328 #define RK3399_CLKSEL1(_offs, _atclk, _pdbg) \ argument
330 .reg = RK3399_CLKSEL_CON(1 + _offs), \
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| H A D | clk-rk3588.c | 180 #define RK3588_CORE_L_SEL0(_offs, _apllcore) \ argument
182 .reg = RK3588_DSU_CLKSEL_CON(6 + _offs), \
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