| /linux/drivers/clk/sophgo/ |
| H A D | clk-cv18xx-ip.h | 149 _mux_reg, _mux_shift, _mux_width, \ argument
160 _mux_width, 0, 0), \
166 _mux_reg, _mux_shift, _mux_width, _flags) \ argument
170 _div_flag, _mux_reg, _mux_shift, _mux_width,\
176 _mux_reg, _mux_shift, _mux_width, \ argument
183 _mux_reg, _mux_shift, _mux_width, \
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| /linux/drivers/clk/ |
| H A D | clk-stm32h7.c | 567 #define M_MCLOCF(_name, _parents, _mux_offset, _mux_shift, _mux_width, _flags)\ argument
574 .width = _mux_width,\
578 #define M_MCLOC(_name, _parents, _mux_offset, _mux_shift, _mux_width)\ argument
579 M_MCLOCF(_name, _parents, _mux_offset, _mux_shift, _mux_width, 0)\
1064 _mux_offset, _mux_shift, _mux_width,\ argument
1069 .mux = &(struct muxdiv_cfg) {_mux_offset, _mux_shift, _mux_width },\
1076 #define KER_CLK(_gate_offset, _bit_idx, _mux_offset, _mux_shift, _mux_width,\ argument
1078 KER_CLKF(_gate_offset, _bit_idx, _mux_offset, _mux_shift, _mux_width,\
1177 #define M_MCO_F(_name, _parents, _mux_offset, _mux_shift, _mux_width,\ argument
1181 .mux = &(struct muxdiv_cfg) {_mux_offset, _mux_shift, _mux_width },\
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| /linux/drivers/clk/tegra/ |
| H A D | clk.h | 707 _mux_shift, _mux_width, _mux_flags, _div_shift, \ argument
711 _mux_shift, BIT(_mux_width) - 1, _mux_flags, \
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| H A D | clk-tegra20.c | 150 _mux_shift, _mux_width, _clk_num, \ argument
153 _mux_shift, _mux_width, 0, 0, 0, 0, 0, \
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| H A D | clk-tegra30.c | 177 _mux_shift, _mux_width, _clk_num, \ argument
180 _mux_shift, _mux_width, 0, 0, 0, 0, 0,\
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