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Searched refs:_aclk_core (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/clk/rockchip/
H A Dclk-rk3328.c93 #define RK3328_CLKSEL1(_aclk_core, _pclk_dbg) \ argument
96 .val = HIWORD_UPDATE(_aclk_core, RK3328_DIV_ACLKM_MASK, \
102 #define RK3328_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
106 RK3328_CLKSEL1(_aclk_core, _pclk_dbg), \
H A Dclk-rk3308.c74 #define RK3308_CLKSEL0(_aclk_core, _pclk_dbg) \ argument
77 .val = HIWORD_UPDATE(_aclk_core, RK3308_DIV_ACLKM_MASK, \
83 #define RK3308_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
87 RK3308_CLKSEL0(_aclk_core, _pclk_dbg), \
H A Dclk-px30.c78 #define PX30_CLKSEL0(_aclk_core, _pclk_dbg) \ argument
81 .val = HIWORD_UPDATE(_aclk_core, PX30_DIV_ACLKM_MASK, \
87 #define PX30_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
91 PX30_CLKSEL0(_aclk_core, _pclk_dbg), \
H A Dclk-rv1126.c86 #define RV1126_CLKSEL1(_aclk_core, _pclk_dbg) \ argument
89 .val = HIWORD_UPDATE(_aclk_core, RV1126_DIV_ACLK_CORE_MASK, \
95 #define RV1126_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
99 RV1126_CLKSEL1(_aclk_core, _pclk_dbg), \
H A Dclk-rv1126b.c46 #define RV1126B_CLKSEL0(_aclk_core) \ argument
49 .val = HIWORD_UPDATE(_aclk_core - 1, RV1126B_DIV_ACLK_CORE_MASK, \
60 #define RV1126B_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
64 RV1126B_CLKSEL0(_aclk_core), \
H A Dclk-rk3568.c130 #define RK3568_CLKSEL2(_aclk_core) \ argument
133 .val = HIWORD_UPDATE(_aclk_core, RK3568_DIV_ACLK_CORE_MASK, \