xref: /linux/drivers/staging/media/atomisp/pci/css_2401_system/hrt/PixelGen_SysBlock_defs.h (revision 4b4193256c8d3bc3a5397b5cd9494c2ad386317d)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Support for Intel Camera Imaging ISP subsystem.
4  * Copyright (c) 2015, Intel Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  */
15 
16 #ifndef _PixelGen_SysBlock_defs_h
17 #define _PixelGen_SysBlock_defs_h
18 
19 /* Parematers and User_Parameters for HSS */
20 #define _PXG_PPC                       Ppc
21 #define _PXG_PIXEL_BITS                PixelWidth
22 #define _PXG_MAX_NOF_SID               MaxNofSids
23 #define _PXG_DATA_BITS                 DataWidth
24 #define _PXG_CNT_BITS                  CntWidth
25 #define _PXG_FIFODEPTH                 FifoDepth
26 #define _PXG_DBG                       Dbg_device_not_included
27 
28 /* ID's and Address */
29 #define _PXG_ADRRESS_ALIGN_REG         4
30 
31 #define _PXG_COM_ENABLE_REG_IDX        0
32 #define _PXG_PRBS_RSTVAL_REG0_IDX      1
33 #define _PXG_PRBS_RSTVAL_REG1_IDX      2
34 #define _PXG_SYNG_SID_REG_IDX          3
35 #define _PXG_SYNG_FREE_RUN_REG_IDX     4
36 #define _PXG_SYNG_PAUSE_REG_IDX        5
37 #define _PXG_SYNG_NOF_FRAME_REG_IDX    6
38 #define _PXG_SYNG_NOF_PIXEL_REG_IDX    7
39 #define _PXG_SYNG_NOF_LINE_REG_IDX     8
40 #define _PXG_SYNG_HBLANK_CYC_REG_IDX   9
41 #define _PXG_SYNG_VBLANK_CYC_REG_IDX  10
42 #define _PXG_SYNG_STAT_HCNT_REG_IDX   11
43 #define _PXG_SYNG_STAT_VCNT_REG_IDX   12
44 #define _PXG_SYNG_STAT_FCNT_REG_IDX   13
45 #define _PXG_SYNG_STAT_DONE_REG_IDX   14
46 #define _PXG_TPG_MODE_REG_IDX         15
47 #define _PXG_TPG_HCNT_MASK_REG_IDX    16
48 #define _PXG_TPG_VCNT_MASK_REG_IDX    17
49 #define _PXG_TPG_XYCNT_MASK_REG_IDX   18
50 #define _PXG_TPG_HCNT_DELTA_REG_IDX   19
51 #define _PXG_TPG_VCNT_DELTA_REG_IDX   20
52 #define _PXG_TPG_R1_REG_IDX           21
53 #define _PXG_TPG_G1_REG_IDX           22
54 #define _PXG_TPG_B1_REG_IDX           23
55 #define _PXG_TPG_R2_REG_IDX           24
56 #define _PXG_TPG_G2_REG_IDX           25
57 #define _PXG_TPG_B2_REG_IDX           26
58 /* */
59 #define _PXG_SYNG_PAUSE_CYCLES        0
60 /* Subblock ID's */
61 #define _PXG_DISABLE_IDX              0
62 #define _PXG_PRBS_IDX                 0
63 #define _PXG_TPG_IDX                  1
64 #define _PXG_SYNG_IDX                 2
65 #define _PXG_SMUX_IDX                 3
66 /* Register Widths */
67 #define _PXG_COM_ENABLE_REG_WIDTH     2
68 #define _PXG_COM_SRST_REG_WIDTH       4
69 #define _PXG_PRBS_RSTVAL_REG0_WIDTH  31
70 #define _PXG_PRBS_RSTVAL_REG1_WIDTH  31
71 
72 #define _PXG_SYNG_SID_REG_WIDTH        3
73 
74 #define _PXG_SYNG_FREE_RUN_REG_WIDTH   1
75 #define _PXG_SYNG_PAUSE_REG_WIDTH      1
76 /*
77 #define _PXG_SYNG_NOF_FRAME_REG_WIDTH  <sync_gen_cnt_width>
78 #define _PXG_SYNG_NOF_PIXEL_REG_WIDTH  <sync_gen_cnt_width>
79 #define _PXG_SYNG_NOF_LINE_REG_WIDTH   <sync_gen_cnt_width>
80 #define _PXG_SYNG_HBLANK_CYC_REG_WIDTH <sync_gen_cnt_width>
81 #define _PXG_SYNG_VBLANK_CYC_REG_WIDTH <sync_gen_cnt_width>
82 #define _PXG_SYNG_STAT_HCNT_REG_WIDTH  <sync_gen_cnt_width>
83 #define _PXG_SYNG_STAT_VCNT_REG_WIDTH  <sync_gen_cnt_width>
84 #define _PXG_SYNG_STAT_FCNT_REG_WIDTH  <sync_gen_cnt_width>
85 */
86 #define _PXG_SYNG_STAT_DONE_REG_WIDTH  1
87 #define _PXG_TPG_MODE_REG_WIDTH        2
88 /*
89 #define _PXG_TPG_HCNT_MASK_REG_WIDTH   <sync_gen_cnt_width>
90 #define _PXG_TPG_VCNT_MASK_REG_WIDTH   <sync_gen_cnt_width>
91 #define _PXG_TPG_XYCNT_MASK_REG_WIDTH  <pixle_width>
92 */
93 #define _PXG_TPG_HCNT_DELTA_REG_WIDTH  4
94 #define _PXG_TPG_VCNT_DELTA_REG_WIDTH  4
95 /*
96 #define _PXG_TPG_R1_REG_WIDTH          <pixle_width>
97 #define _PXG_TPG_G1_REG_WIDTH          <pixle_width>
98 #define _PXG_TPG_B1_REG_WIDTH          <pixle_width>
99 #define _PXG_TPG_R2_REG_WIDTH          <pixle_width>
100 #define _PXG_TPG_G2_REG_WIDTH          <pixle_width>
101 #define _PXG_TPG_B2_REG_WIDTH          <pixle_width>
102 */
103 #define _PXG_FIFO_DEPTH                2
104 /* MISC */
105 #define _PXG_ENABLE_REG_VAL            1
106 #define _PXG_PRBS_ENABLE_REG_VAL       1
107 #define _PXG_TPG_ENABLE_REG_VAL        2
108 #define _PXG_SYNG_ENABLE_REG_VAL       4
109 #define _PXG_FIFO_ENABLE_REG_VAL       8
110 #define _PXG_PXL_BITS                 14
111 #define _PXG_INVALID_FLAG              0xDEADBEEF
112 #define _PXG_CAFE_FLAG                 0xCAFEBABE
113 
114 #endif /* _PixelGen_SysBlock_defs_h */
115