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Searched refs:XE_WA (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/xe/
H A Dxe_guc.c148 if (XE_WA(gt, 22012773006)) in guc_ctl_wa_flags()
151 if (XE_WA(gt, 14014475959)) in guc_ctl_wa_flags()
154 if (XE_WA(gt, 22011391025)) in guc_ctl_wa_flags()
165 if (XE_WA(gt, 22012727170) || XE_WA(gt, 22012727685)) in guc_ctl_wa_flags()
168 if (XE_WA(gt, 18020744125) && in guc_ctl_wa_flags()
172 if (XE_WA(gt, 1509372804)) in guc_ctl_wa_flags()
175 if (XE_WA(gt, 14018913170)) in guc_ctl_wa_flags()
H A Dxe_guc_ads.c349 if (XE_WA(gt, 14019882105)) in guc_waklv_init()
353 if (XE_WA(gt, 18024947630)) in guc_waklv_init()
357 if (XE_WA(gt, 16022287689)) in guc_waklv_init()
362 if (XE_WA(gt, 14022866841)) in guc_waklv_init()
372 if (XE_WA(gt, 13011645652)) in guc_waklv_init()
378 if (XE_WA(gt, 14022293748) || XE_WA(gt, 22019794406)) in guc_waklv_init()
H A Dxe_wa.h30 #define XE_WA(gt__, id__) ({ \ macro
H A Dxe_ggtt.c112 struct xe_gt *affected_gt = XE_WA(tile->primary_gt, 22019338487) ? in ggtt_update_access_counter()
115 u32 max_gtt_writes = XE_WA(ggtt->tile->primary_gt, 22019338487) ? 1100 : 63; in ggtt_update_access_counter()
243 XE_WA(ggtt->tile->media_gt, 22019338487)) || in xe_ggtt_init_early()
244 XE_WA(ggtt->tile->primary_gt, 22019338487) ? in xe_ggtt_init_early()
H A Dxe_gsc.c267 if (XE_WA(tile->primary_gt, 14018094691)) { in gsc_upload_and_init()
282 if (XE_WA(tile->primary_gt, 14018094691)) in gsc_upload_and_init()
581 if (!XE_WA(gt, 14015076503) || !gsc_fw_is_loaded(gt)) in xe_gsc_wa_14015076503()
H A Dxe_gt.c104 if (!XE_WA(gt, 16023588340)) in xe_gt_enable_host_l2_vram()
126 if (!XE_WA(gt, 16023588340)) in xe_gt_disable_host_l2_vram()
919 XE_WA(gt, 22019338487)) in xe_gt_sanitize_freq()
H A Dxe_ring_ops.c187 if (XE_WA(gt, 1409600907)) in emit_render_cache_flush()
203 if (XE_WA(hwe->gt, 16020292621)) in emit_pipe_control_to_ring_end()
H A Dxe_gt_topology.c143 if (XE_WA(gt, no_media_l3)) in load_l3_bank_mask()
H A Dxe_ttm_stolen_mgr.c161 if (media_gt && XE_WA(media_gt, 14019821291)) { in detect_bar2_integrated()
H A Dxe_query.c465 if (!XE_WA(gt, no_media_l3)) in calc_topo_query_size()
528 if (!XE_WA(gt, no_media_l3)) { in query_gt_topology()
H A Dxe_device.c876 if (XE_WA(xe_root_mmio_gt(xe), 16023588340)) { in xe_device_td_flush()
912 if (!XE_WA(gt, 16023588340)) in xe_device_l2_flush()
H A Dxe_guc_pc.c713 if (XE_WA(gt, 22019338487)) { in pc_max_freq_cap()
805 if (XE_WA(pc_to_gt(pc), 22019338487)) { in pc_set_mert_freq_cap()
H A Dxe_wa.c953 if (XE_WA(tile->primary_gt, 22010954014)) in xe_wa_apply_tile_workarounds()
H A Dxe_lrc.c1588 if (XE_WA(gt, 14019789679) && q->hwe->class == XE_ENGINE_CLASS_RENDER) { in xe_lrc_emit_hwe_state_instructions()
H A Dxe_vm.c1733 if (XE_WA(xe_root_mmio_gt(xe), 14016763929)) in xe_vm_create_ioctl()
/linux/drivers/gpu/drm/xe/display/
H A Dxe_display_wa.c15 return XE_WA(xe_root_mmio_gt(i915), 16023588340); in intel_display_needs_wa_16023588340()
H A Dintel_fbdev_fb.c43 if (!IS_DGFX(xe) && !XE_WA(xe_root_mmio_gt(xe), 22019338487_display)) { in intel_fbdev_fb_alloc()
H A Dxe_plane_initial.c110 if (XE_WA(xe_root_mmio_gt(xe), 22019338487_display)) in initial_plane_bo()