Home
last modified time | relevance | path

Searched refs:WREG8 (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/mgag200/
H A Dmgag200_bmc.c23 WREG8(DAC_INDEX, MGA1064_GEN_IO_CTL); in mgag200_bmc_stop_scanout()
29 WREG8(DAC_INDEX, MGA1064_GEN_IO_DATA); in mgag200_bmc_stop_scanout()
39 WREG8(DAC_INDEX, MGA1064_SPAREREG); in mgag200_bmc_stop_scanout()
69 WREG8(DAC_INDEX, MGA1064_REMHEADCTL2); in mgag200_bmc_start_scanout()
72 WREG8(DAC_DATA, tmp); in mgag200_bmc_start_scanout()
78 WREG8(DAC_INDEX, MGA1064_REMHEADCTL2); in mgag200_bmc_start_scanout()
79 WREG8(DAC_DATA, tmp); in mgag200_bmc_start_scanout()
82 WREG8(DAC_INDEX, MGA1064_SPAREREG); in mgag200_bmc_start_scanout()
85 WREG8(DAC_DATA, tmp); in mgag200_bmc_start_scanout()
88 WREG8(DAC_INDEX, MGA1064_GEN_IO_DATA); in mgag200_bmc_start_scanout()
H A Dmgag200_drv.h34 #define WREG8(reg, v) iowrite8(v, ((void __iomem *)mdev->rmmio) + (reg)) macro
44 WREG8(MGA_MISC_OUT, v)
62 WREG8(ATTR_INDEX, reg); \
63 WREG8(ATTR_DATA, v); \
68 WREG8(MGAREG_SEQ_INDEX, reg); \
74 WREG8(MGAREG_SEQ_INDEX, reg); \
75 WREG8(MGAREG_SEQ_DATA, v); \
80 WREG8(MGAREG_CRTC_INDEX, reg); \
86 WREG8(MGAREG_CRTC_INDEX, reg); \
87 WREG8(MGAREG_CRTC_DATA, v); \
[all …]
H A Dmgag200_mode.c47 WREG8(DAC_INDEX + MGA1064_INDEX, i8); in mgag200_set_gamma_lut()
48 WREG8(DAC_INDEX + MGA1064_COL_PAL, r8); in mgag200_set_gamma_lut()
49 WREG8(DAC_INDEX + MGA1064_COL_PAL, g8); in mgag200_set_gamma_lut()
50 WREG8(DAC_INDEX + MGA1064_COL_PAL, b8); in mgag200_set_gamma_lut()
211 WREG8(MGA_MISC_OUT, misc); in mgag200_init_registers()
298 WREG8(MGA_MISC_OUT, misc); in mgag200_set_mode_regs()
H A Dmgag200_ddc.c50 WREG8(DAC_INDEX, MGA1064_GEN_IO_DATA); in mga_i2c_read_gpio()
58 WREG8(DAC_INDEX, MGA1064_GEN_IO_CTL); in mga_i2c_set_gpio()
/linux/drivers/gpu/drm/radeon/
H A Dradeon_legacy_tv.c288 WREG8(RADEON_CLOCK_CNTL_INDEX, RADEON_PLL_TEST_CNTL); in radeon_wait_pll_lock()
290 WREG8(RADEON_CLOCK_CNTL_DATA + 3, 0); in radeon_wait_pll_lock()
H A Dr100.c2915 WREG8(RADEON_CLOCK_CNTL_INDEX, reg & 0x3f); in r100_pll_rreg()
2928 WREG8(RADEON_CLOCK_CNTL_INDEX, ((reg & 0x3f) | RADEON_PLL_WR_EN)); in r100_pll_wreg()
3809 WREG8(R_0003C2_GENMO_WT, C_0003C2_VGA_RAM_EN & save->GENMO_WT); in r100_mc_stop()
3840 WREG8(R_0003C2_GENMO_WT, save->GENMO_WT); in r100_mc_resume()
3853 WREG8(R_0003C2_GENMO_WT, C_0003C2_VGA_RAM_EN & tmp); in r100_vga_render_disable()
H A Dradeon_display.c73 WREG8(AVIVO_DC_LUT_RW_INDEX, 0); in avivo_crtc_load_lut()
210 WREG8(RADEON_PALETTE_INDEX, 0); in legacy_crtc_load_lut()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu.h1366 #define WREG8(reg, v) amdgpu_mm_wreg8(adev, (reg), (v)) macro