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/linux/lib/crypto/powerpc/
H A Dsha1-powerpc-asm.S34 #define W(t) (((t)%16)+16) macro
37 LWZ(W(t),(t)*4,r4)
46 add r14,r0,W(t); \
47 LWZ(W((t)+4),((t)+4)*4,r4); \
58 xor r5,W((t)+4-3),W((t)+4-8); \
60 xor W((t)+4),W((t)+4-16),W((t)+4-14); \
61 add r0,r0,W(t); \
62 xor W((t)+4),W((t)+4),r5; \
64 rotlwi W((t)+4),W((t)+4),1
73 add r0,r0,W(t); \
[all …]
/linux/Documentation/translations/zh_TW/arch/loongarch/
H A Dintroduction.rst205 ADD.W SUB.W ADDI.W ADD.D SUB.D ADDI.D
208 MUL.W MULH.W MULH.WU DIV.W DIV.WU MOD.W MOD.WU
211 LU12I.W LU32I.D LU52I.D ADDU16I.D
215 SLL.W SRL.W SRA.W ROTR.W SLLI.W SRLI.W SRAI.W ROTRI.W
220 EXT.W.B EXT.W.H CLO.W CLO.D SLZ.W CLZ.D CTO.W CTO.D CTZ.W CTZ.D
221 BYTEPICK.W BYTEPICK.D BSTRINS.W BSTRINS.D BSTRPICK.W BSTRPICK.D
222 REVB.2H REVB.4H REVB.2W REVB.D REVH.2W REVH.D BITREV.4B BITREV.8B BITREV.W BITREV.D
231 LD.B LD.BU LD.H LD.HU LD.W LD.WU LD.D ST.B ST.H ST.W ST.D
232 LDX.B LDX.BU LDX.H LDX.HU LDX.W LDX.WU LDX.D STX.B STX.H STX.W STX.D
233 LDPTR.W LDPTR.D STPTR.W STPTR.D
[all …]
/linux/Documentation/translations/zh_CN/arch/loongarch/
H A Dintroduction.rst205 ADD.W SUB.W ADDI.W ADD.D SUB.D ADDI.D
208 MUL.W MULH.W MULH.WU DIV.W DIV.WU MOD.W MOD.WU
211 LU12I.W LU32I.D LU52I.D ADDU16I.D
215 SLL.W SRL.W SRA.W ROTR.W SLLI.W SRLI.W SRAI.W ROTRI.W
220 EXT.W.B EXT.W.H CLO.W CLO.D SLZ.W CLZ.D CTO.W CTO.D CTZ.W CTZ.D
221 BYTEPICK.W BYTEPICK.D BSTRINS.W BSTRINS.D BSTRPICK.W BSTRPICK.D
222 REVB.2H REVB.4H REVB.2W REVB.D REVH.2W REVH.D BITREV.4B BITREV.8B BITREV.W BITREV.D
231 LD.B LD.BU LD.H LD.HU LD.W LD.WU LD.D ST.B ST.H ST.W ST.D
232 LDX.B LDX.BU LDX.H LDX.HU LDX.W LDX.WU LDX.D STX.B STX.H STX.W STX.D
233 LDPTR.W LDPTR.D STPTR.W STPTR.D
[all …]
/linux/lib/crypto/x86/
H A Dsha1-ssse3-and-avx.S311 .set W, W0 define
319 .set W_minus_32, W
330 .set W_minus_04, W
331 .set W, W_minus_32 define
352 movdqa W_TMP1, W
374 movdqa W_minus_12, W
375 palignr $8, W_minus_16, W # w[i-14]
378 pxor W_minus_08, W
381 pxor W_TMP1, W
382 movdqa W, W_TMP2
[all …]
H A Dsha512-ssse3-asm.S98 # W[t]+K[t] (stack frame)
125 add WK_2(idx), T1 # W[t] + K[t] from message scheduler
129 add h_64, T1 # T1 = CH(e,f,g) + W[t] + K[t] + h
131 add tmp0, T1 # T1 = CH(e,f,g) + W[t] + K[t] + S1(e)
154 # Two rounds are computed based on the values for K[t-2]+W[t-2] and
155 # K[t-1]+W[t-1] which were previously stored at WK_2 by the message
162 # Eg. XMM2=W[t-2] really means XMM2={W[t-2]|W[t-1]}
171 movdqa W_t(idx), %xmm2 # XMM2 = W[t-2]
174 movdqa %xmm2, %xmm0 # XMM0 = W[t-2]
179 movdqu W_t(idx), %xmm5 # XMM5 = W[t-15]
[all …]
H A Dsha512-avx-asm.S77 # W[t] + K[t] | W[t+1] + K[t+1]
100 # W[t]+K[t] (stack frame)
131 add WK_2(idx), T1 # W[t] + K[t] from message scheduler
135 add h_64, T1 # T1 = CH(e,f,g) + W[t] + K[t] + h
137 add tmp0, T1 # T1 = CH(e,f,g) + W[t] + K[t] + S1(e)
159 # Two rounds are computed based on the values for K[t-2]+W[t-2] and
160 # K[t-1]+W[t-1] which were previously stored at WK_2 by the message
167 # Eg. XMM4=W[t-2] really means XMM4={W[t-2]|W[t-1]}
172 vmovdqa W_t(idx), %xmm4 # XMM4 = W[t-2]
174 vmovdqu W_t(idx), %xmm5 # XMM5 = W[t-15]
[all …]
H A Dsha256-ssse3-asm.S149 ## compute W[-16] + W[-7] 4 at a time
154 palignr $4, X2, XTMP0 # XTMP0 = W[-7]
162 paddd X0, XTMP0 # XTMP0 = W[-7] + W[-16]
167 palignr $4, X0, XTMP1 # XTMP1 = W[-15]
171 movdqa XTMP1, XTMP2 # XTMP2 = W[-15]
175 movdqa XTMP1, XTMP3 # XTMP3 = W[-15]
186 por XTMP2, XTMP1 # XTMP1 = W[-15] ror 7
191 movdqa XTMP3, XTMP2 # XTMP2 = W[-15]
194 movdqa XTMP3, XTMP4 # XTMP4 = W[-15]
211 psrld $3, XTMP4 # XTMP4 = W[-15] >> 3
[all …]
H A Dsha512-avx2-asm.S166 MY_VPALIGNR YTMP0, Y_3, Y_2, 8 # YTMP0 = W[-7]
168 vpaddq Y_0, YTMP0, YTMP0 # YTMP0 = W[-7] + W[-16]
170 MY_VPALIGNR YTMP1, Y_1, Y_0, 8 # YTMP1 = W[-15]
177 vpor YTMP2, YTMP3, YTMP3 # YTMP3 = W[-15] ror 1
179 vpsrlq $7, YTMP1, YTMP4 # YTMP4 = W[-15] >> 7
223 vpor YTMP2, YTMP1, YTMP1 # YTMP1 = W[-15] ror 8
225 vpxor YTMP4, YTMP3, YTMP3 # YTMP3 = W[-15] ror 1 ^ W[-15] >> 7
230 vpaddq YTMP1, YTMP0, YTMP0 # YTMP0 = W[-16] + W[-7] + s0
232 vperm2f128 $0x0, YTMP0, YTMP0, Y_0 # Y_0 = W[-16] + W[-7] + s0 {BABA}
234 vpand MASK_YMM_LO(%rip), YTMP0, YTMP0 # YTMP0 = W[-16] + W[-7] + s0 {DC00}
[all …]
H A Dsha256-avx-asm.S155 ## compute W[-16] + W[-7] 4 at a time
160 vpalignr $4, X2, X3, XTMP0 # XTMP0 = W[-7]
167 vpaddd X0, XTMP0, XTMP0 # XTMP0 = W[-7] + W[-16]
172 vpalignr $4, X0, X1, XTMP1 # XTMP1 = W[-15]
189 vpor XTMP2, XTMP3, XTMP3 # XTMP1 = W[-15] MY_ROR 7
203 vpsrld $3, XTMP1, XTMP4 # XTMP4 = W[-15] >> 3
215 vpxor XTMP2, XTMP3, XTMP3 # XTMP1 = W[-15] MY_ROR 7 ^ W[-15] MY_ROR
224 vpshufd $0b11111010, X3, XTMP2 # XTMP2 = W[-2] {BBAA}
227 vpaddd XTMP1, XTMP0, XTMP0 # XTMP0 = W[-16] + W[-7] + s0
239 vpsrld $10, XTMP2, XTMP4 # XTMP4 = W[-2] >> 10 {BBAA}
[all …]
/linux/tools/memory-model/Documentation/
H A Dherd-representation.txt4 # W, a Store event
13 # W*, a Store event included in RMW
24 # link, and W[ACQUIRE] are not included in the Acquire set.
37 | WRITE_ONCE | W[ONCE] |
41 | smp_store_release | W[RELEASE] |
43 | smp_store_mb | W[ONCE] ->po F[MB] |
58 | rcu_assign_pointer | W[RELEASE] |
61 | srcu_read_unlock | W[srcu-unlock] |
68 | atomic_add | R*[NORETURN] ->rmw W*[NORETURN] |
74 | atomic_add_return | R*[MB] ->rmw W*[M
[all...]
H A Dcheatsheet.txt3 C Self R W RMW Self R W DR DW RMW SV
11 Successful *_release() C Y Y Y W Y
13 smp_wmb() Y W Y Y W
28 W: Write, for example, WRITE_ONCE(), or write portion of RMW
/linux/lib/crypto/arm/
H A Dsha1-armv7-neon.S88 W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ argument
90 pre1(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \
94 pre2(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \
98 pre3(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \
102 W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ argument
104 pre1(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \
108 pre2(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \
111 pre3(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \
115 W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ argument
117 pre1(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \
[all …]
/linux/rust/kernel/debugfs/
H A Dcallback_adapters.rs31 pub(crate) struct WritableAdapter<D, W> {
33 _writer: PhantomData<W>,
37 unsafe impl<D, W> Adapter for WritableAdapter<D, W> {
41 impl<D: Writer, W> Writer for WritableAdapter<D, W> {
47 impl<D: Deref, W> Reader for WritableAdapter<D, W>
49 W: Fn(&D::Target, &mut UserSliceReader) -> Result + Send + Sync + 'static,
53 let w: &W = unsafe { materialize_zst() }; in read_from_slice()
/linux/lib/crypto/
H A Dsha256.c64 static inline void LOAD_OP(int I, u32 *W, const u8 *input) in LOAD_OP() argument
66 W[I] = get_unaligned_be32((__u32 *)input + I); in LOAD_OP()
69 static inline void BLEND_OP(int I, u32 *W) in BLEND_OP() argument
71 W[I] = s1(W[I - 2]) + W[I - 7] + s0(W[I - 15]) + W[I - 16]; in BLEND_OP()
77 t1 = h + e1(e) + Ch(e, f, g) + sha256_K[i] + W[i]; \
84 const u8 *input, u32 W[64]) in sha256_block_generic()
91 LOAD_OP(i + 0, W, input); in sha256_block_generic()
92 LOAD_OP(i + 1, W, input); in sha256_block_generic()
93 LOAD_OP(i + 2, W, input); in sha256_block_generic()
94 LOAD_OP(i + 3, W, input); in sha256_block_generic()
[all …]
H A Dsha512.c85 u64 W[16]; in sha512_block_generic() local
88 W[j] = get_unaligned_be64(data + j * sizeof(u64)); in sha512_block_generic()
93 W[j & 15] += s1(W[(j - 2) & 15]) + in sha512_block_generic()
94 W[(j - 7) & 15] + in sha512_block_generic()
95 s0(W[(j - 15) & 15]); in sha512_block_generic()
98 t1 = h + e1(e) + Ch(e, f, g) + sha512_K[i] + W[(i & 15)]; in sha512_block_generic()
100 t1 = g + e1(d) + Ch(d, e, f) + sha512_K[i+1] + W[(i & 15) + 1]; in sha512_block_generic()
102 t1 = f + e1(c) + Ch(c, d, e) + sha512_K[i+2] + W[(i & 15) + 2]; in sha512_block_generic()
104 t1 = e + e1(b) + Ch(b, c, d) + sha512_K[i+3] + W[(i & 15) + 3]; in sha512_block_generic()
106 t1 = d + e1(a) + Ch(a, b, c) + sha512_K[i+4] + W[(i & 15) + 4]; in sha512_block_generic()
[all …]
/linux/Documentation/arch/loongarch/
H A Dintroduction.rst238 ADD.W SUB.W ADDI.W ADD.D SUB.D ADDI.D
241 MUL.W MULH.W MULH.WU DIV.W DIV.WU MOD.W MOD.WU
244 LU12I.W LU32I.D LU52I.D ADDU16I.D
248 SLL.W SRL.W SRA.W ROTR.W SLLI.W SRLI.W SRAI.W ROTRI.W
253 EXT.W.B EXT.W.H CLO.W CLO.D SLZ.W CLZ.D CTO.W CTO.D CTZ.W CTZ.D
254 BYTEPICK.W BYTEPICK.D BSTRINS.W BSTRINS.D BSTRPICK.W BSTRPICK.D
255 REVB.2H REVB.4H REVB.2W REVB.D REVH.2W REVH.D BITREV.4B BITREV.8B BITREV.W BITREV.D
264 LD.B LD.BU LD.H LD.HU LD.W LD.WU LD.D ST.B ST.H ST.W ST.D
265 LDX.B LDX.BU LDX.H LDX.HU LDX.W LDX.WU LDX.D STX.B STX.H STX.W STX.D
266 LDPTR.W LDPTR.D STPTR.W STPTR.D
[all …]
/linux/tools/memory-model/
H A Dlinux-kernel.def35 cmpxchg(X,V,W) __cmpxchg{MB}(X,V,W)
36 cmpxchg_relaxed(X,V,W) __cmpxchg{ONCE}(X,V,W)
37 cmpxchg_acquire(X,V,W) __cmpxchg{ACQUIRE}(X,V,W)
38 cmpxchg_release(X,V,W) __cmpxchg{RELEASE}(X,V,W)
130 atomic_cmpxchg(X,V,W) __cmpxchg{MB}(X,V,W)
[all...]
/linux/arch/arm/lib/
H A Dmemmove.S82 6: W(nop)
83 W(ldr) r3, [r1, #-4]!
84 W(ldr) r4, [r1, #-4]!
85 W(ldr) r5, [r1, #-4]!
86 W(ldr) r6, [r1, #-4]!
87 W(ldr) r8, [r1, #-4]!
88 W(ldr) r9, [r1, #-4]!
89 W(ldr) lr, [r1, #-4]!
93 W(nop)
94 W(str) r3, [r0, #-4]!
[all …]
/linux/arch/m68k/fpsp040/
H A Dslogn.S436 |--LET V=U*U, W=V*V, CALCULATE
438 |--U + U*V*( [B1 + W*(B3 + W*B5)] + [V*(B2 + W*B4)] )
443 fmulx %fp1,%fp1 | ...FP1 IS W
448 fmulx %fp1,%fp3 | ...W*B5
449 fmulx %fp1,%fp2 | ...W*B4
451 faddd LOGB3,%fp3 | ...B3+W*B5
452 faddd LOGB2,%fp2 | ...B2+W*B4
454 fmulx %fp3,%fp1 | ...W*(B3+W*B5), FP3 RELEASED
456 fmulx %fp0,%fp2 | ...V*(B2+W*B4)
458 faddd LOGB1,%fp1 | ...B1+W*(B3+W*B5)
[all …]
/linux/arch/arm/boot/compressed/
H A Dhead.S213 W(b) 1f
1014 W(b) __armv4_mmu_cache_on
1015 W(b) __armv4_mmu_cache_off
1021 W(b) __armv3_mpu_cache_on
1022 W(b) __armv3_mpu_cache_off
1023 W(b) __armv3_mpu_cache_flush
1027 W(b) __armv4_mpu_cache_on
1028 W(b) __armv4_mpu_cache_off
1029 W(b) __armv4_mpu_cache_flush
1033 W(b) __arm926ejs_mmu_cache_on
[all …]
/linux/arch/mips/n64/
H A Dinit.c51 #define W 320 macro
82 .width = W, in n64_platform_init()
84 .stride = W * 2, in n64_platform_init()
122 orig = kzalloc(W * H * 2 + 63, GFP_DMA | GFP_KERNEL); in n64_platform_init()
141 res[0].end = phys + W * H * 2 - 1; in n64_platform_init()
149 #undef W
/linux/drivers/atm/
H A DKconfig86 when going from 8W to 16W bursts.
89 bool "Enable 16W TX bursts (discouraged)"
96 bool "Enable 8W TX bursts (recommended)"
103 bool "Enable 4W TX bursts (optional)"
107 this if you have disabled 8W bursts. Enabling 4W if 8W is also set
111 bool "Enable 2W TX bursts (optional)"
115 this if you have disabled 4W and 8W bursts. Enabling 2W if 4W or 8W
119 bool "Enable 16W RX bursts (discouraged)"
126 bool "Enable 8W RX bursts (discouraged)"
134 bool "Enable 4W RX bursts (recommended)"
[all …]
/linux/rust/kernel/
H A Ddebugfs.rs260 pub fn read_write_callback_file<'a, T, E: 'a, F, W>( in read_write_callback_file()
265 _w: &'static W, in read_write_callback_file() argument
270 W: Fn(&T, &mut UserSliceReader) -> Result + Send + Sync, in read_write_callback_file()
273 <WritableAdapter<FormatAdapter<T, F>, W> as file_ops::ReadWriteFile<_>>::FILE_OPS in read_write_callback_file()
317 pub fn write_callback_file<'a, T, E: 'a, W>( in write_callback_file()
321 _w: &'static W, in write_callback_file() argument
325 W: Fn(&T, &mut UserSliceReader) -> Result + Send + Sync, in write_callback_file()
327 let file_ops = <WritableAdapter<NoWriter<T>, W> as WriteFile<_>>::FILE_OPS in write_callback_file()
610 pub fn read_write_callback_file<T, F, W>( in read_write_callback_file()
615 _w: &'static W, in read_write_callback_file() argument
[all …]
/linux/Documentation/translations/zh_CN/admin-guide/
H A Dtainted-kernels.rst33 CPU: 0 PID: 4424 Comm: insmod Tainted: P W O 4.20.0-0.rc6.fc30 #1
41 Tainted: P W O
44 警告（ ``W`` ），并且加载了外部构建的模块（ ``O`` ），所以内核早些时候受到
67 Raw taint value as int/string: 4609/'P W O '
92 9 _/W 512 内核发出警告
140 9) ``W`` 内核之前已发出过警告（尽管有些警告可能会设置更具体的污染标志）。
/linux/Documentation/translations/zh_TW/admin-guide/
H A Dtainted-kernels.rst36 CPU: 0 PID: 4424 Comm: insmod Tainted: P W O 4.20.0-0.rc6.fc30 #1
44 Tainted: P W O
47 警告（ ``W`` ），並且加載了外部構建的模塊（ ``O`` ），所以內核早些時候受到
70 Raw taint value as int/string: 4609/'P W O '
95 9 _/W 512 內核發出警告
143 9) ``W`` 內核之前已發出過警告（儘管有些警告可能會設置更具體的污染標誌）。

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