Searched refs:VoltageLevel (Results 1 – 8 of 8) sorted by relevance
78 dml_print("DML::%s: mode_lib->vba.VoltageLevel = %d\n", __func__, mode_lib->vba.VoltageLevel); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()366 mode_lib->vba.OutputBppPerState[mode_lib->vba.VoltageLevel][k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()538 mode_lib->vba.VoltageLevel, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()602 v->WritebackDelay[mode_lib->vba.VoltageLevel][k] = mode_lib->vba.WritebackLatency in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()613 v->WritebackDelay[mode_lib->vba.VoltageLevel][k] = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()617 v->WritebackDelay[mode_lib->vba.VoltageLevel][k] = in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()618 dml_max(v->WritebackDelay[mode_lib->vba.VoltageLevel][k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()637 v->WritebackDelay[mode_lib->vba.VoltageLevel][k] = in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()638 v->WritebackDelay[mode_lib->vba.VoltageLevel][j]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()700 dml_ceil((double) v->WritebackDelay[mode_lib->vba.VoltageLevel][k] in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()[all …]
478 unsigned int vlevel = context->bw_ctx.dml.vba.VoltageLevel; in dcn32_set_phantom_stream_timing()520 num_dpp = vba->NoOfDPP[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_plane[pipe_idx]]; in dcn32_set_phantom_stream_timing()634 …(vba->ActiveDRAMClockChangeLatencyMarginPerState[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_pla… in dcn32_assign_subvp_pipe()635 …(vba->ActiveDRAMClockChangeLatencyMarginPerState[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_pla… in dcn32_assign_subvp_pipe()1415 context->bw_ctx.dml.vba.VoltageLevel = *vlevel; in try_odm_power_optimization_and_revalidate()1469 vba->VoltageLevel = *vlevel; in dcn32_full_validate_bw_helper()1567 vba->VoltageLevel = *vlevel; in dcn32_full_validate_bw_helper()1582 vba->VoltageLevel = *vlevel; in dcn32_full_validate_bw_helper()1730 …if (vba->ActiveDRAMClockChangeLatencyMarginPerState[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_… in dcn32_calculate_dlg_params()2206 vba->VoltageLevel = vlevel; in dcn32_internal_validate_bw()[all …]
691 const int VoltageLevel,698 const int VoltageLevel,
79 return mode_lib->vba.VoltageLevel; in dml_get_voltage_level()377 if (soc->clock_limits[i].state == mode_lib->vba.VoltageLevel) in fetch_socbb_params()1083 mode_lib->vba.VoltageLevel = mode_lib->vba.cache_pipes[0].clks_cfg.voltage; in ModeSupportAndSystemConfiguration()1084 …mode_lib->vba.ReturnBW = mode_lib->vba.ReturnBWPerState[mode_lib->vba.VoltageLevel][mode_lib->vba.… in ModeSupportAndSystemConfiguration()1086 mode_lib->vba.ReturnBW = mode_lib->vba.ReturnBWPerState[mode_lib->vba.VoltageLevel][0]; in ModeSupportAndSystemConfiguration()1087 ….FabricAndDRAMBandwidth = mode_lib->vba.FabricAndDRAMBandwidthPerState[mode_lib->vba.VoltageLevel]; in ModeSupportAndSystemConfiguration()1098 mode_lib->vba.DISPCLK = soc->clock_limits[mode_lib->vba.VoltageLevel].dispclk_mhz; in ModeSupportAndSystemConfiguration()1112 mode_lib->vba.DPPCLK[k] = soc->clock_limits[mode_lib->vba.VoltageLevel].dppclk_mhz; in ModeSupportAndSystemConfiguration()
433 int VoltageLevel; member
1995 int PrefetchMode = v->PrefetchModePerState[v->VoltageLevel][v->maxMpcComb];2004 v->ReturnBusWidth * v->DCFCLKState[v->VoltageLevel][v->maxMpcComb],2005 v->FabricClockPerState[v->VoltageLevel] * v->FabricDatapathToDCNDataReturn);2006 …double IdealDRAMBandwidthPerState = v->DRAMSpeedPerState[v->VoltageLevel] * v->NumberOfChannels * …2503 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackLatency2514 v->WritebackDelay[v->VoltageLevel][k] = 0;2517 v->WritebackDelay[v->VoltageLevel][k] = dml_max(2518 v->WritebackDelay[v->VoltageLevel][k],2537 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackDelay[v->VoltageLevel][j];2547 (double) v->WritebackDelay[v->VoltageLevel][k][all …]
471 …if (context->bw_ctx.dml.vba.DRAMClockChangeSupport[context->bw_ctx.dml.vba.VoltageLevel][context->… in dcn315_update_soc_for_wm_a()
257 …vba->ActiveDRAMClockChangeLatencyMarginPerState[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_plan… in assign_subvp_pipe()