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Searched refs:VCE_UENC_CLOCK_GATING (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dvce_v2_0.c48 tmp = RREG32(VCE_UENC_CLOCK_GATING); in vce_v2_0_set_sw_cg()
50 WREG32(VCE_UENC_CLOCK_GATING, tmp); in vce_v2_0_set_sw_cg()
63 tmp = RREG32(VCE_UENC_CLOCK_GATING); in vce_v2_0_set_sw_cg()
66 WREG32(VCE_UENC_CLOCK_GATING, tmp); in vce_v2_0_set_sw_cg()
88 orig = tmp = RREG32(VCE_UENC_CLOCK_GATING); in vce_v2_0_set_dyn_cg()
92 WREG32(VCE_UENC_CLOCK_GATING, tmp); in vce_v2_0_set_dyn_cg()
141 tmp = RREG32(VCE_UENC_CLOCK_GATING); in vce_v2_0_init_cg()
144 WREG32(VCE_UENC_CLOCK_GATING, tmp); in vce_v2_0_init_cg()
164 WREG32_P(VCE_UENC_CLOCK_GATING, 0x1FF000, ~0xFF9FF000); in vce_v2_0_resume()
H A Dvce_v1_0.c112 tmp = RREG32(VCE_UENC_CLOCK_GATING); in vce_v1_0_enable_mgcg()
115 WREG32(VCE_UENC_CLOCK_GATING, tmp); in vce_v1_0_enable_mgcg()
125 tmp = RREG32(VCE_UENC_CLOCK_GATING); in vce_v1_0_enable_mgcg()
128 WREG32(VCE_UENC_CLOCK_GATING, tmp); in vce_v1_0_enable_mgcg()
149 tmp = RREG32(VCE_UENC_CLOCK_GATING); in vce_v1_0_init_cg()
151 WREG32(VCE_UENC_CLOCK_GATING, tmp); in vce_v1_0_init_cg()
223 WREG32_P(VCE_UENC_CLOCK_GATING, 0x1FF000, ~0xFF9FF000); in vce_v1_0_resume()
H A Dsid.h1906 #define VCE_UENC_CLOCK_GATING 0x205bc macro
H A Dcikd.h2127 #define VCE_UENC_CLOCK_GATING 0x207bc macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsid.h1968 #define VCE_UENC_CLOCK_GATING 0x205bc macro