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Searched refs:V5 (Results 1 – 25 of 27) sorted by relevance

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/linux/arch/x86/crypto/
H A Daes-xts-avx-x86_64.S331 vpclmulqdq $0x01, GF_POLY, V4, V5
343 vpxor V5, TWEAK3, TWEAK3
368 vpclmulqdq $0x01, GF_POLY, V4, V5
376 vpternlogd $0x96, V4, V5, TWEAK3
397 vpshufd $0x13, PREV_TWEAK, V5
401 vpsrad $31, V5, V5
403 vpand GF_POLY, V5, V5
405 vpxor V5, NEXT_TWEAK, NEXT_TWEAK
686 vpxord TWEAK1, KEY14, V5
688 _vaeslast \enc, V5, V1
[all …]
H A Daes-ctr-avx-x86_64.S309 .set AESDATA5, V5
/linux/lib/crc/x86/
H A Dcrc-pclmul-template.S350 _fold_vec_mem VL, V0, 0*VL(BUF), CONSTS, BSWAP_MASK, V4, V5
351 _fold_vec_mem VL, V1, 1*VL(BUF), CONSTS, BSWAP_MASK, V4, V5
352 _fold_vec_mem VL, V2, 2*VL(BUF), CONSTS, BSWAP_MASK, V4, V5
353 _fold_vec_mem VL, V3, 3*VL(BUF), CONSTS, BSWAP_MASK, V4, V5
367 _fold_vec_mem VL, V0, 0*VL(BUF), CONSTS, BSWAP_MASK, V4, V5
368 _fold_vec_mem VL, V1, 1*VL(BUF), CONSTS, BSWAP_MASK, V4, V5
375 _fold_vec_final VL, V0, V1, CONSTS, BSWAP_MASK, V4, V5
/linux/lib/
H A Dtest_dynamic_debug.c85 enum cat_level_num { V0 = 14, V1, V2, V3, V4, V5, V6, V7 }; enumerator
129 prdbg(V5); in do_levels()
/linux/arch/arm/boot/dts/xilinx/
H A Dzynq-zturn-v5.dts7 model = "Zynq Z-Turn MYIR Board V5";
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mm-emcon-avari.dtsi40 regulator-name = "1V5-avari";
H A Dimx8mn-beacon-baseboard.dtsi45 regulator-name = "1V5";
H A Dimx8mm-beacon-baseboard.dtsi61 regulator-name = "1V5";
H A Dimx8mp-skov-reva.dtsi78 regulator-name = "2V5";
/linux/drivers/net/wireless/realtek/rtl818x/
H A DKconfig71 Micronet SP907GK V5
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-emcon-avari.dtsi37 regulator-name = "1V5-avari";
H A Dimx53-tx53.dtsi70 regulator-name = "2V5";
/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h5-nanopi-neo-plus2.dts52 /* 2V5 supply for GMAC PHY IO */
/linux/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed-g4.c873 #define V5 103 macro
882 SIG_EXPR_LIST_ALIAS(V5, VPIOB9, VPI);
883 SIG_EXPR_LIST_DECL_SINGLE(V5, RXD2, RXD2, V5_DESC);
884 PIN_DECL_2(V5, GPIOM7, VPIOB9, RXD2);
885 FUNC_GROUP_DECL(RXD2, V5);
1029 FUNC_GROUP_DECL(VPI18, T5, U3, V1, U4, V2, V3, W2, Y1, V4, W3, Y2, AA1, V5,
1031 FUNC_GROUP_DECL(VPI24, T5, U3, V1, U4, V2, V3, W2, Y1, V4, W3, Y2, AA1, V5,
1035 V5, W4, Y3, AA22, W5, Y4, AA3, AB2, AA4, AB3);
2104 ASPEED_PINCTRL_PIN(V5),
2459 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, V3, V5, SCU8C, 27),
[all …]
H A Dpinctrl-aspeed-g5.c877 #define V5 114 macro
878 SIG_EXPR_LIST_DECL_SINGLE(V5, DASHV5, DASHV5, VPI_24_RSVD_DESC,
880 PIN_DECL_1(V5, GPIOO2, DASHV5);
2111 ASPEED_PINCTRL_PIN(V5),
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am64-phycore-som.dtsi103 AM64X_IOPAD(0x01f4, PIN_INPUT, 4) /* (V5) PRG0_PRU1_GPO17.RGMII1_RD3 */
/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa300-raumfeld-common.dtsi204 regulator-compatible = "V5(LDO)";
/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-boneblue.dts540 "SVO2", /* V5 */
H A Dam335x-pocketbeagle.dts426 …AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE5) /* (V5) lcd_pclk.pr1_pru1_pru_…
/linux/fs/xfs/
H A DKconfig31 by the V5 format, such as metadata checksumming, strengthened
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-colibri.dtsi1013 regulator-name = "+V5.0";
H A Dtegra30-apalis.dtsi1144 regulator-name = "+V5.0";
H A Dtegra30-apalis-v1.1.dtsi1161 regulator-name = "+V5.0";
/linux/Documentation/sound/hd-audio/
H A Dmodels.rst192 Acer Aspire V5 fixups
/linux/Documentation/arch/powerpc/
H A Dhvcs.rst386 U5112.428.103048A-V5-C0

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