Home
last modified time | relevance | path

Searched refs:UVD_CGC_CTRL__UDEC_MODE_MASK (Results 1 – 23 of 23) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h450 #define UVD_CGC_CTRL__UDEC_MODE_MASK … macro
H A Duvd_3_1_sh_mask.h239 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x20000 macro
H A Duvd_4_2_sh_mask.h239 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x20000 macro
H A Duvd_4_0_sh_mask.h68 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x00020000L macro
H A Duvd_5_0_sh_mask.h261 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x20000 macro
H A Duvd_6_0_sh_mask.h263 #define UVD_CGC_CTRL__UDEC_MODE_MASK 0x20000 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0_5.c689 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v4_0_5_disable_clock_gating()
774 UVD_CGC_CTRL__UDEC_MODE_MASK | in vcn_v4_0_5_disable_clock_gating_dpg_mode()
832 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v4_0_5_enable_clock_gating()
H A Dvcn_v1_0.c553 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v1_0_disable_clock_gating()
653 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v1_0_enable_clock_gating()
711 UVD_CGC_CTRL__UDEC_MODE_MASK | in vcn_v1_0_clock_gating_dpg_mode()
H A Dvcn_v2_0.c579 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v2_0_disable_clock_gating()
655 UVD_CGC_CTRL__UDEC_MODE_MASK | in vcn_v2_0_clock_gating_dpg_mode()
716 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v2_0_enable_clock_gating()
H A Duvd_v5_0.c701 UVD_CGC_CTRL__UDEC_MODE_MASK | in uvd_v5_0_set_sw_clock_gating()
H A Dvcn_v2_5.c669 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v2_5_disable_clock_gating()
746 UVD_CGC_CTRL__UDEC_MODE_MASK | in vcn_v2_5_clock_gating_dpg_mode()
808 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v2_5_enable_clock_gating()
H A Dvcn_v4_0.c762 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v4_0_disable_clock_gating()
847 UVD_CGC_CTRL__UDEC_MODE_MASK | in vcn_v4_0_disable_clock_gating_dpg_mode()
905 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v4_0_enable_clock_gating()
H A Dvcn_v3_0.c788 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v3_0_disable_clock_gating()
887 UVD_CGC_CTRL__UDEC_MODE_MASK | in vcn_v3_0_clock_gating_dpg_mode()
946 | UVD_CGC_CTRL__UDEC_MODE_MASK in vcn_v3_0_enable_clock_gating()
H A Duvd_v6_0.c1358 UVD_CGC_CTRL__UDEC_MODE_MASK | in uvd_v6_0_set_sw_clock_gating()
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h943 #define UVD_CGC_CTRL__UDEC_MODE_MASK … macro
H A Dvcn_2_5_sh_mask.h2011 #define UVD_CGC_CTRL__UDEC_MODE_MASK … macro
H A Dvcn_2_0_0_sh_mask.h1962 #define UVD_CGC_CTRL__UDEC_MODE_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3682 #define UVD_CGC_CTRL__UDEC_MODE_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2741 #define UVD_CGC_CTRL__UDEC_MODE_MASK … macro
H A Dvcn_5_0_0_sh_mask.h119 #define UVD_CGC_CTRL__UDEC_MODE_MASK … macro
H A Dvcn_4_0_5_sh_mask.h115 #define UVD_CGC_CTRL__UDEC_MODE_MASK … macro
H A Dvcn_4_0_0_sh_mask.h119 #define UVD_CGC_CTRL__UDEC_MODE_MASK … macro
H A Dvcn_4_0_3_sh_mask.h119 #define UVD_CGC_CTRL__UDEC_MODE_MASK … macro