Searched refs:UART_LSR_DR (Results 1 – 16 of 16) sorted by relevance
27 #define UART_LSR_DR 0x01 /* Receiver data ready */ macro48 while ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_DR) == 0); in ns16550_getc()54 return ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_DR) != 0); in ns16550_tstc()
120 while (inb_p(speakup_info.port_tts + UART_LSR) & UART_LSR_DR) { in synth_readbuf_handler()258 while (!(inb_p(speakup_info.port_tts + UART_LSR) & UART_LSR_DR)) { in spk_serial_in()273 if (!(lsr & UART_LSR_DR)) in spk_serial_in_nowait()
87 up->port.read_status_mask &= ~UART_LSR_DR; in serial_pxa_stop_rx()161 } while ((*status & UART_LSR_DR) && (max_count-- > 0)); in receive_chars()230 if (lsr & UART_LSR_DR) in serial_pxa_irq()450 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; in serial_pxa_set_termios()476 up->port.ignore_status_mask |= UART_LSR_DR; in serial_pxa_set_termios()643 while (!(lsr & UART_LSR_DR)) in serial_pxa_get_poll_char()
330 up->port.read_status_mask &= ~UART_LSR_DR; in serial_omap_stop_rx()446 if (likely(lsr & UART_LSR_DR)) { in serial_omap_rlsi()498 if (!(lsr & UART_LSR_DR)) in serial_omap_rdi()695 if (serial_in(up, UART_LSR) & UART_LSR_DR) in serial_omap_startup()759 if (serial_in(up, UART_LSR) & UART_LSR_DR) in serial_omap_shutdown()825 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; in serial_omap_set_termios()851 up->port.ignore_status_mask |= UART_LSR_DR; in serial_omap_set_termios()1124 if (!(status & UART_LSR_DR)) { in serial_omap_poll_get_char()1693 (UART_LSR_THRE | UART_LSR_DR))) { in serial_omap_mdr1_errataset()
340 if ((lsr & UART_LSR_TEMT) && !(lsr & UART_LSR_DR)) in tegra_uart_fifo_reset()461 if (!(lsr & UART_LSR_DR) && (lsr & UART_LSR_FIFOE)) in tegra_uart_decode_rx_error()654 if (!(lsr & UART_LSR_DR)) in tegra_uart_handle_rx_pio()667 if (tup->uport.ignore_status_mask & UART_LSR_DR) in tegra_uart_handle_rx_pio()686 if (tup->uport.ignore_status_mask & UART_LSR_DR) in tegra_uart_copy_rx_to_tty()1386 tup->uport.ignore_status_mask |= UART_LSR_DR; in tegra_uart_set_termios()
558 i < rx_size && lsr & (UART_LSR_DR | UART_LSR_BI); in pch_uart_hal_read()1471 if (!(lsr & UART_LSR_DR)) in pch_uart_get_poll_char()
47 while (in_8(avr_addr + UART_LSR) & UART_LSR_DR) in wd_stop()
136 if (!(lsr & UART_LSR_DR)) in dw8250_force_idle()300 if (!(status & (UART_LSR_DR | UART_LSR_BI))) in dw8250_handle_irq()312 if (status & (UART_LSR_DR | UART_LSR_BI)) { in dw8250_handle_irq()
347 if (lsr & (UART_LSR_DR | UART_LSR_BI)) { in aspeed_vuart_handle_irq()367 } while (lsr & (UART_LSR_DR | UART_LSR_BI)); in aspeed_vuart_handle_irq()
119 if (!(status & UART_LSR_DR)) in early_serial8250_read()
81 if (!dma->rx_running && (serial_lsr_in(p) & UART_LSR_DR)) in dma_rx_complete()
147 #define UART_LSR_DR 0x01 /* Receiver data ready */ macro
169 while (!(readl(UART1_REG(LSR)) & UART_LSR_DR)) { in tsp2_miconread()
191 while (!(readl(UART1_REG(LSR)) & UART_LSR_DR)) { in kurobox_pro_miconread()
285 } while (inb(iobase + UART_LSR) & UART_LSR_DR); in dtl1_receive()
630 lsr |= UART_LSR_DR; in handle_bar_read()