Searched refs:UART_FCR_CLEAR_XMIT (Results 1 – 14 of 14) sorted by relevance
100 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); /* clear FIFOs */ in ls_uart_init()
57 #define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ macro
97 UART_FCR_CLEAR_XMIT); in serial8250_em_reg_update()
114 early_out(port, UART_FCR, UART_FCR_UME | UART_FCR_CLEAR_XMIT | in ingenic_earlycon_setup_tail()
270 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,278 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,497 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); in serial8250_clear_fifos()734 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); in size_fifo()
171 UART_FCR_CLEAR_XMIT); in mtk8250_dma_enable()
333 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); in serial_pxa_startup()397 UART_FCR_CLEAR_XMIT); in serial_pxa_shutdown()
623 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); in sunsu_startup()728 UART_FCR_CLEAR_XMIT); in sunsu_shutdown()1147 UART_FCR_CLEAR_XMIT)); in sunsu_autoconfig()
314 fcr |= fcr_bits & (UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); in tegra_uart_fifo_reset()320 fcr |= fcr_bits & (UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); in tegra_uart_fifo_reset()980 tegra_uart_fifo_reset(tup, UART_FCR_CLEAR_XMIT | UART_FCR_CLEAR_RCVR); in tegra_uart_hw_deinit()
190 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); in serial_omap_clear_fifos()1686 serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | in serial_omap_mdr1_errataset()
606 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); in sdio_uart_activate()683 UART_FCR_CLEAR_XMIT); in sdio_uart_shutdown()
782 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); in f81534_check_port_hw_disabled()1075 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); in f81534_open()
573 UART_FCR_CLEAR_XMIT; in f81232_port_enable()
450 if (data & (UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT)) { in handle_bar_write()