1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Sparx5 SoC temperature sensor driver
3 *
4 * Copyright (C) 2020 Lars Povlsen <lars.povlsen@microchip.com>
5 */
6
7 #include <linux/bitfield.h>
8 #include <linux/clk.h>
9 #include <linux/hwmon.h>
10 #include <linux/init.h>
11 #include <linux/io.h>
12 #include <linux/module.h>
13 #include <linux/platform_device.h>
14
15 #define TEMP_CTRL 0
16 #define TEMP_CFG 4
17 #define TEMP_CFG_CYCLES GENMASK(24, 15)
18 #define TEMP_CFG_ENA BIT(0)
19 #define TEMP_STAT 8
20 #define TEMP_STAT_VALID BIT(12)
21 #define TEMP_STAT_TEMP GENMASK(11, 0)
22
23 struct s5_hwmon {
24 void __iomem *base;
25 struct clk *clk;
26 };
27
s5_temp_enable(struct s5_hwmon * hwmon)28 static void s5_temp_enable(struct s5_hwmon *hwmon)
29 {
30 u32 val = readl(hwmon->base + TEMP_CFG);
31 u32 clk = clk_get_rate(hwmon->clk) / USEC_PER_SEC;
32
33 val &= ~TEMP_CFG_CYCLES;
34 val |= FIELD_PREP(TEMP_CFG_CYCLES, clk);
35 val |= TEMP_CFG_ENA;
36
37 writel(val, hwmon->base + TEMP_CFG);
38 }
39
s5_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * temp)40 static int s5_read(struct device *dev, enum hwmon_sensor_types type,
41 u32 attr, int channel, long *temp)
42 {
43 struct s5_hwmon *hwmon = dev_get_drvdata(dev);
44 int rc = 0, value;
45 u32 stat;
46
47 switch (attr) {
48 case hwmon_temp_input:
49 stat = readl_relaxed(hwmon->base + TEMP_STAT);
50 if (!(stat & TEMP_STAT_VALID))
51 return -EAGAIN;
52 value = stat & TEMP_STAT_TEMP;
53 /*
54 * From register documentation:
55 * Temp(C) = TEMP_SENSOR_STAT.TEMP / 4096 * 352.2 - 109.4
56 */
57 value = DIV_ROUND_CLOSEST(value * 3522, 4096) - 1094;
58 /*
59 * Scale down by 10 from above and multiply by 1000 to
60 * have millidegrees as specified by the hwmon sysfs
61 * interface.
62 */
63 value *= 100;
64 *temp = value;
65 break;
66 default:
67 rc = -EOPNOTSUPP;
68 break;
69 }
70
71 return rc;
72 }
73
s5_is_visible(const void * _data,enum hwmon_sensor_types type,u32 attr,int channel)74 static umode_t s5_is_visible(const void *_data, enum hwmon_sensor_types type,
75 u32 attr, int channel)
76 {
77 if (type != hwmon_temp)
78 return 0;
79
80 switch (attr) {
81 case hwmon_temp_input:
82 return 0444;
83 default:
84 return 0;
85 }
86 }
87
88 static const struct hwmon_channel_info * const s5_info[] = {
89 HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),
90 HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
91 NULL
92 };
93
94 static const struct hwmon_ops s5_hwmon_ops = {
95 .is_visible = s5_is_visible,
96 .read = s5_read,
97 };
98
99 static const struct hwmon_chip_info s5_chip_info = {
100 .ops = &s5_hwmon_ops,
101 .info = s5_info,
102 };
103
s5_temp_probe(struct platform_device * pdev)104 static int s5_temp_probe(struct platform_device *pdev)
105 {
106 struct device *hwmon_dev;
107 struct s5_hwmon *hwmon;
108
109 hwmon = devm_kzalloc(&pdev->dev, sizeof(*hwmon), GFP_KERNEL);
110 if (!hwmon)
111 return -ENOMEM;
112
113 hwmon->base = devm_platform_ioremap_resource(pdev, 0);
114 if (IS_ERR(hwmon->base))
115 return PTR_ERR(hwmon->base);
116
117 hwmon->clk = devm_clk_get_enabled(&pdev->dev, NULL);
118 if (IS_ERR(hwmon->clk))
119 return PTR_ERR(hwmon->clk);
120
121 s5_temp_enable(hwmon);
122
123 hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev,
124 "s5_temp",
125 hwmon,
126 &s5_chip_info,
127 NULL);
128
129 return PTR_ERR_OR_ZERO(hwmon_dev);
130 }
131
132 static const struct of_device_id s5_temp_match[] = {
133 { .compatible = "microchip,sparx5-temp" },
134 {},
135 };
136 MODULE_DEVICE_TABLE(of, s5_temp_match);
137
138 static struct platform_driver s5_temp_driver = {
139 .probe = s5_temp_probe,
140 .driver = {
141 .name = "sparx5-temp",
142 .of_match_table = s5_temp_match,
143 },
144 };
145
146 module_platform_driver(s5_temp_driver);
147
148 MODULE_AUTHOR("Lars Povlsen <lars.povlsen@microchip.com>");
149 MODULE_DESCRIPTION("Sparx5 SoC temperature sensor driver");
150 MODULE_LICENSE("GPL");
151