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Searched refs:TEGRA124_CLK_PLL_P (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/clk/tegra/
H A Dclk-tegra124.c873 [tegra_clk_pll_p] = { .dt_id = TEGRA124_CLK_PLL_P, .present = true },
945 { .con_id = "pll_p", .dt_id = TEGRA124_CLK_PLL_P },
1291 { TEGRA124_CLK_UARTA, TEGRA124_CLK_PLL_P, 408000000, 0 },
1292 { TEGRA124_CLK_UARTB, TEGRA124_CLK_PLL_P, 408000000, 0 },
1293 { TEGRA124_CLK_UARTC, TEGRA124_CLK_PLL_P, 408000000, 0 },
1294 { TEGRA124_CLK_UARTD, TEGRA124_CLK_PLL_P, 408000000, 0 },
1303 { TEGRA124_CLK_HOST1X, TEGRA124_CLK_PLL_P, 136000000, 1 },
1304 { TEGRA124_CLK_DSIALP, TEGRA124_CLK_PLL_P, 68000000, 0 },
1305 { TEGRA124_CLK_DSIBLP, TEGRA124_CLK_PLL_P, 68000000, 0 },
1307 { TEGRA124_CLK_DFLL_SOC, TEGRA124_CLK_PLL_P, 51000000, 1 },
[all …]
/linux/Documentation/devicetree/bindings/cpufreq/
H A Dnvidia,tegra124-cpufreq.txt33 <&tegra_car TEGRA124_CLK_PLL_P>,
/linux/include/dt-bindings/clock/
H A Dtegra124-car-common.h239 #define TEGRA124_CLK_PLL_P 211 macro
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124-nyan-blaze-emc.dtsi13 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
20 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
27 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
34 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
41 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
48 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
H A Dtegra124-jetson-tk1-emc.dtsi13 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
20 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
27 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
34 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
41 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
48 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
H A Dtegra124-apalis-emc.dtsi17 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
24 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
31 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
38 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
45 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
52 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
H A Dtegra124-nyan-big-emc.dtsi13 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
20 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
27 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
34 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
41 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
48 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
94 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
101 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
108 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
115 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
[all …]
H A Dtegra124.dtsi1198 <&tegra_car TEGRA124_CLK_PLL_P>,